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FRITS " A Microprocessor Functional BIST Method

Published: 07 October 2002 Publication History

Abstract

This paper describes a novel functional Built-in-Self-Test method for microprocessors. This technique is based on the fundamental principle that complex chips have embedded functionality that can be used to implement a comprehensive self-test strategy. Functional testing has generally been associated with expensive testers. In order to lower the cost of test, there is a general trend to adopt structural test techniques like scan that enable use of low cost testers. One of the key advantages of the test method described here is that it enables functional testing of microprocessors on low cost testers. Detailed implementation of this technique, the test generation methodology, the fault grade methodology and silicon results on Intel ®Pentium ®4 and Itanium family microprocessors are presented.

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  • (2018)Autonomous Multicycle Tests With Low Storage and Test Application Time OverheadsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2017.277426937:9(1881-1892)Online publication date: 1-Sep-2018
  • (2016)Observability solutions for in-field functional test of processor-based systemsMicroprocessors & Microsystems10.1016/j.micpro.2016.09.00247:PB(392-403)Online publication date: 1-Nov-2016
  • (2015)On the automatic generation of SBST test programs for in-field testProceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition10.5555/2755753.2757086(1186-1191)Online publication date: 9-Mar-2015
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        cover image Guide Proceedings
        ITC '02: Proceedings of the 2002 IEEE International Test Conference
        October 2002
        ISBN:0780375432

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        IEEE Computer Society

        United States

        Publication History

        Published: 07 October 2002

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        • (2018)Autonomous Multicycle Tests With Low Storage and Test Application Time OverheadsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2017.277426937:9(1881-1892)Online publication date: 1-Sep-2018
        • (2016)Observability solutions for in-field functional test of processor-based systemsMicroprocessors & Microsystems10.1016/j.micpro.2016.09.00247:PB(392-403)Online publication date: 1-Nov-2016
        • (2015)On the automatic generation of SBST test programs for in-field testProceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition10.5555/2755753.2757086(1186-1191)Online publication date: 9-Mar-2015
        • (2015)FOLDACM Transactions on Design Automation of Electronic Systems10.1145/276445520:4(1-19)Online publication date: 28-Sep-2015
        • (2015)A Generalized Definition of Unnecessary Test Vectors in Functional Test SequencesACM Transactions on Design Automation of Electronic Systems10.1145/269985320:2(1-13)Online publication date: 2-Mar-2015
        • (2014)Connecting different worldsProceedings of the conference on Design, Automation & Test in Europe10.5555/2616606.2616982(1-8)Online publication date: 24-Mar-2014
        • (2014)Parallel reconfiguration algorithms for mesh-connected processor arraysThe Journal of Supercomputing10.1007/s11227-014-1096-y69:2(610-628)Online publication date: 1-Aug-2014
        • (2011)Evolution of test programs exploiting a FSM processor modelProceedings of the 2011 international conference on Applications of evolutionary computation - Volume Part II10.5555/2008445.2008465(162-171)Online publication date: 27-Apr-2011
        • (2010)Reducing the storage requirements of a test sequence by using a background vectorProceedings of the Conference on Design, Automation and Test in Europe10.5555/1870926.1871224(1237-1242)Online publication date: 8-Mar-2010
        • (2010)Using introspective software-based testing for post-silicon debug and repairProceedings of the 47th Design Automation Conference10.1145/1837274.1837407(537-542)Online publication date: 13-Jun-2010
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