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Securing Branch Predictors with Two-Level Encryption

Published: 03 August 2020 Publication History

Abstract

Modern processors rely on various speculative mechanisms to meet performance demand. Branch predictors are one of the most important micro-architecture components to deliver performance. However, they have been under heavy scrutiny because of recent side-channel attacks. Branch predictors are indexed using the PC and recent branch histories. An adversary can manipulate these parameters to access and control the same branch predictor entry that a victim uses. Recent Spectre attacks exploit this to set up speculative-execution-based security attacks.
In this article, we aim to mitigate branch predictor side-channels using two-level encryption. At the first level, we randomize the set-index by encrypting the PC using a per-context secret key. At the second level, we encrypt the data in each branch predictor entry. While periodic key changes make the branch predictor more secure, performance degradation can be significant. To alleviate performance degradation, we propose a practical set update mechanism that also considers parallelism in multi-banked branch predictors. We show that our mechanism exhibits only 1.0% and 0.2% performance degradation while changing keys every 10K and 50K cycles, respectively, which is much lower than other state-of-the-art approaches.

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Published In

cover image ACM Transactions on Architecture and Code Optimization
ACM Transactions on Architecture and Code Optimization  Volume 17, Issue 3
September 2020
200 pages
ISSN:1544-3566
EISSN:1544-3973
DOI:10.1145/3415154
Issue’s Table of Contents
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than the author(s) must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected].

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Publication History

Published: 03 August 2020
Accepted: 01 June 2020
Revised: 01 April 2020
Received: 01 December 2019
Published in TACO Volume 17, Issue 3

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Author Tags

  1. Branch predictor
  2. encryption
  3. side-channel

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  • (2024)Uncovering and Exploiting AMD Speculative Memory Access Predictors for Fun and Profit2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA57654.2024.00014(31-45)Online publication date: 2-Mar-2024
  • (2024)GADGETSPINNER: A New Transient Execution Primitive Using the Loop Stream Detector2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA57654.2024.00013(15-30)Online publication date: 2-Mar-2024
  • (2023)All Your PC Are Belong to Us: Exploiting Non-control-Transfer Instruction BTB Updates for Dynamic PC ExtractionProceedings of the 50th Annual International Symposium on Computer Architecture10.1145/3579371.3589100(1-14)Online publication date: 17-Jun-2023
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  • (2022)HyBP: Hybrid Isolation-Randomization Secure Branch Predictor2022 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA53966.2022.00033(346-359)Online publication date: Apr-2022
  • (2022)STBPU: A Reasonably Secure Branch Prediction Unit2022 52nd Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN)10.1109/DSN53405.2022.00023(109-123)Online publication date: Jun-2022
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  • (2021)Leaking Secrets through Modern Branch Predictor in the Speculative WorldIEEE Transactions on Computers10.1109/TC.2021.3122830(1-1)Online publication date: 2021
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