Export Citations
Save this search
Please login to be able to save your searches and receive alerts for new content matching your search criteria.
- research-articleJune 1988
Cache Operations by MRU Change
IEEE Transactions on Computers (ITCO), Volume 37, Issue 6Pages 700–709https://doi.org/10.1109/12.2208The performance of set associative caches is analyzed. The method used is to group the cache lines into regions according to their positions in the replacement stacks of a cache, and then to observe how the memory access of a CPU is distributed over ...
- research-articleJune 1988
Theory of Clocking for Maximum Execution Overlap of High-Speed Digital Systems
IEEE Transactions on Computers (ITCO), Volume 37, Issue 6Pages 678–690https://doi.org/10.1109/12.2206The effect of clocking schemes on overlapped execution performance in a digital system is described and quantified. Effects of branching, data dependencies, and resource conflicts between consecutive tasks are considered. Some problems of clocking ...
- research-articleJune 1988
Strongly Code Disjoint Checkers
IEEE Transactions on Computers (ITCO), Volume 37, Issue 6Pages 751–756https://doi.org/10.1109/12.2217Strongly code-disjoint (SCD) checkers are defined and shown to include totally self-checking (TSC) code-disjoint checkers. This type of checker is the natural companion of strongly fault-secure (SFS) networks. SCD checkers are the largest class of ...
- research-articleJune 1988
Definition and Design of Strongly Language Disjoint Checkers
IEEE Transactions on Computers (ITCO), Volume 37, Issue 6Pages 745–748https://doi.org/10.1109/12.2215Strongly language-disjoint (SLD) checkers are to sequential systems what strongly code-disjoint checkers are to combinatorial systems. SLD checkers are the largest class of checkers with which a functional system can achieve the totally self-checking ...
- research-articleJune 1988
Approximate Analysis of Fork/Join Synchronization in Parallel Queues
IEEE Transactions on Computers (ITCO), Volume 37, Issue 6Pages 739–743https://doi.org/10.1109/12.2213An approximation technique, called scaling approximation, is introduced and applied to the analysis of homogeneous fork/join queuing systems consisting of K or=32.
- research-articleJune 1988
A Comparison of VLSI Architecture of Finite Field Multipliers Using Dual, Normal, or Standard Bases
IEEE Transactions on Computers (ITCO), Volume 37, Issue 6Pages 735–739https://doi.org/10.1109/12.2212Three different finite-field multipliers are presented: (1) a dual-basis multiplier due to E.R. Berlekamp (1982); the Massey-Omura normal basis multiplier; and (3) the Scott-Tavares-Peppard standard basis multiplier. These algorithms are chosen because ...
- research-articleJune 1988
On Two-Dimensional Via Assignment for Single-Row Routing
IEEE Transactions on Computers (ITCO), Volume 37, Issue 6Pages 721–727https://doi.org/10.1109/12.2210The authors study the via assignment problem when vias are allowed to appear rowwise as well as columnwise. Previously they proved that the problem belongs to the class of NP-hard problems and therefore it is unlikely that polynomial-time algorithms ...
- research-articleJune 1988
Abstract pecification of Synchronous Data Types for VLSI and Proving the Correctness of Systolic Network Implementations
IEEE Transactions on Computers (ITCO), Volume 37, Issue 6Pages 710–720https://doi.org/10.1109/12.2209A combined methodology is presented for specifying abstract synchronous data types and proving the correctness of systolic network implementations. It is shown that an extension of the Parnas trace method of specifying software modules containing ...
- research-articleJune 1988
A Synthesis Algorithm for Reconfigurable Interconnection Networks
IEEE Transactions on Computers (ITCO), Volume 37, Issue 6Pages 691–699https://doi.org/10.1109/12.2207The performance of a parallel algorithm depends in part on the interconnection topology of the target parallel system. An interconnection network is called reconfigurable if its topology can be changed between different algorithm executions. Since ...
- research-articleJune 1988
Systolic Super Summation
IEEE Transactions on Computers (ITCO), Volume 37, Issue 6Pages 657–677https://doi.org/10.1109/12.2205A principal limitation in accuracy for scientific computation performed with floating-point arithmetic is due to the computation of repeated sums, such as those that arise in inner products. A systolic super summer of cellular design is proposed for the ...
- research-articleJune 1988
Continuous Models for Communication Density Constraints on Multiprocessor Performance
IEEE Transactions on Computers (ITCO), Volume 37, Issue 6Pages 652–656https://doi.org/10.1109/12.2204Fundamental limits on the communication capabilities of massively parallel multiprocessors are investigated. It is shown that in the limit of machines of infinite extent in which the number of processors per unit volume is constant and in which the ...
- research-articleJune 1988
Benchmark Synthesis Using the LRU Cache Hit Function
IEEE Transactions on Computers (ITCO), Volume 37, Issue 6Pages 637–645https://doi.org/10.1109/12.2202The LRU cache hit function is used as a general characterization of locality of reference to address the synthesis question of whether benchmarks can be created that have a required locality of reference. Several results are given that show ...