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High-performance packet classification algorithm for multithreaded IXP network processor

Published: 29 January 2008 Publication History

Abstract

Packet classification is crucial for the Internet to provide more value-added services and guaranteed quality of service. Besides hardware-based solutions, many software-based classification algorithms have been proposed. However, classifying at 10 Gbps speed or higher is a challenging problem and it is still one of the performance bottlenecks in core routers. In general, classification algorithms face the same challenge of balancing between high classification speed and low memory requirements. This paper proposes a modified recursive flow classification (RFC) algorithm, Bitmap-RFC, which significantly reduces the memory requirements of RFC by applying a bitmap compression technique. To speed up classifying speed, we exploit the multithreaded architectural features in various algorithm development stages from algorithm design to algorithm implementation. As a result, Bitmap-RFC strikes a good balance between speed and space. It can significantly keep both high classification speed and reduce memory space consumption. This paper investigates the main NPU software design aspects that have dramatic performance impacts on any NPU-based implementations: memory space reduction, instruction selection, data allocation, task partitioning, and latency hiding. We experiment with an architecture-aware design principle to guarantee the high performance of the classification algorithm on an NPU implementation. The experimental results show that the Bitmap-RFC algorithm achieves 10 Gbps speed or higher and has a good scalability on Intel IXP2800 NPU.

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  • (2013)High-Performance Packet Classification for Network-Device PlatformsIEEE Communications Letters10.1109/LCOMM.2013.051313.12177817:6(1252-1255)Online publication date: Jun-2013
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Published In

cover image ACM Transactions on Embedded Computing Systems
ACM Transactions on Embedded Computing Systems  Volume 7, Issue 2
February 2008
412 pages
ISSN:1539-9087
EISSN:1558-3465
DOI:10.1145/1331331
Issue’s Table of Contents
Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Publication History

Published: 29 January 2008
Accepted: 01 June 2007
Revised: 01 June 2007
Received: 01 January 2007
Published in TECS Volume 7, Issue 2

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Author Tags

  1. Network processor
  2. architecture
  3. embedded system design
  4. multithreading
  5. packet classification
  6. thread-level parallelism

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Cited By

View all
  • (2013)High-Performance Packet Classification for Network-Device PlatformsIEEE Communications Letters10.1109/LCOMM.2013.051313.12177817:6(1252-1255)Online publication date: Jun-2013
  • (2013)A multi-thread based approach for IP address lookup2013 21st Iranian Conference on Electrical Engineering (ICEE)10.1109/IranianCEE.2013.6599786(1-4)Online publication date: May-2013
  • (2013)Hint-based cache design for reducing miss penalty in HBS packet classification algorithmJournal of Parallel and Distributed Computing10.1016/j.jpdc.2013.03.00573:8(1170-1182)Online publication date: 1-Aug-2013
  • (2011)packetC Language and Parallel Processing of Masked DatabasespacketC Programming10.1007/978-1-4302-4159-1_31(335-344)Online publication date: 2011
  • (2010)PacketC Language and Parallel Processing of Masked DatabasesProceedings of the 2010 39th International Conference on Parallel Processing10.1109/ICPP.2010.55(472-481)Online publication date: 13-Sep-2010
  • (2010)Towards optimized packet processing for multithreaded network processor2010 International Conference on High Performance Switching and Routing10.1109/HPSR.2010.5580281(127-132)Online publication date: Jun-2010
  • (2009)Practice of parallelizing network applications on multi-core architecturesProceedings of the 23rd international conference on Supercomputing10.1145/1542275.1542307(204-213)Online publication date: 8-Jun-2009
  • (2009)Efficient Hybrid Packet Classification in Traffic Control System Using Network ProcessorsProceedings of the 2009 International Conference on Advanced Computer Control10.1109/ICACC.2009.31(57-61)Online publication date: 22-Jan-2009
  • (2008)On RTP filtering for network traffic reductionProceedings of the 6th International Conference on Advances in Mobile Computing and Multimedia10.1145/1497185.1497261(356-359)Online publication date: 24-Nov-2008
  • (2008)Accurate Traffic Classification with Multi-threaded Processors2008 IEEE International Symposium on Knowledge Acquisition and Modeling Workshop10.1109/KAMW.2008.4810528(478-481)Online publication date: Dec-2008

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