Article

Free access

The NuMesh: a modular, scalable communications substrate

Authors:

Russell TessierAuthors Info & Claims

ICS '93: Proceedings of the 7th international conference on Supercomputing

Pages 230 - 239

https://doi.org/10.1145/165939.165973

Published: 01 August 1993 Publication History

PDF eReader

References

[1]

H. Abelson, A. Berlin, J. Katzenelson, W. McAllister, G. Rozas, and G. Sussman. The Supercomputer Toolkit and its applications. In Proc. of the Fifth Jerusalem Conference on Information Technology, Oct. 1990.

Digital Library

Google Scholar

[2]

A. Agarwal, D. Chaiken, G. D'Souza, K. Johnson, D. Kranz, J. Kubiatowicz, K. Kurihara, B.-H. Lim, G. Maa, D. Nussbaum, M. Parkin, and D. Yeung. The MIT Alewife machine: A large-scale distributed memory multiprocessor. In Proceedings of Workshop on Scalable Shared Memory Multiprocessor. Kluwer Academic Publishers, 1991. An extended version of this paper has beeen submitted for publication, and appears as MIT/LCS Memo TM-454, 1991.

Digital Library

Google Scholar

[3]

G. Anagnostou, D. Dewey, and A. T. Patera. Geometry defining processors for engineering design and analysis. The Visual Computer, 5:304-315,1989.

Crossref

Google Scholar

[4]

M. Annaratone et al. Warp architecture and implementation. In Proc. 13th Annual International Symposium on Computer Architecture, pages 346-356, Los Alamitos, Calif., 1986. IEEE Computer Society Press.

Digital Library

Google Scholar

[5]

J.C. Bier et al. Gabriel: A design Environments for DSP. IEEE Micro, 10(5):28-45, Oct 1990.

Digital Library

Google Scholar

[6]

S. Borkar, R. Cohn, G. Cox, Z Gross, H. T. Kung, M. Lam, M. Levine, B. Moore, W. Moore, C. Peterson, J. Susman, J. Sutton, J. Urbanski, and J. Webb. Supporting systolic and memory communication in iWarp. In Proc. 17th Annual Symposium on Computer Architecture, Seattle, May 1990.

Digital Library

Google Scholar

[7]

W. J. Dally et al. The J-Machine: A fine-grain concurrent computer. In Information Proceedings 89, Elsevier 1989.

Google Scholar

[8]

W.J. Dally and C.L. Seitz. Deadlock free message routing in multiprocessor interconnection networks. IEEE Transactions on Computers, C-36(5) May 1987.

Digital Library

Google Scholar

[9]

R. Dujari. Parallel Viterbi search algorthim for speech recognition. Master's thesis, EECS Department, MIT, Feb. 1992.

Google Scholar

[10]

D. Gustavson et al. Scalable Coherent Interface: Logical, Physical, and cache coherence specifications. Jan. 1991. Preliminary draft, P15596 Working Group of the IEEE Microprocessor Standards Committee.

Google Scholar

[11]

R. Halstead and S. Ward. The MuNet: A scalable decentralized architecture parallel computation. In Proc. Seventh International Symposium on Computer Architecture, La Baule, France, May 1980.

Digital Library

Google Scholar

[12]

Inmos Corporation. The Transputer Databook, 1986. Consolidated Printer, Barkeley, Calif.

Google Scholar

[13]

Inmos Ltd. IMS T800 Architectture, 1987. Inmos Technical Note 6.

Google Scholar

[14]

H. Z Kung. Deadlock avoidance for systolic communication. In Proc. 15th symposium on Computer Architecture, Honoloulu, May 1988.

Digital Library

Google Scholar

[15]

H. Z Kung and C. E. Leiserson. Systolic array for VLSI. In C. A. Mead and ~ A. Conway, editors, Introduction to VLSi Systems. Addison-Wesley, 1980.

Google Scholar

[16]

M. Lam. A Systolic Array Optimizing Compiler. Kluwer Academic Publishers, Boston, 1989.

Digital Library

Google Scholar

[17]

E. A. Lee, W. Ho, E. Goei, J. Bier, and S. Bhattacharyya. Gabriel: A design envirnoment for DSP. IEEE Trans. on Acoustics, Speech, and Signal Processing, Nov 1989.

Crossref

Google Scholar

[18]

H.Li and Q. Stout. Reconfigurable massively parallel computers: An introduction. In Li and Stout, editors, Reconfigurable Massively Parallel Computers. Prentice Hall, 1991.

Google Scholar

[19]

V. M. Lo, S. Rajopadhye, S. Gupta, et al. OREGAMI: tools for mapping parallel computations to parallel architectures. International Journal of Parallel Programming, 20(3):237-270, June 1991.

Crossref

Google Scholar

[20]

K.MacKenzie. Numesh prototype hardware description. NuMesh Systems Memo 1, MIT Computer Architecture Group, June, 1990.

Google Scholar

[21]

S. F. McCormick, editor. Multigrid methods. Marcel Dekker, New york 1989.

Google Scholar

[22]

C. Peterson, J. Sutton, and E Wiley. iWrap: A 100-MOPS, LIW multiprocessor for mulitcomputer. IEEE Micro, pages 26-29, 81-87, June 1991.

Digital Library

Google Scholar

[23]

G. Pratt and J. Nguyen. Distributed synchronous clocking. IEEE Transactions on Parallel and Distributed Systems. In Press.

Digital Library

Google Scholar

[24]

G. Pratt, S. Ward, C. Metcalf, J. Nguyen, and J. Pezaris. The diamond interconnect. process, 1993.

Google Scholar

[25]

C. L Seitz. The Cosmic Cube. Communication of the ACM, 28(1), Jan. 1985.

Digital Library

Google Scholar

[26]

S. B. Shukla and D. E Agarwal. Scheduling pipelined communication in distributed memory mulitprocessor for real-time applications. In 18th Annual International Symposium on Computer Architecture (ACM SIGARCH Computer Achitecture News vol.19 no.3), 1991.

Digital Library

Google Scholar

[27]

S.Ward. An approach to real-time computation. In Proc. Seventh Texas Conferenceon Computing Systems, Houston, TX., Oct. 1978.

Google Scholar

[28]

V. Zue, J. Galss, D. Goodine, M. Phillips, and S. Seneff. The Summit speech recognition system: phonological modelling and lexical access. In IEEE Intl. Conference on Acoustics, Speech and Signal Processing, Albuquerque, NM, Apr. 1990.

Crossref

Google Scholar

Cited By

View all

Panić MRodriguez GQuiñones EAbella JCazorla FAuguin Mde Simone RDavis RGrolleau E(2013)On-chip ring network designs for hard-real time systemsProceedings of the 21st International conference on Real-Time Networks and Systems10.1145/2516821.2516829(23-32)Online publication date: 16-Oct-2013
https://dl.acm.org/doi/10.1145/2516821.2516829
Schoeberl MBrandner FSparsø JKasapaki E(2012)A Statically Scheduled Time-Division-Multiplexed Network-on-Chip for Real-Time SystemsProceedings of the 2012 IEEE/ACM Sixth International Symposium on Networks-on-Chip10.1109/NOCS.2012.25(152-160)Online publication date: 9-May-2012
https://dl.acm.org/doi/10.1109/NOCS.2012.25
Shoemaker DHonoré FMetcalf CWard S(1996)NuMeshThe Journal of Supercomputing10.1007/BF0013011110:3(285-302)Online publication date: 1-Sep-1996
https://dl.acm.org/doi/10.1007/BF00130111

Index Terms

The NuMesh: a modular, scalable communications substrate

Recommendations

Interfacial reactions and electrical properties of hafnium-based thin films in Cu/barrier/n+-p junction diodes

In this study, the barrier properties of Hf and nitrogen incorporated Hf films were investigated by Cu/Hf-N/Si structure. Hafnium and hafnium nitride films were prepared by reactive rf-magnetron sputtering on blank silicon wafers. The barrier properties ...
Annealing temperature effect on electrical and structural properties of Cu/Au Schottky contacts to n-type GaN

Schottky contacts were fabricated on n-type GaN using a Cu/Au metallization scheme, and the electrical and structural properties have been investigated as a function of annealing temperature by current-voltage (I-V), capacitance-voltage (C-V), Auger ...
Effect of pyrolysis temperature on the electrical, optical, structural, and morphological properties of ITO thin films prepared by a sol-gel spin coating process

Display Omitted Indium tin oxide thin films were fabricated by the sol-gel spin coating method.The effects of pyrolysis temperature on optical band gap of ITO were investigated.The sample pyrolyzed at 500 C has the lowest sheet resistance and optical ...

Comments

Information & Contributors

Information

Published In

ICS '93: Proceedings of the 7th international conference on Supercomputing

August 1993

425 pages

ISBN:089791600X

DOI:10.1145/165939

Chairman:
Yoichi Muraoka

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 August 1993

Permissions

Request permissions for this article.

Request Permissions

Check for updates

Qualifiers

Article

Conference

ICS93

Sponsor:

SIGARCH

ICS93: International Conference on Supercomputing

July 19 - 23, 1993

Tokyo, Japan

Acceptance Rates

Overall Acceptance Rate 629 of 2,180 submissions, 29%

Contributors

Other Metrics

View Article Metrics

Bibliometrics & Citations

Bibliometrics

Article Metrics

3
Total Citations
View Citations
299
Total Downloads

Downloads (Last 12 months)30
Downloads (Last 6 weeks)6

Reflects downloads up to 11 Aug 2024

Other Metrics

View Author Metrics

Citations

Cited By

View all

Panić MRodriguez GQuiñones EAbella JCazorla FAuguin Mde Simone RDavis RGrolleau E(2013)On-chip ring network designs for hard-real time systemsProceedings of the 21st International conference on Real-Time Networks and Systems10.1145/2516821.2516829(23-32)Online publication date: 16-Oct-2013
https://dl.acm.org/doi/10.1145/2516821.2516829
Schoeberl MBrandner FSparsø JKasapaki E(2012)A Statically Scheduled Time-Division-Multiplexed Network-on-Chip for Real-Time SystemsProceedings of the 2012 IEEE/ACM Sixth International Symposium on Networks-on-Chip10.1109/NOCS.2012.25(152-160)Online publication date: 9-May-2012
https://dl.acm.org/doi/10.1109/NOCS.2012.25
Shoemaker DHonoré FMetcalf CWard S(1996)NuMeshThe Journal of Supercomputing10.1007/BF0013011110:3(285-302)Online publication date: 1-Sep-1996
https://dl.acm.org/doi/10.1007/BF00130111

View Options

View options

PDF

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader

Get Access

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Cited By

Index Terms

Recommendations

Interfacial reactions and electrical properties of hafnium-based thin films in Cu/barrier/n+-p junction diodes

Annealing temperature effect on electrical and structural properties of Cu/Au Schottky contacts to n-type GaN

Effect of pyrolysis temperature on the electrical, optical, structural, and morphological properties of ITO thin films prepared by a sol-gel spin coating process

Comments

Published In

Sponsors

Publisher

Publication History

Permissions

Check for updates

Qualifiers

Conference

Acceptance Rates

Other Metrics

Article Metrics

Other Metrics

Cited By

PDF

eReader

Login options

Full Access

References

Cited By

Index Terms

Recommendations

Interfacial reactions and electrical properties of hafnium-based thin films in Cu/barrier/n+-p junction diodes

Annealing temperature effect on electrical and structural properties of Cu/Au Schottky contacts to n-type GaN

Effect of pyrolysis temperature on the electrical, optical, structural, and morphological properties of ITO thin films prepared by a sol-gel spin coating process

Comments

Information

Published In

Sponsors

Publisher

Publication History

Permissions

Check for updates

Qualifiers

Conference

Acceptance Rates

Contributors

Other Metrics

Bibliometrics

Article Metrics

Other Metrics

Citations

Cited By

View options

PDF

eReader

Get Access

Login options

Full Access

Figures

Other

Share

Share this Publication link

Share on social media

Affiliations