research-article

A low-cost wear-leveling algorithm for block-mapping solid-state disks

Authors:

Li-Chun HuangAuthors Info & Claims

ACM SIGPLAN Notices, Volume 46, Issue 5

Pages 31 - 40

https://doi.org/10.1145/2016603.1967683

Published: 11 April 2011 Publication History

Abstract

Multilevel flash memory cells double or even triple storage density, producing affordable solid-state disks for end users. However, flash lifetime is becoming a critical issue in the popularity of solid-state disks. Wear-leveling methods can prevent flash-storage devices from prematurely retiring any portions of flash memory. The two practical challenges of wear-leveling design are implementation cost and tuning complexity. This study proposes a new wear-leveling design that features both simplicity and adaptiveness. This design requires no new data structures, but utilizes the intelligence available in sector-translating algorithms. Using an on-line tuning method, this design adaptively tunes itself to reach good balance between wear evenness and overhead. A series of trace-driven simulations show that the proposed design outperforms a competitive existing design in terms of wear evenness and overhead reduction. This study also presents a prototype that proves the feasibility of this wear-leveling design in real solid-state disks.

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Cited By

Tripathy SSatpathy M(2022)SSD internal cache management policiesJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2021.102334122:COnline publication date: 1-Jan-2022
https://dl.acm.org/doi/10.1016/j.sysarc.2021.102334
Yu SXiao NDeng MLiu FChen W(2017)Redesign the Memory Allocator for Non-Volatile Main MemoryACM Journal on Emerging Technologies in Computing Systems10.1145/299765113:3(1-26)Online publication date: 14-Apr-2017
https://dl.acm.org/doi/10.1145/2997651
Mittal SVetter J(2016)A Survey of Software Techniques for Using Non-Volatile Memories for Storage and Main Memory SystemsIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2015.244298027:5(1537-1550)Online publication date: 1-May-2016
https://dl.acm.org/doi/10.1109/TPDS.2015.2442980
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Index Terms

A low-cost wear-leveling algorithm for block-mapping solid-state disks
1. Hardware
  1. Communication hardware, interfaces and storage
    1. External storage
  2. Integrated circuits
    1. Semiconductor memory
      1. Non-volatile memory
2. Software and its engineering
  1. Software organization and properties
    1. Contextual software domains
      1. Operating systems
        Memory management
        Garbage collection

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Information & Contributors

Information

Published In

cover image ACM SIGPLAN Notices

ACM SIGPLAN Notices Volume 46, Issue 5

LCTES '10

May 2011

170 pages

ISSN:0362-1340

EISSN:1558-1160

DOI:10.1145/2016603

Issue’s Table of Contents

LCTES '11: Proceedings of the 2011 SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems
April 2011
182 pages
ISBN:9781450305556
DOI:10.1145/1967677
General Chair:
Jan Vitek
Purdue University, USA
,
Program Chair:
Bjorn De Sutter
Ghent University, Belgium

Copyright © 2011 ACM.

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 11 April 2011

Published in SIGPLAN Volume 46, Issue 5

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Cited By

Tripathy SSatpathy M(2022)SSD internal cache management policiesJournal of Systems Architecture: the EUROMICRO Journal10.1016/j.sysarc.2021.102334122:COnline publication date: 1-Jan-2022
https://dl.acm.org/doi/10.1016/j.sysarc.2021.102334
Yu SXiao NDeng MLiu FChen W(2017)Redesign the Memory Allocator for Non-Volatile Main MemoryACM Journal on Emerging Technologies in Computing Systems10.1145/299765113:3(1-26)Online publication date: 14-Apr-2017
https://dl.acm.org/doi/10.1145/2997651
Mittal SVetter J(2016)A Survey of Software Techniques for Using Non-Volatile Memories for Storage and Main Memory SystemsIEEE Transactions on Parallel and Distributed Systems10.1109/TPDS.2015.244298027:5(1537-1550)Online publication date: 1-May-2016
https://dl.acm.org/doi/10.1109/TPDS.2015.2442980
Pan YLi YXu YShen B(2016)DCSIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2015.250433335:8(1372-1385)Online publication date: 1-Aug-2016
https://dl.acm.org/doi/10.1109/TCAD.2015.2504333
Pan YLi YXu YZhang W(2014)DCS5Proceedings of the 2014 9th IEEE International Conference on Networking, Architecture, and Storage10.1109/NAS.2014.16(63-72)Online publication date: 6-Aug-2014
https://dl.acm.org/doi/10.1109/NAS.2014.16
Song YHwang WPark KPark K(2014)Microscopic Bit-Level Wear-Leveling for NAND Flash MemoryMobile, Ubiquitous, and Intelligent Computing10.1007/978-3-642-40675-1_48(315-320)Online publication date: 2014
https://doi.org/10.1007/978-3-642-40675-1_48
Gudeta YKwon SCho EChung T(2012)Probability-based static wear-leveling algorithm for block and hybrid-mapping NAND flash memoryDesign Automation for Embedded Systems10.1007/s10617-013-9108-316:4(241-264)Online publication date: 1-Nov-2012
https://dl.acm.org/doi/10.1007/s10617-013-9108-3
Bartolo ASabry Aly MMichelogiannakis GMitra S(2023)MC-ELMM: Multi-Chip Endurance-Limited Memory ManagementProceedings of the International Symposium on Memory Systems10.1145/3631882.3631905(1-16)Online publication date: 2-Oct-2023
https://dl.acm.org/doi/10.1145/3631882.3631905
Shweta Singh P(2019)Flash Translation Layer and its functionalities2019 IEEE Conference on Information and Communication Technology10.1109/CICT48419.2019.9066266(1-5)Online publication date: Dec-2019
https://doi.org/10.1109/CICT48419.2019.9066266
Chen RWang YLiu DShao ZJiang S(2017)Heating Dispersal for Self-Healing NAND Flash MemoryIEEE Transactions on Computers10.1109/TC.2016.259557266:2(361-367)Online publication date: 1-Feb-2017
https://dl.acm.org/doi/10.1109/TC.2016.2595572
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