research-article

Performance-driven analog placement considering monotonic current paths

Authors:

Mark Po-Hung Lin,

Bing-Shiun Chou,

Tung-Chieh Chen,

Bin-Da LiuAuthors Info & Claims

ICCAD '12: Proceedings of the International Conference on Computer-Aided Design

Pages 613 - 619

https://doi.org/10.1145/2429384.2429516

Published: 05 November 2012 Publication History

Abstract

Although modern analog placement algorithms aimed to minimize area and wirelength while satisfying symmetry, proximity, and other placement constraints, the generated layout does not reflect the circuit performance very well because of the routing-induced parasitics on the critical current/signal paths. This paper introduces the current-path constraints in analog placement, demonstrates their impact on circuit performance, and derives new problem formulation and algorithms to find placement solutions with monotonic current paths. Experimental results show that the proposed formulation and algorithms can generate compact layouts resulting in the even better circuit performance after performing post-layout simulation.

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Cited By

Xu PLi JHo TYu BZhu KKim T(2024)Performance-Driven Analog Layout Automation: Current Status and Future DirectionsProceedings of the 29th Asia and South Pacific Design Automation Conference10.1109/ASP-DAC58780.2024.10473859(679-685)Online publication date: 22-Jan-2024
https://dl.acm.org/doi/10.1109/ASP-DAC58780.2024.10473859
Zhu KChen HLiu MPan D(2023)Hierarchical Analog and Mixed-Signal Circuit Placement Considering System Signal FlowIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.323036742:8(2689-2702)Online publication date: Aug-2023
https://doi.org/10.1109/TCAD.2022.3230367
Lin YLi YFang DMadhusudan MSapatnekar SHarjani RHu JBolchini CO'Connor IVerbauwhede IWille R(2022)Are analytical techniques worthwhile for analog IC placement?Proceedings of the 2022 Conference & Exhibition on Design, Automation & Test in Europe10.5555/3539845.3539891(154-159)Online publication date: 14-Mar-2022
https://dl.acm.org/doi/10.5555/3539845.3539891
Show More Cited By

Index Terms

Performance-driven analog placement considering monotonic current paths
1. Applied computing
  1. Arts and humanities
    1. Architecture (buildings)
      1. Computer-aided design
  2. Physical sciences and engineering
    1. Engineering
      1. Computer-aided design
2. Hardware
  1. Electronic design automation
    1. Physical design (EDA)
      1. Placement
      2. Wire routing
  2. Hardware validation

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Published In

cover image ACM Conferences

ICCAD '12: Proceedings of the International Conference on Computer-Aided Design

November 2012

781 pages

ISBN:9781450315739

DOI:10.1145/2429384

General Chair:
Alan J. Hu
Univ. of British Columbia, Vancouver, BC, Canada

Copyright © 2012 ACM.

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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SIGDA: ACM Special Interest Group on Design Automation
IEEE CEDA

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Association for Computing Machinery

New York, NY, United States

Publication History

Published: 05 November 2012

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National Science Council Taiwan

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ICCAD '12

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SIGDA

ICCAD '12: The International Conference on Computer-Aided Design

November 5 - 8, 2012

California, San Jose

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Overall Acceptance Rate 457 of 1,762 submissions, 26%

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Cited By

Xu PLi JHo TYu BZhu KKim T(2024)Performance-Driven Analog Layout Automation: Current Status and Future DirectionsProceedings of the 29th Asia and South Pacific Design Automation Conference10.1109/ASP-DAC58780.2024.10473859(679-685)Online publication date: 22-Jan-2024
https://dl.acm.org/doi/10.1109/ASP-DAC58780.2024.10473859
Zhu KChen HLiu MPan D(2023)Hierarchical Analog and Mixed-Signal Circuit Placement Considering System Signal FlowIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.323036742:8(2689-2702)Online publication date: Aug-2023
https://doi.org/10.1109/TCAD.2022.3230367
Lin YLi YFang DMadhusudan MSapatnekar SHarjani RHu JBolchini CO'Connor IVerbauwhede IWille R(2022)Are analytical techniques worthwhile for analog IC placement?Proceedings of the 2022 Conference & Exhibition on Design, Automation & Test in Europe10.5555/3539845.3539891(154-159)Online publication date: 14-Mar-2022
https://dl.acm.org/doi/10.5555/3539845.3539891
Dhar TS. RPoojary JYaldiz SBurns SHarjani RSapatnekar SBolchini CO'Connor IVerbauwhede IWille R(2022)A charge flow formulation for guiding analog/mixed-signal placementProceedings of the 2022 Conference & Exhibition on Design, Automation & Test in Europe10.5555/3539845.3539890(148-153)Online publication date: 14-Mar-2022
https://dl.acm.org/doi/10.5555/3539845.3539890
Dhar TS RPoojary JYaldiz SBurns SHarjani RSapatnekar S(2022)A Charge Flow Formulation for Guiding Analog/Mixed-Signal Placement2022 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE54114.2022.9774621(148-153)Online publication date: 14-Mar-2022
https://doi.org/10.23919/DATE54114.2022.9774621
Lin YLi YFang DMadhusudan MSapatnekar SHarjani RHu J(2022)Are Analytical Techniques Worthwhile for Analog IC Placement?2022 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE54114.2022.9774498(154-159)Online publication date: 14-Mar-2022
https://doi.org/10.23919/DATE54114.2022.9774498
Zhu KChen HLiu MTang XSun NPan DXie Y(2020)Effective analog/mixed-signal circuit placement considering system signal flowProceedings of the 39th International Conference on Computer-Aided Design10.1145/3400302.3415625(1-9)Online publication date: 2-Nov-2020
https://dl.acm.org/doi/10.1145/3400302.3415625
Li YLin YMadhusudan MSharma AXu WSapatnekar SHarjani RHu JXie Y(2020)A customized graph neural network model for guiding analog IC placementProceedings of the 39th International Conference on Computer-Aided Design10.1145/3400302.3415624(1-9)Online publication date: 2-Nov-2020
https://dl.acm.org/doi/10.1145/3400302.3415624
Li YLin YMadhusudan MSharma AXu WSapatnekar SHarjani RHu J(2020)Exploring a Machine Learning Approach to Performance Driven Analog IC Placement2020 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)10.1109/ISVLSI49217.2020.00015(24-29)Online publication date: Jul-2020
https://doi.org/10.1109/ISVLSI49217.2020.00015
Xu BLi SXu XSun NPan DOzdal MChu C(2017)Hierarchical and Analytical Placement Techniques for High-Performance Analog CircuitsProceedings of the 2017 ACM on International Symposium on Physical Design10.1145/3036669.3036678(55-62)Online publication date: 19-Mar-2017
https://dl.acm.org/doi/10.1145/3036669.3036678
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