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Buffer minimization in earliest-deadline first scheduling of dataflow graphs

Published: 20 June 2013 Publication History

Abstract

Symbolic schedulability analysis of dataflow graphs is the process of synthesizing the timing parameters (i.e. periods, phases, and deadlines) of actors so that the task system is schedulable and achieves a high throughput when using a specific scheduling policy. Furthermore, the resulted schedule must ensure that communication buffers are underflow- and overflow-free. This paper describes a (partitioned) earliest-deadline first symbolic schedulability analysis of dataflow graphs that minimizes the buffering requirements.
Our scheduling analysis consists of three major steps. (1) The construction of an abstract affine schedule of the graph that excludes overflow and underflow exceptions and minimizes the buffering requirements assuming some precedences between jobs. (2) Symbolic deadlines adjustment that guarantees precedences without the need for lock-based synchronizations. (3) The concretization of the affine schedule using a symbolic, fast-converging, processor-demand analysis for both uniprocessor and multiprocessor systems. Experimental results show that our technique improves the buffering requirements in many cases.

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  • (2015)Timed behavioural modelling and affine scheduling of embedded software architectures in the AADL using PolychronyScience of Computer Programming10.1016/j.scico.2014.05.014106:C(54-77)Online publication date: 1-Aug-2015
  • (2014)Earliest-deadline first scheduling of multiple independent dataflow graphs2014 IEEE Workshop on Signal Processing Systems (SiPS)10.1109/SiPS.2014.6986102(1-6)Online publication date: Oct-2014
  • (2014)An abstraction-refinement framework for priority-driven scheduling of static dataflow graphsProceedings of the Twelfth ACM/IEEE Conference on Formal Methods and Models for Codesign10.1109/MEMCOD.2014.6961838(2-11)Online publication date: 1-Oct-2014
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          Published In

          cover image ACM SIGPLAN Notices
          ACM SIGPLAN Notices  Volume 48, Issue 5
          LCTES '13
          May 2013
          165 pages
          ISSN:0362-1340
          EISSN:1558-1160
          DOI:10.1145/2499369
          Issue’s Table of Contents
          • cover image ACM Conferences
            LCTES '13: Proceedings of the 14th ACM SIGPLAN/SIGBED conference on Languages, compilers and tools for embedded systems
            June 2013
            184 pages
            ISBN:9781450320856
            DOI:10.1145/2491899
          Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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          Association for Computing Machinery

          New York, NY, United States

          Publication History

          Published: 20 June 2013
          Published in SIGPLAN Volume 48, Issue 5

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          Author Tags

          1. affine relation
          2. buffer minimization
          3. dataflow graphs
          4. earliest-deadline first scheduling
          5. symbolic schedulability analysis

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          Cited By

          View all
          • (2015)Timed behavioural modelling and affine scheduling of embedded software architectures in the AADL using PolychronyScience of Computer Programming10.1016/j.scico.2014.05.014106:C(54-77)Online publication date: 1-Aug-2015
          • (2014)Earliest-deadline first scheduling of multiple independent dataflow graphs2014 IEEE Workshop on Signal Processing Systems (SiPS)10.1109/SiPS.2014.6986102(1-6)Online publication date: Oct-2014
          • (2014)An abstraction-refinement framework for priority-driven scheduling of static dataflow graphsProceedings of the Twelfth ACM/IEEE Conference on Formal Methods and Models for Codesign10.1109/MEMCOD.2014.6961838(2-11)Online publication date: 1-Oct-2014
          • (2017)ADFGProceedings of the 25th International Conference on Real-Time Networks and Systems10.1145/3139258.3139267(158-167)Online publication date: 4-Oct-2017
          • (2015)Towards refinement types for time-dependent data-flow networksProceedings of the 2015 ACM/IEEE International Conference on Formal Methods and Models for Codesign10.1109/MEMCOD.2015.7340465(36-41)Online publication date: 1-Sep-2015
          • (2014)Temporal analysis flow based on an enabling rate characterization for multi-rate applications executed on mpsocs with non-starvation-free schedulersProceedings of the 17th International Workshop on Software and Compilers for Embedded Systems10.1145/2609248.2609262(108-117)Online publication date: 10-Jun-2014
          • (2014)The ROSACE case study: From Simulink specification to multi/many-core execution2014 IEEE 19th Real-Time and Embedded Technology and Applications Symposium (RTAS)10.1109/RTAS.2014.6926012(309-318)Online publication date: Apr-2014
          • (2013)Design of safety-critical Java level 1 applications using affine abstract clocksProceedings of the 16th International Workshop on Software and Compilers for Embedded Systems10.1145/2463596.2463600(58-67)Online publication date: 19-Jun-2013
          • (undefined)Real-Time Fixed Priority Scheduling Synthesis using Affine DataFlow Graphs: from Theory to PracticeACM Transactions on Embedded Computing Systems10.1145/3615586

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