research-article

Dual-Level DVFS-Enabled Millimeter-Wave Wireless NoC Architectures

Authors:

Partha Pratim Pande,

Behrooz ShiraziAuthors Info & Claims

ACM Journal on Emerging Technologies in Computing Systems (JETC), Volume 10, Issue 4

Article No.: 27, Pages 1 - 27

https://doi.org/10.1145/2600074

Published: 02 June 2014 Publication History

Abstract

Wireless Network-on-Chip (WiNoC) has emerged as an enabling technology to design low power and high bandwidth massive multicore chips. WiNoCs based on small-world network architecture and designed with incorporating millimeter (mm)-wave on-chip wireless links offer significantly lower power and higher bandwidth compared to traditional mesh-based counterparts. In this mm-wave small-world WiNoC (mSWNoC), long distance communication predominately takes place through the wireless shortcuts whereas the short-range data exchange still occurs through the conventional metal wires. This results in performance advantages mainly stemming from using the wireless links as long-range shortcuts between far apart cores. This performance gain can be enhanced further if the wireline links and the processing cores of the WiNoC are optimized according to the traffic patterns and application workloads. In this work, we demonstrate that by incorporating both processor- and network-level dynamic voltage and frequency scaling (DVFS) in an mSWNoC, the power and thermal profiles can be improved without a significant impact on the overall execution time. We also show that depending on the applications, temperature hotspots can be formed either in the processing cores or in the network infrastructure. The proposed dual-level DVFS is capable of addressing both types of hotspots. In this work we will demonstrate how novel interconnect architectures enabled by the on-chip wireless links coupled with power management strategies can improve the energy and thermal characteristics of a NoC significantly.

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Cited By

Shanthi KKavitha MRajeswari PN JKumar SLalitha S(2023)Latency Reduction in mmWave VLSI Circuits through Gravitational Learning2023 International Conference on Advances in Computation, Communication and Information Technology (ICAICCIT)10.1109/ICAICCIT60255.2023.10466077(1197-1202)Online publication date: 23-Nov-2023
https://doi.org/10.1109/ICAICCIT60255.2023.10466077
Nour SA. Salem SM. Habashy S(2022)A Hybrid Model for Reliability Aware and Energy-Efficiency in Multicore SystemsComputers, Materials & Continua10.32604/cmc.2022.02077570:3(4447-4466)Online publication date: 2022
https://doi.org/10.32604/cmc.2022.020775
Hajiamini SShirazi BCrandall AGhasemzadeh H(2020)A Dynamic Programming Framework for DVFS-Based Energy-Efficiency in Multicore SystemsIEEE Transactions on Sustainable Computing10.1109/TSUSC.2019.29114715:1(1-12)Online publication date: 1-Jan-2020
https://doi.org/10.1109/TSUSC.2019.2911471
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Index Terms

Dual-Level DVFS-Enabled Millimeter-Wave Wireless NoC Architectures
1. Networks
  1. Network architectures

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cover image ACM Journal on Emerging Technologies in Computing Systems

ACM Journal on Emerging Technologies in Computing Systems Volume 10, Issue 4

May 2014

158 pages

ISSN:1550-4832

EISSN:1550-4840

DOI:10.1145/2628070

Issue’s Table of Contents

Copyright © 2014 ACM.

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ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 02 June 2014

Accepted: 01 September 2013

Revised: 01 July 2013

Received: 01 February 2013

Published in JETC Volume 10, Issue 4

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Cited By

Shanthi KKavitha MRajeswari PN JKumar SLalitha S(2023)Latency Reduction in mmWave VLSI Circuits through Gravitational Learning2023 International Conference on Advances in Computation, Communication and Information Technology (ICAICCIT)10.1109/ICAICCIT60255.2023.10466077(1197-1202)Online publication date: 23-Nov-2023
https://doi.org/10.1109/ICAICCIT60255.2023.10466077
Nour SA. Salem SM. Habashy S(2022)A Hybrid Model for Reliability Aware and Energy-Efficiency in Multicore SystemsComputers, Materials & Continua10.32604/cmc.2022.02077570:3(4447-4466)Online publication date: 2022
https://doi.org/10.32604/cmc.2022.020775
Hajiamini SShirazi BCrandall AGhasemzadeh H(2020)A Dynamic Programming Framework for DVFS-Based Energy-Efficiency in Multicore SystemsIEEE Transactions on Sustainable Computing10.1109/TSUSC.2019.29114715:1(1-12)Online publication date: 1-Jan-2020
https://doi.org/10.1109/TSUSC.2019.2911471
Hajiamini SShirazi B(2020)A study of DVFS methodologies for multicore systems with islanding feature10.1016/bs.adcom.2020.03.005Online publication date: 2020
https://doi.org/10.1016/bs.adcom.2020.03.005
Hajiamini SShirazi B(2019)Evaluation of a Practical Markov model-based Methodology for Energy Efficiency in Multicore Systems2019 Tenth International Green and Sustainable Computing Conference (IGSC)10.1109/IGSC48788.2019.8957190(1-8)Online publication date: Oct-2019
https://doi.org/10.1109/IGSC48788.2019.8957190
Hajiamini SShirazi BCrandall AGhasemzadeh HCain C(2018)Impact of Cache Voltage Scaling on Energy-Time Pareto Frontier in Multicore SystemsSustainable Computing: Informatics and Systems10.1016/j.suscom.2018.02.01118(54-65)Online publication date: Jun-2018
https://doi.org/10.1016/j.suscom.2018.02.011
Catania VMineo AMonteleone SPalesi MPatti D(2017)Improving Energy Efficiency in Wireless Network-on-Chip ArchitecturesACM Journal on Emerging Technologies in Computing Systems10.1145/313880714:1(1-24)Online publication date: 3-Nov-2017
https://dl.acm.org/doi/10.1145/3138807
Dehghani AJamshidi K(2016)A Novel Approach to Optimize Fault-Tolerant Hybrid Wireless Network-on-Chip ArchitecturesACM Journal on Emerging Technologies in Computing Systems10.1145/281457212:4(1-37)Online publication date: 15-Mar-2016
https://dl.acm.org/doi/10.1145/2814572
Mineo APalesi MAscia GCatania V(2016)Runtime Tunable Transmitting Power Technique in mm-Wave WiNoC ArchitecturesIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2015.244927524:4(1535-1545)Online publication date: Apr-2016
https://doi.org/10.1109/TVLSI.2015.2449275
Hajiamini SShirazi BRilvan M(2015)Enhancing EDP of multicore processors through DVFSProceedings of the 2015 Sixth International Green and Sustainable Computing Conference (IGSC)10.1109/IGCC.2015.7393678(1-6)Online publication date: 14-Dec-2015
https://dl.acm.org/doi/10.1109/IGCC.2015.7393678

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