research-article

RayCore: A Ray-Tracing Hardware Architecture for Mobile Devices

Authors:

Hyuck-Joo Kwon,

Cheol-Ho Jeong,

Dinesh Manocha,

Woo-Chan ParkAuthors Info & Claims

ACM Transactions on Graphics (TOG), Volume 33, Issue 5

Article No.: 162, Pages 1 - 15

https://doi.org/10.1145/2629634

Published: 23 September 2014 Publication History

Abstract

We present RayCore, a mobile ray-tracing hardware architecture. RayCore facilitates high-quality rendering effects, such as reflection, refraction, and shadows, on mobile devices by performing real-time Whitted ray tracing. RayCore consists of two major components: ray-tracing units (RTUs) based on a unified traversal and intersection pipeline and a tree-building unit (TBU) for dynamic scenes. The overall RayCore architecture offers considerable benefits in terms of die area, memory access, and power consumption. We have evaluated our architecture based on FPGA and ASIC evaluations and demonstrate its performance on different benchmarks. According to the results, our architecture demonstrates high performance per unit area and unit energy, making it highly suitable for use in mobile devices.

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Su YGuo HYan RWang YWang YXiao NChen GZhang WHuang L(2024)QuickTree: A Fast Hardware BVH Construction EngineProceedings of the 21st ACM International Conference on Computing Frontiers10.1145/3649153.3649292(294-297)Online publication date: 7-May-2024
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Yan RSu YGuo HLü YWang JXiao NShen LWang YHuang L(2024)MPRTA: An Efficient Multilevel Parallel Mobile Accelerator for High-Performance Ray TracingIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2023.333471132:2(396-400)Online publication date: 1-Feb-2024
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Index Terms

RayCore: A Ray-Tracing Hardware Architecture for Mobile Devices
1. Computing methodologies
  1. Computer graphics
    1. Graphics systems and interfaces
      1. Graphics processors
    2. Rendering
      1. Ray tracing

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cover image ACM Transactions on Graphics

ACM Transactions on Graphics Volume 33, Issue 5

August 2014

152 pages

ISSN:0730-0301

EISSN:1557-7368

DOI:10.1145/2672594

Editor:
Julie Dorsey
Yale University

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Publication History

Published: 23 September 2014

Accepted: 01 March 2014

Received: 01 December 2013

Published in TOG Volume 33, Issue 5

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Siliconarts and the Basic Science Research Program
National Research Foundation of Korea
National Science Foundation
Army Research Office

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Yan RSu YGuo HLü YWang JXiao NShen LWang YHuang L(2024)MPRTA: An Efficient Multilevel Parallel Mobile Accelerator for High-Performance Ray TracingIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2023.333471132:2(396-400)Online publication date: 1-Feb-2024
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Guo SSapatnekar SGu J(2024)Software-Hardware Codesign of Ray-Tracing Accelerator for Edge AR/VR With Viewpoint-Focused 3D Construction and Efficient Data Structure2024 IEEE 67th International Midwest Symposium on Circuits and Systems (MWSCAS)10.1109/MWSCAS60917.2024.10658949(267-271)Online publication date: 11-Aug-2024
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