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RapidSmith 2: A Framework for BEL-level CAD Exploration on Xilinx FPGAs

Published: 22 February 2015 Publication History

Abstract

RapidSmith is an open-source framework that allows for the exploration of novel approaches to the FPGA CAD flow for Xilinx devices. However, RapidSmith has poor support for manipulating designs below the slice level. In this paper, we highlight many of the projects RapidSmith enables and present extensions incorporated into "RapidSmith 2" that expose LUTs and flip-flops for direct manipulation in custom-built CAD tools. To demonstrate the utility of RapidSmith 2 we present the results of work to identify BELs in a design which must be clustered together and a tool that does pre-packing clustering accordingly.

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  • (2024)An Open-Source Tool to Model and Explore Complex Routing Architecture for FPGA2024 2nd International Symposium of Electronics Design Automation (ISEDA)10.1109/ISEDA62518.2024.10617494(734-739)Online publication date: 10-May-2024
  • (2023)PyXEL: Exploring Bitstream Analysis to Assess and Enhance the Robustness of Designs on FPGAs2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)10.1109/SMACD58065.2023.10192116(1-4)Online publication date: 3-Jul-2023
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  1. RapidSmith 2: A Framework for BEL-level CAD Exploration on Xilinx FPGAs

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      cover image ACM Conferences
      FPGA '15: Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
      February 2015
      292 pages
      ISBN:9781450333153
      DOI:10.1145/2684746
      Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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      Published: 22 February 2015

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      Author Tags

      1. cad framework
      2. fpga
      3. rapidsmith
      4. rapidsmith 2
      5. xilinx
      6. xilinx design language

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      FPGA '15 Paper Acceptance Rate 20 of 102 submissions, 20%;
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      Cited By

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      • (2024)NXRouting: A GPU-Enhanced CAD Tool for European Radiation-Hardened FPGAsElectronics10.3390/electronics1314280313:14(2803)Online publication date: 16-Jul-2024
      • (2024)An Open-Source Tool to Model and Explore Complex Routing Architecture for FPGA2024 2nd International Symposium of Electronics Design Automation (ISEDA)10.1109/ISEDA62518.2024.10617494(734-739)Online publication date: 10-May-2024
      • (2023)PyXEL: Exploring Bitstream Analysis to Assess and Enhance the Robustness of Designs on FPGAs2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)10.1109/SMACD58065.2023.10192116(1-4)Online publication date: 3-Jul-2023
      • (2022)FireNN: Neural Networks Reliability Evaluation on Hybrid PlatformsIEEE Transactions on Emerging Topics in Computing10.1109/TETC.2022.3152668(1-1)Online publication date: 2022
      • (2021)RWRoute: An Open-source Timing-driven Router for Commercial FPGAsACM Transactions on Reconfigurable Technology and Systems10.1145/349123615:1(1-27)Online publication date: 29-Nov-2021
      • (2021)Automatic Floorplanning and Standalone Generation of Bitstream-Level IP CoresIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2020.302354829:1(38-50)Online publication date: Jan-2021
      • (2020)VTR 8ACM Transactions on Reconfigurable Technology and Systems10.1145/338861713:2(1-55)Online publication date: 1-Jun-2020
      • (2020)ReCoFused partial reconfiguration for secure moving-target countermeasures on FPGAsSN Applied Sciences10.1007/s42452-020-3003-x2:8Online publication date: 10-Jul-2020
      • (2019)Maverick: A Stand-Alone CAD Flow for Partially Reconfigurable FPGA Modules2019 IEEE 27th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)10.1109/FCCM.2019.00012(9-16)Online publication date: Apr-2019
      • (2019)Third Party CAD Tools for FPGA Design—A Survey of the Current LandscapeIntelligent Information and Database Systems10.1007/978-3-030-17227-5_25(353-367)Online publication date: 29-Mar-2019
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