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REDELF: An Energy-Efficient Deadlock-Free Routing for 3D NoCs with Partial Vertical Connections

Authors:

Jinho Lee,

Kyungsu Kang,

Kiyoung ChoiAuthors Info & Claims

ACM Journal on Emerging Technologies in Computing Systems (JETC), Volume 12, Issue 3

Article No.: 26, Pages 1 - 22

https://doi.org/10.1145/2751560

Published: 21 September 2015 Publication History

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Abstract

3D integrated circuits (3D ICs) using through-silicon vias (TSVs) allow to envision the stacking of dies with different functions and technologies, using as an interconnect backbone a 3D network-on-chip (NoC). However, partial vertical connection in 3D NoCs seems unavoidable because of the large overhead of TSV itself (e.g., large footprint, low fabrication yield, additional fabrication processes) as well as the heterogeneity in dimension. This article proposes an energy-efficient deadlock-free routing algorithm for 3D mesh topologies where vertical connections partially exist. By introducing some rules for selecting elevators (i.e., vertical links between dies), the routing algorithm can eliminate the dedicated virtual channel requirement. In this article, the rules themselves as well as the proof of deadlock freedom are given. By eliminating the virtual channels for deadlock avoidance, the proposed routing algorithm reduces the energy consumption by 38.9% compared to a conventional routing algorithm. When the virtual channel is used for reducing the head-of-line blocking, the proposed routing algorithm increases performance by up to 23.1% and 6.9% on average.

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Cited By

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Taheri EKim RNikdast M(2023)AdEle+: An Adaptive Congestion-and-Energy-Aware Elevator Selection for Partially Connected 3D Networks-on-ChipIEEE Transactions on Computers10.1109/TC.2023.324826072:8(2278-2292)Online publication date: 1-Aug-2023
https://dl.acm.org/doi/10.1109/TC.2023.3248260
Fu YZhang CSong WChen QChen HZhou MLi L(2021)Optimizing Vertical Link Placement and Congestion Aware Dynamic Elevator Assignment for Partially Connected 3D-NoCsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2020.303833840:10(1957-1970)Online publication date: Oct-2021
https://doi.org/10.1109/TCAD.2020.3038338
Taheri EKim RNikdast M(2021)AdEle: An Adaptive Congestion-and-Energy-Aware Elevator Selection for Partially Connected 3D NoCs2021 58th ACM/IEEE Design Automation Conference (DAC)10.1109/DAC18074.2021.9586174(67-72)Online publication date: 5-Dec-2021
https://doi.org/10.1109/DAC18074.2021.9586174
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Index Terms

REDELF: An Energy-Efficient Deadlock-Free Routing for 3D NoCs with Partial Vertical Connections
1. Networks
  1. Network protocols

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Reviews

Reviewer: SeonYeong Han

Network-on-chip (NoC) is used for routing packets among multiple functional modules such as memory blocks, processors, communication blocks, and so on in 3D integrated circuits (ICs). A 3D IC installs vertical links on routers using through-silicon vias to transfer packets among different layers. Traditionally, each vertical link includes two virtual channels for ascending and descending packets to avoid deadlock. Since a virtual channel takes space, energy, and delay cost, there is a need to reduce the number of required virtual channels. The major contribution of this paper is the algorithm to eliminate the dependency on the virtual channels (VCs) for deadlock-free routing. The authors proposed routing rule sets under the assumption of mesh network topology that restricts the selection of a vertical link so that no two packets are transferred through the same vertical link. Based on the rule sets, deadlock-free routing is achieved without VCs. The rule sets are extended for irregular partial vertical links and heterogeneous mesh layers. To evaluate the performance and energy consumption, the proposed solution is compared with a baseline elevator-first algorithm and the proposed algorithm with VCs. Simulation results show that the proposed algorithm with VCs outperforms the proposed one without VCs and the baseline because the proposed algorithm uses the virtual channels efficiently. Overall, the proposed algorithm shows benefits in performance and energy saving. Since the algorithm restricts the selection of the vertical links, it is possible to select a non-shortest path. It is interesting to see the non-shortest path selection policy results in reduced delay and energy consumption. The major reason for this is that having no competition in a vertical link reduces the overall running time. As noted in the paper, the relative benefit decreases as the number of VCs increases because the possibility of competition in a vertical link decreases. Another interesting point in this paper is that the VCs are advantageous to the proposed algorithm even though the algorithm was designed to eliminate the dependency on the VCs. The original algorithm without VCs even shows worse performance than the baseline. For better understanding about the impact of the VCs, it would be interesting to know if there are simulation results showing the performance and energy consumption when VCs are installed in only part of vertical links. Online Computing Reviews Service

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Published In

cover image ACM Journal on Emerging Technologies in Computing Systems

ACM Journal on Emerging Technologies in Computing Systems Volume 12, Issue 3

Special Issue on Cross-Layer System Design and Regular Papers

September 2015

207 pages

ISSN:1550-4832

EISSN:1550-4840

DOI:10.1145/2828988

Editor:
Krishnendu Chakrabarty
Duke University, USA

Issue’s Table of Contents

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Association for Computing Machinery

New York, NY, United States

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ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 21 September 2015

Accepted: 01 March 2015

Revised: 01 January 2015

Received: 01 October 2014

Published in JETC Volume 12, Issue 3

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National Research Foundation of Korea (NRF)
Korean government (MEST)

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Cited By

View all

Taheri EKim RNikdast M(2023)AdEle+: An Adaptive Congestion-and-Energy-Aware Elevator Selection for Partially Connected 3D Networks-on-ChipIEEE Transactions on Computers10.1109/TC.2023.324826072:8(2278-2292)Online publication date: 1-Aug-2023
https://dl.acm.org/doi/10.1109/TC.2023.3248260
Fu YZhang CSong WChen QChen HZhou MLi L(2021)Optimizing Vertical Link Placement and Congestion Aware Dynamic Elevator Assignment for Partially Connected 3D-NoCsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2020.303833840:10(1957-1970)Online publication date: Oct-2021
https://doi.org/10.1109/TCAD.2020.3038338
Taheri EKim RNikdast M(2021)AdEle: An Adaptive Congestion-and-Energy-Aware Elevator Selection for Partially Connected 3D NoCs2021 58th ACM/IEEE Design Automation Conference (DAC)10.1109/DAC18074.2021.9586174(67-72)Online publication date: 5-Dec-2021
https://doi.org/10.1109/DAC18074.2021.9586174
Fu YChen QHe GChen KLut ZZhang CLi L(2019)Congestion-Aware Dynamic Elevator Assignment for Partially Connected 3D-NoCs2019 IEEE International Symposium on Circuits and Systems (ISCAS)10.1109/ISCAS.2019.8702434(1-5)Online publication date: May-2019
https://doi.org/10.1109/ISCAS.2019.8702434
Charif ACoelho AEbrahimi MBagherzadeh NZergainoh N(2018)First-Last: A Cost-Effective Adaptive Routing Solution for TSV-Based Three-Dimensional Networks-on-ChipIEEE Transactions on Computers10.1109/TC.2018.282226967:10(1430-1444)Online publication date: 1-Oct-2018
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Salamat RKhayambashi MEbrahimi MBagherzadeh N(2018)LEAD: An Adaptive 3D-NoC Routing Algorithm with Queuing-theory Based Analytical VerificationIEEE Transactions on Computers10.1109/TC.2018.2801298(1-1)Online publication date: 2018
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Bahrebar PStroobandt D(2018)3D MAX: A Maximally Adaptive Routing Method for VC-less 3D Mesh-based Networks-on-Chip2018 11th International Workshop on Network on Chip Architectures (NoCArc)10.1109/NOCARC.2018.8541255(1-6)Online publication date: Oct-2018
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Yin JLin ZKayiran OPoremba MAltaf MJerger NLoh G(2018)Modular routing design for chiplet-based systemsProceedings of the 45th Annual International Symposium on Computer Architecture10.1109/ISCA.2018.00066(726-738)Online publication date: 2-Jun-2018
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Haque WVezina AFontaine M(2018)Topological Response to Deadlock Detection and Resolution in Real-Time Database Systems2018 IEEE International Conference on Internet of Things (iThings) and IEEE Green Computing and Communications (GreenCom) and IEEE Cyber, Physical and Social Computing (CPSCom) and IEEE Smart Data (SmartData)10.1109/Cybermatics_2018.2018.00312(1880-1887)Online publication date: Jul-2018
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