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Communication refinement in video systems on chip

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W. J. M. SmitsAuthors Info & Claims

CODES '99: Proceedings of the seventh international workshop on Hardware/software codesign

Pages 142 - 146

https://doi.org/10.1145/301177.301511

Published: 01 March 1999 Publication History

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Pimentel A(2008)The Artemis workbench for system-level performance evaluation of embedded systemsInternational Journal of Embedded Systems10.1504/IJES.2008.0202993:3(181)Online publication date: 2008
https://doi.org/10.1504/IJES.2008.020299
Pasricha SDutt N(2008)On-Chip Communication Architecture Refinement and Interface SynthesisOn-Chip Communication Architectures10.1016/B978-0-12-373892-9.00009-8(341-366)Online publication date: 2008
https://doi.org/10.1016/B978-0-12-373892-9.00009-8
Pimentel AErbas CPolstra S(2006)A Systematic Approach to Exploring Embedded System Architectures at Multiple Abstraction LevelsIEEE Transactions on Computers10.1109/TC.2006.1655:2(99-112)Online publication date: 1-Feb-2006
https://dl.acm.org/doi/10.1109/TC.2006.16
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Index Terms

Communication refinement in video systems on chip
1. Hardware
  1. Electronic design automation
    1. Physical design (EDA)
  2. Hardware validation

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Present days cores composing a System-on-Chip might be interconnected by means of both dedicated channels or shared buses. Nevertheless, future systems will have strong requirements on reusability and communication performance, which will constrain the ...

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Published In

CODES '99: Proceedings of the seventh international workshop on Hardware/software codesign

March 1999

216 pages

ISBN:1581131321

DOI:10.1145/301177

Chairmen:
Ahmed Amine Jerraya
TIMA Lab, France
,
Luciano Lavagno
Politecnico di Torino, Turin, Italy
,
Frank Vahid
Univ. of California, Riverside

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Published: 01 March 1999

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CODES99: International Conference on Hardware/Software Codesign

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CODES '99 Paper Acceptance Rate 40 of 98 submissions, 41%;

Overall Acceptance Rate 280 of 864 submissions, 32%

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Pimentel A(2008)The Artemis workbench for system-level performance evaluation of embedded systemsInternational Journal of Embedded Systems10.1504/IJES.2008.0202993:3(181)Online publication date: 2008
https://doi.org/10.1504/IJES.2008.020299
Pasricha SDutt N(2008)On-Chip Communication Architecture Refinement and Interface SynthesisOn-Chip Communication Architectures10.1016/B978-0-12-373892-9.00009-8(341-366)Online publication date: 2008
https://doi.org/10.1016/B978-0-12-373892-9.00009-8
Pimentel AErbas CPolstra S(2006)A Systematic Approach to Exploring Embedded System Architectures at Multiple Abstraction LevelsIEEE Transactions on Computers10.1109/TC.2006.1655:2(99-112)Online publication date: 1-Feb-2006
https://dl.acm.org/doi/10.1109/TC.2006.16
Chen XHsieh HBalarin F(2006)Verification approach of metropolis design framework for embedded systemsInternational Journal of Parallel Programming10.1007/s10766-005-0002-x34:1(3-27)Online publication date: 1-Feb-2006
https://dl.acm.org/doi/10.1007/s10766-005-0002-x
Marculescu RPedram MHenkel J(2004)Distributed Multimedia System DesignProceedings of the conference on Design, automation and test in Europe - Volume 210.5555/968879.969212Online publication date: 16-Feb-2004
https://dl.acm.org/doi/10.5555/968879.969212
Pimentel AErbas CGetreu IFix LLavagno L(2003)An IDF-based trace transformation method for communication refinementProceedings of the 40th annual Design Automation Conference10.1145/775832.775937(402-407)Online publication date: 2-Jun-2003
https://dl.acm.org/doi/10.1145/775832.775937
Chen XHsieh HBalarin FWatanabe Y(2003)Formal Verification for Embedded System DesignsDesign Automation for Embedded Systems10.1023/B:DAEM.0000003959.60964.4d8:2-3(139-153)Online publication date: 1-Jun-2003
https://dl.acm.org/doi/10.1023/B%3ADAEM.0000003959.60964.4d
Pimentel APolstra STerpstra Fvan Halderen ACoffland JHertzberger L(2002)Towards efficient design space exploration of heterogeneous embedded media systemsEmbedded processor design challenges10.5555/765198.765203(57-73)Online publication date: 1-Jan-2002
https://dl.acm.org/doi/10.5555/765198.765203
Pimentel APolstra STerpstra Fvan Halderen ACoffland JHertzberger L(2002)Towards Efficient Design Space Exploration of Heterogeneous Embedded Media SystemsEmbedded Processor Design Challenges10.1007/3-540-45874-3_4(57-73)Online publication date: 23-Apr-2002
https://doi.org/10.1007/3-540-45874-3_4
Lieverse PWolf PDeprettere EMadsen JHenkel JHu X(2001)A trace transformation technique for communication refinementProceedings of the ninth international symposium on Hardware/software codesign10.1145/371636.371703(134-139)Online publication date: 25-Apr-2001
https://dl.acm.org/doi/10.1145/371636.371703
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COSY communication IP's

A generic packet router IP for multi-processors network-on-chip

A Study on Communication Issues for Systems-on-Chip

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COSY communication IP's

A generic packet router IP for multi-processors network-on-chip

A Study on Communication Issues for Systems-on-Chip

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