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Fast prototyping: a system design flow applied to a complex system-on-chip multiprocessor design

Published: 01 June 1999 Publication History
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    References

    [1]
    M. Genoe, Alcatel, "Requirements capturing and specification of Systems-on-Chip", MEDEA/ESPRIT conference on HW/SW codesign, 1998
    [2]
    S. Tsasakou, C. Dre, H. Kharatanasis, A. Birbas, Univ. of Patras/Intracom SA, "Combined assessment of an industrial current practice and CoWare's methodology to the codesign/cosimulation problem", MEDEA/ ESPRIT conference on HW/SW codesign, 1998
    [3]
    C. Berthet, G. Mas, F. Pogodalla & al., STMicroelectronics, "Functional verification methodology of Chameleon processor", 33rd DAC, 1996
    [4]
    K. Hashmi, A. C. Bruce, "Design and use of a systemlevel specification and verification methodology", EURO-DAC 95
    [5]
    J. Monaco, D. Holloway, R. Raina, "Functional verification methodology for the PowerPC 604 microprocessor", 33rd DAC, 1996
    [6]
    E Paulin, "A flexible hardware/software development environment and its application to consumer multimedia products designs", CODES/CASHE'98
    [7]
    A. Sangiovanni-Vincentelli, J. Liu, M. Lajolo, "Software timing analysis using HW/SW cosimulation and instruction set simulator", CODES/CASHE'98
    [8]
    A.A. Jerraya, J.M. Daveau, G. Marchioro, "hardware/ software codesign of an ATM network interface card: a case study", CODES/CASHE'99
    [9]
    M. Benjamin, D. Geist, A. Hartman, G. Mas, R. Smeets, Y. Wolfsthal, STMicroelectronics and IBM Science and Technology, Haifa Research Lab. "A Study in Coverage-Driven Test Generation", DAC'99

    Cited By

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    • (2007)A System Level Framework for Monitoring and Self Diagnosis in ESPACENETProceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems10.1109/AHS.2007.18(677-681)Online publication date: 5-Aug-2007
    • (2006)Debug support for complex systems on-chip: a reviewIEE Proceedings - Computers and Digital Techniques10.1049/ip-cdt:20050194153:4(197)Online publication date: 2006
    • (2005)A transaction-based unified architecture for simulation and emulationIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2004.84076313:2(278-287)Online publication date: 1-Feb-2005
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    1. Fast prototyping: a system design flow applied to a complex system-on-chip multiprocessor design

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        cover image ACM Conferences
        DAC '99: Proceedings of the 36th annual ACM/IEEE Design Automation Conference
        June 1999
        1000 pages
        ISBN:1581131097
        DOI:10.1145/309847
        Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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        Publication History

        Published: 01 June 1999

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        Author Tags

        1. fast prototyping
        2. hardware/software (HW/SW) co-design
        3. system design
        4. system modeling
        5. system verification
        6. virtual component (VC) re-use

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        DAC99
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        DAC99: The 36th ACM/IEEE-CAS/EDAC Design Automation Conference
        June 21 - 25, 1999
        Louisiana, New Orleans, USA

        Acceptance Rates

        DAC '99 Paper Acceptance Rate 154 of 451 submissions, 34%;
        Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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        Cited By

        View all
        • (2007)A System Level Framework for Monitoring and Self Diagnosis in ESPACENETProceedings of the Second NASA/ESA Conference on Adaptive Hardware and Systems10.1109/AHS.2007.18(677-681)Online publication date: 5-Aug-2007
        • (2006)Debug support for complex systems on-chip: a reviewIEE Proceedings - Computers and Digital Techniques10.1049/ip-cdt:20050194153:4(197)Online publication date: 2006
        • (2005)A transaction-based unified architecture for simulation and emulationIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2004.84076313:2(278-287)Online publication date: 1-Feb-2005
        • (2003)Hybrid hierarchical timing closure methodology for a high performance and low power DSPProceedings of the 40th annual Design Automation Conference10.1145/775832.776046(850-855)Online publication date: 2-Jun-2003
        • (2003)On-chip debug support for embedded Systems-on-ChipProceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.10.1109/ISCAS.2003.1206375(V-565-V-568)Online publication date: 2003
        • (2002)Speedup analysis in simulation-emulation co-operation2002 IEEE International Conference on Field-Programmable Technology, 2002. (FPT). Proceedings.10.1109/FPT.2002.1188719(394-398)Online publication date: 2002
        • (2002)Interface synthesis between software chip model and target boardJournal of Systems Architecture: the EUROMICRO Journal10.1016/S1383-7621(02)00065-648:1-3(49-57)Online publication date: 1-Sep-2002
        • (2001)A "Design for Verification" MethodologyProceedings of the 2nd International Symposium on Quality Electronic Design10.5555/558593.850115Online publication date: 26-Mar-2001
        • (2001)Performance improvement of multi-processor systems cosimulation based on SW analysisProceedings of the conference on Design, automation and test in Europe10.5555/367072.367945(749-753)Online publication date: 13-Mar-2001
        • (2001)Network processorsProceedings of the conference on Design, automation and test in Europe10.5555/367072.367302(420-429)Online publication date: 13-Mar-2001
        • Show More Cited By

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