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DudeTx: Durable Transactions Made Decoupled

Authors:

Mingxing Zhang,

Jinglei RenAuthors Info & Claims

ACM Transactions on Storage (TOS), Volume 14, Issue 1

Article No.: 7, Pages 1 - 28

https://doi.org/10.1145/3177920

Published: 04 April 2018 Publication History

Abstract

Emerging non-volatile memory (NVM) offers non-volatility, byte-addressability, and fast access at the same time. It is suggested that programs should access NVM directly through CPU load and store instructions. To guarantee crash consistency, durable transactions are regarded as a common choice of applications for accessing persistent memory data. However, existing durable transaction systems employ either undo logging, which requires a fence for every memory write, or redo logging, which requires intercepting all memory reads within transactions. Both approaches incur significant overhead.

This article presents DudeTx, a crash-consistent durable transaction system that avoids the drawbacks of both undo and redo logging. DudeTx uses shadow DRAM to decouple the execution of a durable transaction into three fully asynchronous steps. The advantage is that only minimal fences and no memory read instrumentation are required. This design enables an out-of-the-box concurrency control mechanism, transactional memory or fine-grained locks, to be used as an independent component. The evaluation results show that DudeTx adds durability to a software transactional memory system with only 7.4%--24.6% throughput degradation. Compared to typical existing durable transaction systems, DudeTx provides 1.7× --4.4× higher throughput. Moreover, DudeTx can be implemented with hardware transactional memory or lock-based concurrency control, leading to a further 1.7× and 3.3× speedup, respectively.

References

[1]

H. Akinaga, and H. Shima. 2010. Resistive random access memory (ReRAM) based on metal oxides. Proc. IEEE 98, 12 (2010).

[2]

D. Apalkov, A. Khvalkovskiy, S. Watts, V. Nikitin, X. Tang, D. Lottis, K. Moon, X. Luo, E. Chen, A. Ong, A. Driskill-Smith, and M. Krounbi. 2013. Spin-transfer torque magnetic random access memory (STT-MRAM). ACM J. Emerg. Technol. Comput. Syst. 9, 2 (May 2013), 13:1--13:35.

Digital Library

[3]

J. Arulraj, A. Pavlo, and S. R. Dulloor. 2015. Let’s talk about storage and recovery methods for non-volatile memory database systems. In Proceedings of the 2015 ACM SIGMOD International Conference on Management of Data (SIGMOD’15), pp. 707--722.

Digital Library

[4]

B. Atikoglu, Y. Xu, E. Frachtenberg, S. Jiang, and M. Paleczny. 2012. Workload analysis of a large-scale key-value store. In Proceedings of the 12th ACM SIGMETRICS/PERFORMANCE Joint International Conference on Measurement and Modeling of Computer Systems (SIGMETRICS’12), pp. 53--64.

Digital Library

[5]

G. Atwood. 2011. Current and emerging memory technology landscape. Flash Memory Summit, 9--11.

[6]

A. Belay, A. Bittau, A. Mashtizadeh, D. Terei, D. Mazières, and C. Kozyrakis. 2012. Dune: Safe user-level access to privileged CPU features. In Proceedings of the 10th USENIX Conference on Operating Systems Design and Implementation (OSDI’12), pp. 335--348. https://github.com/ix-project/dune.

Digital Library

[7]

P. A. Bernstein, V. Hadzilacos, and N. Goodman. 1986.Concurrency Control and Recovery in Database Systems. Addison-Wesley Longman Publishing Co., Inc., Boston, MA.

Digital Library

[8]

H.-J. Boehm, and D. R. Chakrabarti, Persistence programming models for non-volatile memory. 2016. In Proceedings of the 2016 ACM SIGPLAN International Symposium on Memory Management, ACM, pp. 55--67.

Digital Library

[9]

D. R. Chakrabarti, H.-J. Boehm, and K. Bhandari. 2014. Atlas: Leveraging locks for non-volatile memory consistency. In Proceedings of the 2014 ACM International Conference on Object Oriented Programming Systems Languages and Applications (OOPSLA’14). ACM, New York, pp. 433--452.

Digital Library

[10]

A. Chatzistergiou, M. Cintra, and S. D. Viglas. 2015. Rewind: Recovery write-ahead system for in-memory non-volatile data-structures. Proceedings of the VLDB Endowment 8, 5 (2015), 497--508.

Digital Library

[11]

S. Chen, P. B. Gibbons, and S. Nath. 2011. Rethinking database algorithms for phase change memory. In Online Proceedings of the 5th Biennial Conference on Innovative Data Systems Research (ICIDR’11), pp. 21--31.

[12]

P. Chi, W.-C. Lee, and Y. Xie. 2014. Making B+-tree efficient in PCM-based main memory. In Proceedings of the 2014 International Symposium on Low Power Electronics and Design. ACM, pp. 69--74.

Digital Library

[13]

V. Chidambaram, T. S. Pillai, A. C. Arpaci-Dusseau, and R. H. Arpaci-Dusseau. 2013. Optimistic crash consistency. In Proceedings of the 24th ACM Symposium on Operating Systems Principles. ACM, pp. 228--243.

Digital Library

[14]

J. Coburn, A. M. Caulfield, A. Akel, L. M. Grupp, R. K. Gupta, R. Jhala, and S. Swanson. 2011. NV-Heaps: Making persistent objects fast and safe with next-generation, non-volatile memories. ACM Sigplan Notices, 46 3 (2011), 105--118.

Digital Library

[15]

Y. Collet. 2013. Lz4: Extremely fast compression algorithm. code. google. com.

[16]

B. F. Cooper, A. Silberstein, E. Tam, R. Ramakrishnan, and R. Sears. 2010. Benchmarking cloud serving systems with YCSB. In Proceedings of the 1st ACM Symposium on Cloud Computing. ACM, pp. 143--154.

Digital Library

[17]

C. Cunha, A. Bestavros, and M. Crovella. 1995.Characteristics of WWW Client-Based Traces. Computer Science Department Technical Report BU-CS-95-010, Boston University.

Digital Library

[18]

A. Dragojević, D. Narayanan, E. B. Nightingale, M. Renzelmann, A. Shamis, A. Badam, and M. Castro. 2015. No compromises: Distributed transactions with consistency, availability, and performance. In Proceedings of the 25th Symposium on Operating Systems Principles. ACM, pp. 54--70.

Digital Library

[19]

S. R. Dulloor, S. Kumar, A. Keshavamurthy, P. Lantz, D. Reddy, R. Sankaran, and J. Jackson. 2014. System software for persistent memory. In Proceedings of the 9th European Conference on Computer Systems (EuroSys’14). ACM, New York, pp. 15:1--15:15.

Digital Library

[20]

S. Eilert, M. Leinwander, and G. Crisenza. 2009. Phase change memory: A new memory enables new memory usage models. In Proceedings of the 2009 IEEE International Memory Workshop. IEEE, pp. 1--2.

[21]

P. Felber, C. Fetzer, P. Marlier, and T. Riegel. 2010. Time-based software transactional memory. IEEE Transactions on Parallel and Distributed Systems 21, 12 (2010), 1793--1807.

Digital Library

[22]

P. Felber, C. Fetzer, and T. Riegel. 2008. Dynamic performance tuning of word-based software transactional memory. In Proceedings of the 13th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP’08), pp. 237--246.

Digital Library

[23]

R. F. Freitas, and W. W. Wilcke. 2008. Storage-class memory: The next storage system technology. IBM Journal of Research and Development 52, 4/5 (2008), 439.

Digital Library

[24]

E. R. Giles, K. Doshi, and P. Varman. 2015. Softwrap: A lightweight framework for transactional support of storage class memory. In Proceedings of the 2015 31st Symposium on Mass Storage Systems and Technologies (MSST’15). IEEE, pp. 1--14.

[25]

T. Haerder, and A. Reuter. 1983. Principles of transaction-oriented database recovery. ACM Computing Surveys (CSUR) 15, 4 (1983), 287--317.

Digital Library

[26]

M. Herlihy, and J. E. B. Moss. 1993. Transactional memory: Architectural support for lock-free data structures. In Proceedings of the 20th Annual International Symposium on Computer Architecture (ISCA’93), pp. 289--300.

Digital Library

[27]

Q. Hu, J. Ren, A. Badam, and T. Moscibroda. 2017. Log-structured non-volatile main memory. In Proceedings of the 2017 USENIX Conference on Usenix Annual Technical Conference (USENIX ATC’17), pp. 703--717.

Digital Library

[28]

Intel. NVM Library. 2014. Retrieved July 2016 from https://github.com/pmem/nvml.

[29]

Intel. 2012. Architecture instruction set extensions programming reference. Intel Corporation (Feb. 2012).

[30]

Intel Corp. 2015. Intel and Micron Produce Breakthrough Memory Technology.

[31]

International Technology Roadmap for Semiconductors (ITRS). 2011. Process, integration, devices and structures. Retrieved July 2016 from http://www.itrs.net/Links/2011ITRS/2011Chapters/2011PIDS.pdf.

[32]

R. Johnson, I. Pandis, R. Stoica, M. Athanassoulis, and A. Ailamaki. 2010. Aether: A scalable approach to logging. Proc. VLDB Endow. 3, 1-2 (Sept. 2010), 681--692.

Digital Library

[33]

H. Kimura. 2015. FOEDUS: OLTP engine for a thousand cores and nvram. In Proceedings of the 2015 ACM SIGMOD International Conference on Management of Data. ACM, pp. 691--706.

Digital Library

[34]

A. Kolli, S. Pelley, A. Saidi, P. M. Chen, and T. F. Wenisch. 2016. High-performance transactions for persistent memories. In Proceedings of the 21st International Conference on Architectural Support for Programming Languages and Operating Systems. ACM, pp. 399--411.

Digital Library

[35]

E. Kültürsay, M. Kandemir, A. Sivasubramaniam, and O. Mutlu. 2013. Evaluating STT-RAM as an energy-efficient main memory alternative. In Proceeding of the 2013 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS’13), pp. 256--267.

[36]

B. Lee, P. Zhou, J. Yang, Y. Zhang, B. Zhao, E. Ipek, O. Mutlu, and D. Burger. 2010. Phase-change technology and the future of main memory. IEEE Micro 30 (Jan. 2010), 131--141.

Digital Library

[37]

H. Lim, B. Fan, D. G. Andersen, and M. Kaminsky. 2011. SILT: A memory-efficient, high-performance key-value store. In Proceedings of the 23rd ACM Symposium on Operating Systems Principles (SOSP’11), pp. 1--13.

Digital Library

[38]

M. Liu, M. Zhang, K. Chen, X. Qian, Y. Wu, and J. Ren. 2017. DudeTM: Building durable transactions with decoupling for persistent memory. In Proceedings of the 22nd International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS’17). ACM, pp. 329--343.

Digital Library

[39]

Y. Lu, J. Shu, J. Guo, S. Li, and O. Mutlu. 2013. LightTx: A lightweight transactional design in flash-based SSDS to support flexible transactions. In Proceedings of the 2013 IEEE 31st International Conference on Computer Design (ICCD’13). IEEE, pp. 115--122.

[40]

Y. Lu, J. Shu, and L. Sun. 2015. Blurred persistence in transactional persistent memory. In Proceedings of the 2015 31st Symposium on Mass Storage Systems and Technologies (MSST’15). IEEE, pp. 1--13.

[41]

Y. Lu, J. Shu, L. Sun, and O. Mutlu. 2014. Loose-ordering consistency for persistent memory. In Proceedings of the 2014 32nd IEEE International Conference on Computer Design (ICCD’14). IEEE, pp. 216--223.

[42]

S. Mittal, and J. S. Vetter. 2016. A survey of software techniques for using non-volatile memories for storage and main memory systems. IEEE Transactions on Parallel and Distributed Systems, 27, 5 (2016), 1537--1550.

Digital Library

[43]

K. E. Moore, J. Bobba, M. J. Moravan, M. D. Hill, D. A. Wood, et al. 2006. LogTM: Log-based transactional memory. In Proceedings of HPCA, Vol. 6, pp. 254--265.

[44]

D. Narayanan, and O. Hodson. 2012. Whole-system persistence. ACM SIGARCH Computer Architecture News 40, 1 (2012), 401--410.

Digital Library

[45]

S. Pelley, P. M. Chen, and T. F. Wenisch. 2014. Memory persistency. ACM SIGARCH Computer Architecture News 42, 3 (2014), 265--276.

Digital Library

[46]

M. K. Qureshi, V. Srinivasan, and J. A. Rivers. 2009. Scalable high performance main memory system using phase-change memory technology. In Proceedings of the 36th Annual International Symposium on Computer Architecture (ISCA’09), pp. 24--33.

Digital Library

[47]

H. E. Ramadan, C. J. Rossbach, and E. Witchel. 2008. Dependence-aware transactional memory for increased concurrency. In Proceedings of the 41st Annual IEEE/ACM International Symposium on Microarchitecture, IEEE Computer Society, pp. 246--257.

Digital Library

[48]

S. Raoux, G. W. Burr, M. J. Breitwisch, C. T. Rettner, Y.-C. Chen, R. M. Shelby, M. Salinga, D. Krebs, S.-H. Chen, H.-L. Lung, and C. H. Lam. 2008. Phase-change random access memory: A scalable technology. IBM Journal of Research and Development 52, 4 (July 2008), 465--479.

Digital Library

[49]

J. Ren, Q. Hu, S. Khan, and T. Moscibroda. 2017. Programming for non-volatile main memory is hard. In Proceedings of the 8th Asia-Pacific Workshop on Systems (APSys’17). ACM, pp. 13:1--13:8.

Digital Library

[50]

J. Ren, C.-J. M. Liang, Y. Wu, and T. Moscibroda. 2015. Memory-centric data storage for mobile systems. In Proceedings of the 2015 USENIX Annual Technical Conference (USENIX ATC’15), pp. 599--611.

Digital Library

[51]

J. Ren, J. Zhao, S. Khan, J. Choi, Y. Wu, and O. Mutlu. 2015. ThyNVM: Enabling software-transparent crash consistency in persistent memory systems. In Proceedings of the 48th International Symposium on Microarchitecture (MICRO-48). ACM, pp. 672--685. http://persper.com/thynvm/.

Digital Library

[52]

T. Riegel, C. Fetzer, and P. Felber. 2007. Time-based transactional memory with scalable time bases. In Proceedings of the 19th Annual ACM Symposium on Parallel Algorithms and Architectures (SPAA’07). ACM, pp. 221--228.

Digital Library

[53]

M. Rosenblum, and J. K. Ousterhout. 1992. The design and implementation of a log-structured file system. ACM Transactions on Computer Systems 10, 1 (Feb. 1992), 26--52.

Digital Library

[54]

A. Rudoff. 2016. Deprecating the PCOMMIT instruction. Retrieved September 2016 from https://software.intel.com/en-us/blogs/2016/09/12/deprecate-pcommit-instruction.

[55]

S. M. Rumble, A. Kejriwal, and J. Ousterhout. 2014. Log-structured memory for DRAM-based storage. In Proceedings of the 12th USENIX Conference on File and Storage Technologies (FAST’14), pp. 1--16.

Digital Library

[56]

N. Simo, W. Antoni, M. Markk, and R. Vilho. 2011. Telecom application transaction processing benchmark. Retrieved July 2016 from http://tatpbenchmark.sourceforge.net/.

[57]

K. Suzuki, and S. Swanson. 2015. A survey of trends in non-volatile memory technologies: 2000-2014. In Proceedings of the 2015 IEEE International Memory Workshop (IMW). IEEE, pp. 1--4.

[58]

THE TRANSACTION PROCESSING COUNCIL. 2010. TPC-C Benchmark V5. Retrieved July 2016 from http://www.tpc.org/tpcc/.

[59]

S. Tu, W. Zheng, E. Kohler, B. Liskov, and S. Madden. 2013. Speedy transactions in multicore in-memory databases. In Proceedings of the 24th ACM Symposium on Operating Systems Principles. ACM, pp. 18--32.

Digital Library

[60]

H. Volos, A. J. Tack, and M. M. Swift. 2011. Mnemosyne: Lightweight persistent memory. In Proceedings of the 16th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS XVI), pp. 91--104.

Digital Library

[61]

H. Wan, Y. Lu, Y. Xu, and J. Shu. 2016. Empirical study of redo and undo logging in persistent memory. In Proceedings of the 2016 5th Non-Volatile Memory Systems and Applications Symposium (NVMSA), pp. 1--6.

[62]

C. Wang, W.-Y. Chen, Y. Wu, B. Saha, and Adl-A.-R. Tabatabai. 2007. Code generation and optimization for transactional memory constructs in an unmanaged language. In Proceedings of the International Symposium on Code Generation and Optimization (CGO’07), pp. 34--48.

Digital Library

[63]

P. Wang. 1991. An In-Depth Analysis of Concurrent B-tree Algorithms. MIT Cambridge Lab for Computer Science Technical Report, Massachusetts Institute of Technology, Cambridge, MA.

[64]

T. Wang, and R. Johnson. 2014. Scalable logging through emerging non-volatile memory. Proceedings of the VLDB Endowment 7, 10 (2014), 865--876.

Digital Library

[65]

Z. Wang, H. Qian, J. Li, and H. Chen. 2014. Using restricted transactional memory to build a scalable in-memory database. In Proceedings of the 9th European Conference on Computer Systems. ACM, p. 26.

Digital Library

[66]

X. Wei, J. Shi, Y. Chen, R. Chen, and H. Chen. 2015. Fast in-memory transaction processing using RDMA and HTM. In Proceedings of the 25th Symposium on Operating Systems Principles. ACM, pp. 87--104.

Digital Library

[67]

M. Wu, and W. Zwaenepoel, eNVy: A non-volatile, main memory storage system. In Proceedings of the 6th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS VI), pp. 86--97.

Digital Library

[68]

P. Wu, M. M. Michael, C. von Praun, T. Nakaike, R. Bordawekar, H. W. Cain, C. Cascaval, S. Chatterjee, S. Chiras, R. Hou, et al. 2009. Compiler and runtime techniques for software transactional memory optimization. Concurrency and Computation: Practice and Experience 21, 1 (2009), 7--23.

Digital Library

[69]

J. Xu, and S. Swanson, NOVA: A log-structured file system for hybrid volatile/non-volatile main memories. In Proceedings of the 14th Usenix Conference on File and Storage Technologies (FAST’16), pp. 323--338.

Digital Library

[70]

J. Yang, Q. Wei, C. Chen, C. Wang, K. L. Yong, and B. He. 2015. NV-Tree: Reducing consistency cost for NVM-based single level systems. In Proceedings of the 13th USENIX Conference on File and Storage Technologies (FAST’15), pp. 167--181.

Digital Library

[71]

J. H. Yoon, H. C. Hunter, and G. A. Tressler. 2013. Flash 8 DRAM Si scaling challenges, emerging non-volatile memory technology enablement—Implications to enterprise storage and server compute systems. Flash Memory Summit.

[72]

Y. Zhang, and S. Swanson. 2015. A study of application performance with non-volatile main memory. In Proceedings of the 31st Symposium on Mass Storage Systems and Technologies (MSST’15), pp. 1--10.

[73]

J. Zhao, S. Li, D. H. Yoon, Y. Xie, and N. P. Jouppi, Kiln: Closing the performance gap between systems with and without persistence support. In Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture. ACM, pp. 421--432.

Digital Library

Cited By

Guo CZhang LZhou XQian WZhuo CCheng KYang H(2020)A Reconfigurable Approximate Multiplier for Quantized CNN ApplicationsProceedings of the 25th Asia and South Pacific Design Automation Conference10.1109/ASP-DAC47756.2020.9045176(235-240)Online publication date: 17-Jan-2020
https://dl.acm.org/doi/10.1109/ASP-DAC47756.2020.9045176
Liu MXing JChen KWu Y(2019)Building Scalable NVM-based B+tree with HTMProceedings of the 48th International Conference on Parallel Processing10.1145/3337821.3337827(1-10)Online publication date: 5-Aug-2019
https://dl.acm.org/doi/10.1145/3337821.3337827

Index Terms

DudeTx: Durable Transactions Made Decoupled
1. Hardware
  1. Emerging technologies
    1. Memory and dense storage

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cover image ACM Transactions on Storage

ACM Transactions on Storage Volume 14, Issue 1

Special Issue on NVM and Storage

February 2018

237 pages

ISSN:1553-3077

EISSN:1553-3093

DOI:10.1145/3190860

Editor:
Sam H. Noh
Ulsan National Institute of Science and Technology, Ulsan, Korea

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Publication History

Published: 04 April 2018

Accepted: 01 January 2018

Revised: 01 September 2017

Received: 01 February 2017

Published in TOS Volume 14, Issue 1

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National Basic Research (973) Program of China

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Cited By

Guo CZhang LZhou XQian WZhuo CCheng KYang H(2020)A Reconfigurable Approximate Multiplier for Quantized CNN ApplicationsProceedings of the 25th Asia and South Pacific Design Automation Conference10.1109/ASP-DAC47756.2020.9045176(235-240)Online publication date: 17-Jan-2020
https://dl.acm.org/doi/10.1109/ASP-DAC47756.2020.9045176
Liu MXing JChen KWu Y(2019)Building Scalable NVM-based B+tree with HTMProceedings of the 48th International Conference on Parallel Processing10.1145/3337821.3337827(1-10)Online publication date: 5-Aug-2019
https://dl.acm.org/doi/10.1145/3337821.3337827

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