Cited By
View all- Farah RHarmanani H(2008)An Ant Colony Optimization approach for test pattern generation2008 Canadian Conference on Electrical and Computer Engineering10.1109/CCECE.2008.4564771(001397-001402)Online publication date: May-2008
Pseudo-exhaustive pattern generators for built-in self-test (BIST) provide high fault coverage of detectable combinational faults with much fewer test vectors than exhaustive generation. In (n, k)-adjacent bit pseudo-exhaustive test sets, all 2k binary ...
A new approach to test pattern generation which is particularly suitable for self-test is described. Required computation time is much less than for present day automatic test pattern generation (ATPG) programs. Fault simulation or fault modeling is not ...
This paper studies the test pattern generation problem for FPGA implemented combinational circuits. General definitions concerning the specific problem of testing RAM-based FPGAs are first given such as the important concept of manufacturing-oriented ...
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