research-article

Network-on-Chip Intellectual Property Protection Using Circular Path--based Fingerprinting

Author:

Arnab Kumar BiswasAuthors Info & Claims

ACM Journal on Emerging Technologies in Computing Systems (JETC), Volume 17, Issue 1

Article No.: 4, Pages 1 - 22

https://doi.org/10.1145/3410024

Published: 17 September 2020 Publication History

Abstract

Intellectual property (IP) reuse is a well-known technique in chip design industry. But this technique also exposes a security vulnerability called IP stealing attack. Network-on-Chip (NoC) is an on-chip scalable communication medium and is used as an IP and sold by various vendors to be integrated in a Multiprocessor System-on-Chip (MPSoC). An attacker can launch IP stealing attack against NoC IP. In this article, we propose a NoC IP protection technique called circular path--based fingerprinting (CPF) using fingerprint embedding. We also provide a theoretical model using polyomino theory to get the number of distinct fingerprints in a NoC. We show that our proposed technique requires much less hardware overhead compared to an existing NoC IP security solution and also provides better security against removal and masking attacks. In particular, our proposed CPF technique requires 27.41% less router area compared to the existing solution. We also show that our CPF solution does not affect the normal packet latency and hence does not degrade the NoC performance.

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Cited By

Biswas ASikdar B(2022)Protecting Network-on-Chip Intellectual Property Using Timing Channel FingerprintingACM Transactions on Embedded Computing Systems10.1145/349556521:2(1-21)Online publication date: 8-Feb-2022
https://dl.acm.org/doi/10.1145/3495565
Charles SBindschaedler VMishra P(2022)Digital Watermarking for Detecting Malicious Intellectual Property Cores in NoC ArchitecturesIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2022.316760630:7(952-965)Online publication date: 1-Jul-2022
https://dl.acm.org/doi/10.1109/TVLSI.2022.3167606
Charles SMishra P(2021)Securing on-Chip Communication Using Digital WatermarkingNetwork-on-Chip Security and Privacy10.1007/978-3-030-69131-8_9(219-252)Online publication date: 22-Jan-2021
https://doi.org/10.1007/978-3-030-69131-8_9

Index Terms

Network-on-Chip Intellectual Property Protection Using Circular Path--based Fingerprinting

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Published In

cover image ACM Journal on Emerging Technologies in Computing Systems

ACM Journal on Emerging Technologies in Computing Systems Volume 17, Issue 1

January 2021

232 pages

ISSN:1550-4832

EISSN:1550-4840

DOI:10.1145/3425108

Editor:
Ramesh Karri
Polytechnic Institute of New York University, USA

Issue’s Table of Contents

Copyright © 2020 ACM.

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Association for Computing Machinery

New York, NY, United States

Journal Family

ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 17 September 2020

Accepted: 01 July 2020

Revised: 01 July 2020

Received: 01 January 2020

Published in JETC Volume 17, Issue 1

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Cited By

Biswas ASikdar B(2022)Protecting Network-on-Chip Intellectual Property Using Timing Channel FingerprintingACM Transactions on Embedded Computing Systems10.1145/349556521:2(1-21)Online publication date: 8-Feb-2022
https://dl.acm.org/doi/10.1145/3495565
Charles SBindschaedler VMishra P(2022)Digital Watermarking for Detecting Malicious Intellectual Property Cores in NoC ArchitecturesIEEE Transactions on Very Large Scale Integration (VLSI) Systems10.1109/TVLSI.2022.316760630:7(952-965)Online publication date: 1-Jul-2022
https://dl.acm.org/doi/10.1109/TVLSI.2022.3167606
Charles SMishra P(2021)Securing on-Chip Communication Using Digital WatermarkingNetwork-on-Chip Security and Privacy10.1007/978-3-030-69131-8_9(219-252)Online publication date: 22-Jan-2021
https://doi.org/10.1007/978-3-030-69131-8_9

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