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A multi-microprocessor implementation of a general purpose pipelined CPU

Authors:

Richard R. Ramseyer,

Andries van DamAuthors Info & Claims

ACM SIGARCH Computer Architecture News, Volume 5, Issue 7

Pages 29 - 34

https://doi.org/10.1145/633615.810649

Published: 01 March 1977 Publication History

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Abstract

This paper discusses and shows by example the potential of a network of microprogrammable microprocessors as a cost-effective alternative to traditional hardwired medium- and large-scale mainframes. While biased towards vector processing, this system is not intended to compete with multi-million dollar supercomputers such as the 360/195, CDC STAR, Illiac IV, CRAY-1, TI ASC, etc., which use special algorithms and the fastest circuitry available.

The architecture incorporates pipelining, multiprocessing and distributed processing techniques with bipolar microprocessor technology. The result should be a machine which will equal or outperform most traditional third- and fourth-generation mainframes at a fraction of the CPU cost. This should be the case even for scalar, general purpose computation.

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Cited By

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Mehra SMajithia J(1982)Reconfigurable computer architecturesIEE Proceedings E Computers and Digital Techniques10.1049/ip-e.1982.0032129:4(156)Online publication date: 1982
https://doi.org/10.1049/ip-e.1982.0032
Lin YMitra S(2015)StarLACM SIGPLAN Notices10.1145/2808704.275496650:5(1-10)Online publication date: 4-Jun-2015
https://dl.acm.org/doi/10.1145/2808704.2754966
Ghosh SPark YRaman A(2015)Enabling Efficient Alias SpeculationACM SIGPLAN Notices10.1145/2808704.275496450:5(1-10)Online publication date: 4-Jun-2015
https://dl.acm.org/doi/10.1145/2808704.2754964
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Index Terms

A multi-microprocessor implementation of a general purpose pipelined CPU
1. Applied computing
  1. Computers in other domains
    1. Personal computers and PC applications
      1. Microcomputers
2. Computer systems organization
  1. Architectures
    1. Parallel architectures
      1. Systolic arrays
    2. Serial architectures
      1. Pipeline computing

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Published In

cover image ACM SIGARCH Computer Architecture News

ACM SIGARCH Computer Architecture News Volume 5, Issue 7

March 1977

210 pages

ISSN:0163-5964

DOI:10.1145/633615

Issue’s Table of Contents

ISCA '77: Proceedings of the 4th annual symposium on Computer architecture
March 1977
210 pages
ISBN:9781450379113
DOI:10.1145/800255
Chairmen:
Harold S. Stone,
Bruce Wald,
Y. S. Wu

Publisher

Association for Computing Machinery

New York, NY, United States

Publication History

Published: 01 March 1977

Published in SIGARCH Volume 5, Issue 7

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Mehra SMajithia J(1982)Reconfigurable computer architecturesIEE Proceedings E Computers and Digital Techniques10.1049/ip-e.1982.0032129:4(156)Online publication date: 1982
https://doi.org/10.1049/ip-e.1982.0032
Lin YMitra S(2015)StarLACM SIGPLAN Notices10.1145/2808704.275496650:5(1-10)Online publication date: 4-Jun-2015
https://dl.acm.org/doi/10.1145/2808704.2754966
Ghosh SPark YRaman A(2015)Enabling Efficient Alias SpeculationACM SIGPLAN Notices10.1145/2808704.275496450:5(1-10)Online publication date: 4-Jun-2015
https://dl.acm.org/doi/10.1145/2808704.2754964
Dietrich CHoffmann MLohmann D(2015)Cross-Kernel Control-Flow--Graph Analysis for Event-Driven Real-Time SystemsACM SIGPLAN Notices10.1145/2808704.275496350:5(1-10)Online publication date: 4-Jun-2015
https://dl.acm.org/doi/10.1145/2808704.2754963
Stilkerich ILang CErhardt CStilkerich M(2015)A Practical GetawayACM SIGPLAN Notices10.1145/2808704.275496150:5(1-11)Online publication date: 4-Jun-2015
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Baird RGavin PSjälander MWhalley DUh G(2015)Optimizing Transfers of Control in the Static Pipeline ArchitectureACM SIGPLAN Notices10.1145/2808704.275495250:5(1-10)Online publication date: 4-Jun-2015
https://dl.acm.org/doi/10.1145/2808704.2754952
Mubeen SMäki-Turja JSjödin M(2011)Tracing event chains for holistic response-time analysis of component-based distributed real-time systemsACM SIGBED Review10.1145/2038617.20386288:3(48-51)Online publication date: 1-Sep-2011
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Quiñones EAbella JCazorla FValero M(2011)Exploiting intra-task slack time of load operations for DVFS in hard real-time multi-core systemsACM SIGBED Review10.1145/2038617.20386248:3(32-35)Online publication date: 1-Sep-2011
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Kim JChoi JKang ILee I(2011)Generating composite behavior of embedded software components based on UML behavioral model and process algebraACM SIGSOFT Software Engineering Notes10.1145/1921532.192156236:1(1-9)Online publication date: 24-Jan-2011
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Gupta MPande ATripathi A(2011)Design patterns detection using SOP expressions for graphsACM SIGSOFT Software Engineering Notes10.1145/1921532.192154136:1(1-5)Online publication date: 24-Jan-2011
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