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An efficient finite element method for submicron IC capacitance extraction

Authors:

N. P. van der Meijs,

A. J. van GenderenAuthors Info & Claims

DAC '89: Proceedings of the 26th ACM/IEEE Design Automation Conference

Pages 678 - 681

https://doi.org/10.1145/74382.74502

Published: 01 June 1989 Publication History

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Liu LYang FShang LZeng X(2024)GNN-Cap: Chip-Scale Interconnect Capacitance Extraction Using Graph Neural NetworkIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.333194243:4(1206-1217)Online publication date: Apr-2024
https://doi.org/10.1109/TCAD.2023.3331942
Abouelyazid MHammouda SIsmail Y(2022)Accuracy-Based Hybrid Parasitic Capacitance Extraction Using Rule-Based, Neural-Networks, and Field-Solver MethodsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.316119941:12(5681-5694)Online publication date: Dec-2022
https://doi.org/10.1109/TCAD.2022.3161199
Wei XYan CZhou HZhou DZeng X(2019)An Efficient FPGA-based Floating Random Walk Solver for Capacitance Extraction using SDAccel2019 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE.2019.8714992(1040-1045)Online publication date: Mar-2019
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Index Terms

An efficient finite element method for submicron IC capacitance extraction
1. Hardware
  1. Electronic design automation
    1. Physical design (EDA)
      1. Partitioning and floorplanning
  2. Very large scale integration design
2. Mathematics of computing
  1. Mathematical analysis
    1. Integral equations
    2. Numerical analysis
      1. Computations in finite fields

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Published In

DAC '89: Proceedings of the 26th ACM/IEEE Design Automation Conference

June 1989

839 pages

ISBN:0897913108

DOI:10.1145/74382

Chairman:
Donald E. Thomas
Carnegie Mellon Univ., Pittsburgh, PA

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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Published: 01 June 1989

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DAC89: The 26th ACM/IEEE-CS Design Automation Conference

June 25 - 28, 1989

Nevada, Las Vegas, USA

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DAC '89 Paper Acceptance Rate 156 of 465 submissions, 34%;

Overall Acceptance Rate 1,770 of 5,499 submissions, 32%

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DAC '25

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62nd ACM/IEEE Design Automation Conference

June 22 - 26, 2025

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Liu LYang FShang LZeng X(2024)GNN-Cap: Chip-Scale Interconnect Capacitance Extraction Using Graph Neural NetworkIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2023.333194243:4(1206-1217)Online publication date: Apr-2024
https://doi.org/10.1109/TCAD.2023.3331942
Abouelyazid MHammouda SIsmail Y(2022)Accuracy-Based Hybrid Parasitic Capacitance Extraction Using Rule-Based, Neural-Networks, and Field-Solver MethodsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems10.1109/TCAD.2022.316119941:12(5681-5694)Online publication date: Dec-2022
https://doi.org/10.1109/TCAD.2022.3161199
Wei XYan CZhou HZhou DZeng X(2019)An Efficient FPGA-based Floating Random Walk Solver for Capacitance Extraction using SDAccel2019 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE.2019.8714992(1040-1045)Online publication date: Mar-2019
https://doi.org/10.23919/DATE.2019.8714992
Yu WWang XYu WWang X(2014)Statistical Capacitance Extraction Based on Continuous-Surface Geometric ModelAdvanced Field-Solver Techniques for RC Extraction of Integrated Circuits10.1007/978-3-642-54298-5_9(153-178)Online publication date: 12-Mar-2014
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Yu WWang XYu WWang X(2014)Process Variation-Aware Capacitance ExtractionAdvanced Field-Solver Techniques for RC Extraction of Integrated Circuits10.1007/978-3-642-54298-5_8(121-152)Online publication date: 12-Mar-2014
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Yu WWang XYu WWang X(2014)Extracting Frequency-Dependent Substrate ParasiticsAdvanced Field-Solver Techniques for RC Extraction of Integrated Circuits10.1007/978-3-642-54298-5_7(107-119)Online publication date: 12-Mar-2014
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Yu WWang XYu WWang X(2014)Substrate Resistance Extraction with Boundary Element MethodAdvanced Field-Solver Techniques for RC Extraction of Integrated Circuits10.1007/978-3-642-54298-5_6(91-106)Online publication date: 12-Mar-2014
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Yu WWang XYu WWang X(2014)Resistance Extraction of Complex 3-D InterconnectsAdvanced Field-Solver Techniques for RC Extraction of Integrated Circuits10.1007/978-3-642-54298-5_5(71-89)Online publication date: 12-Mar-2014
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Yu WWang XYu WWang X(2014)Fast Boundary Element Methods for Capacitance Extraction (II)Advanced Field-Solver Techniques for RC Extraction of Integrated Circuits10.1007/978-3-642-54298-5_4(39-70)Online publication date: 12-Mar-2014
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Yu WWang XYu WWang X(2014)Fast Boundary Element Methods for Capacitance Extraction (I)Advanced Field-Solver Techniques for RC Extraction of Integrated Circuits10.1007/978-3-642-54298-5_3(19-37)Online publication date: 12-Mar-2014
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LASCA-Interconnect Parasitic Extraction Tool for Deep-Submicron IC Design

3-D-TCAD-Based Parasitic Capacitance Extraction for Emerging Multigate Devices and Circuits

Capacitance model of submicron MESFET under illumination

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LASCA-Interconnect Parasitic Extraction Tool for Deep-Submicron IC Design

3-D-TCAD-Based Parasitic Capacitance Extraction for Emerging Multigate Devices and Circuits

Capacitance model of submicron MESFET under illumination

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