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OMP: a RISC-based multiprocessor using orthogonal-access memories and multiple spanning buses

Published: 01 June 1990 Publication History
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  • Abstract

    This paper presents the architectural design and RISC based implementation of a prototype supercomputer, namely the Orthogonal MultiProcessor (OMP). The OMP system is constructed with 16 Intel 1860 RISC microprocessors and 256 parallel memory modules, which are 2-D interleaved and orthogonally accessed using custom-designed spanning buses. The architectural design has been validated by a CSIM-based multiprocessor simulator. The design choices are based on worst-case delay analysis and simulation validation. The current OMP prototype chooses a 2-dimensional memory architecture, mainly for image processing, computer vision, and neural network simulation applications. The 16-processor OMP prototype is targeted to achieve a peak performance of 400 RISC integer MIPS or a maximum of 640 Mflops. This paper presents the architectural design of the OMP prototype at system and PC board levels. We are presently entering the fabrication stage of all the PC boards. The system is expected to become operational in late 1991 and benchmarking results will be available in 1992. Only hardware design features are reported here. Software and simulation results are reported elsewhere.

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    cover image ACM Conferences
    ICS '90: Proceedings of the 4th international conference on Supercomputing
    June 1990
    492 pages
    ISBN:0897913698
    DOI:10.1145/77726
    • cover image ACM SIGARCH Computer Architecture News
      ACM SIGARCH Computer Architecture News  Volume 18, Issue 3b
      Special Issue: Proceedings of the 4th international conference on Supercomputing
      Sept. 1990
      489 pages
      ISSN:0163-5964
      DOI:10.1145/255129
      Issue’s Table of Contents
    Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

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    Published: 01 June 1990

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    IC'90: ACM SIGARCH International Conference on Supercomputing
    June 11 - 15, 1990
    Amsterdam, The Netherlands

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    • (2022)SAR Image Change Detection Based on Joint Dictionary Learning With Iterative Adaptive Threshold OptimizationIEEE Journal of Selected Topics in Applied Earth Observations and Remote Sensing10.1109/JSTARS.2022.318710815(5234-5249)Online publication date: 2022
    • (2005)Hardware support for collective communication operationsParallel Architectures and Their Efficient Use10.1007/3-540-56731-3_11(110-118)Online publication date: 28-May-2005
    • (1995)ProteusMachine Vision and Applications10.1007/BF012134748:2(85-100)Online publication date: 1-Feb-1995
    • (1993)Parallel implementation of prime-factor discrete cosine transform on the orthogonal multiprocessorIEEE Transactions on Circuits and Systems for Video Technology10.1109/76.2127173:2(107-115)Online publication date: 1-Apr-1993
    • (1992)Proteus: a reconfigurable computational network for computer visionProceedings., 11th IAPR International Conference on Pattern Recognition. Vol. IV. Conference D: Architectures for Vision and Pattern Recognition,10.1109/ICPR.1992.202128(43-54)Online publication date: 1992
    • (1992)A heterogeneous parallel accelerator for image analysis and radar signal processingProceedings of the Twenty-Fifth Hawaii International Conference on System Sciences10.1109/HICSS.1992.183155(129-138 vol.1)Online publication date: 1992
    • (1992)Parallel Architectures and Algorithms for Image Component LabelingIEEE Transactions on Pattern Analysis and Machine Intelligence10.1109/34.15990414:10(1014-1034)Online publication date: 1-Oct-1992
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    • (1991)GFLOPS: a general flexible linearly organized parallel structure for imagesProceedings of the International Conference on Application Specific Array Processors10.1109/ASAP.1991.238904(431-444)Online publication date: 1991
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