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A Distributed Hardware Monitoring System for Runtime Verification on Multi-Tile MPSoCs

Authors:

Marcel Mettler,

Daniel Mueller-Gritschneder,

Ulf SchlichtmannAuthors Info & Claims

ACM Transactions on Architecture and Code Optimization (TACO), Volume 18, Issue 1

Article No.: 8, Pages 1 - 25

https://doi.org/10.1145/3430699

Published: 30 December 2020 Publication History

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Abstract

Exhaustive verification techniques do not scale with the complexity of today’s multi-tile Multi-processor Systems-on-chip (MPSoCs). Hence, runtime verification (RV) has emerged as a complementary method, which verifies the correct behavior of applications executed on the MPSoC during runtime.

In this article, we propose a decentralized monitoring architecture for large-scale multi-tile MPSoCs. In order to minimize performance and power overhead for RV, we propose a lightweight and non-intrusive hardware solution. It features a new specialized tracing interconnect that distributes and sorts detected events according to their timestamps. Each tile monitor has a consistent view on a globally sorted trace of events on which the behavior of the target application can be verified using logical and timing requirements. Furthermore, we propose an integer linear programming-based algorithm for the assignment of requirements to monitors to exploit the local resources best. The monitoring architecture is demonstrated for a four-tiled MPSoC with 20 cores implemented on a Virtex-7 field-programmable gate array (FPGA).

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Cited By

Al-Shoukry S(2024)Design and implementation of Denial-of-Service attack in network of multiprocessor systems-on-chip with anomaly detection approachService Oriented Computing and Applications10.1007/s11761-024-00394-yOnline publication date: 18-May-2024
https://doi.org/10.1007/s11761-024-00394-y
Mettler MRapp MKhdr HMueller-Gritschneder DHenkel JSchlichtmann U(2022)An FPGA-based Approach to Evaluate Thermal and Resource Management Strategies of Many-core ProcessorsACM Transactions on Architecture and Code Optimization10.1145/351682519:3(1-24)Online publication date: 4-May-2022
https://dl.acm.org/doi/10.1145/3516825

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A Distributed Hardware Monitoring System for Runtime Verification on Multi-Tile MPSoCs

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Published In

cover image ACM Transactions on Architecture and Code Optimization

ACM Transactions on Architecture and Code Optimization Volume 18, Issue 1

March 2021

402 pages

ISSN:1544-3566

EISSN:1544-3973

DOI:10.1145/3446348

Editor:
David Kaeli
Northeastern University, USA

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Copyright © 2020 ACM.

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Publication History

Published: 30 December 2020

Accepted: 01 October 2020

Revised: 01 October 2020

Received: 01 May 2020

Published in TACO Volume 18, Issue 1

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Cited By

Al-Shoukry S(2024)Design and implementation of Denial-of-Service attack in network of multiprocessor systems-on-chip with anomaly detection approachService Oriented Computing and Applications10.1007/s11761-024-00394-yOnline publication date: 18-May-2024
https://doi.org/10.1007/s11761-024-00394-y
Mettler MRapp MKhdr HMueller-Gritschneder DHenkel JSchlichtmann U(2022)An FPGA-based Approach to Evaluate Thermal and Resource Management Strategies of Many-core ProcessorsACM Transactions on Architecture and Code Optimization10.1145/351682519:3(1-24)Online publication date: 4-May-2022
https://dl.acm.org/doi/10.1145/3516825

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