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The interface between silicon and a high-k oxide

Abstract

The ability of the semiconductor industry to continue scaling microelectronic devices to ever smaller dimensions (a trend known as Moore's Law1) is limited by quantum mechanical effects: as the thickness of conventional silicon dioxide (SiO2) gate insulators is reduced to just a few atomic layers, electrons can tunnel directly through the films. Continued device scaling will therefore probably require the replacement of the insulator with high-dielectric-constant (high-k) oxides2, to increase its thickness, thus preventing tunnelling currents while retaining the electronic properties of an ultrathin SiO2 film. Ultimately, such insulators will require an atomically defined interface with silicon without an interfacial SiO2 layer for optimal performance. Following the first reports of epitaxial growth of AO and ABO3 compounds on silicon3,4,5,6,7, the formation of an atomically abrupt crystalline interface between strontium titanate and silicon was demonstrated8,9,10. However, the atomic structure proposed for this interface is questionable because it requires silicon atoms that have coordinations rarely found elsewhere in nature. Here we describe first-principles calculations of the formation of the interface between silicon and strontium titanate and its atomic structure. Our study shows that atomic control of the interfacial structure by altering the chemical environment can dramatically improve the electronic properties of the interface to meet technological requirements. The interface structure and its chemistry may provide guidance for the selection process of other high-k gate oxides and for controlling their growth.

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Figure 1: Atomic structures of the SrTiO3/Si(001) interfaces: structure A (on left), unoxidized interface; structure B (on right), oxidized interface.
Figure 2: Phase diagram for interface oxidation.

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Acknowledgements

We thank S. Chambers, M. Chisholm, W. Daum, A. Dimoulas, J. Fompeyrine, J.-P. Loquet, R.A. McKee, G. Norga and S. Stemmer for discussions. This work has been funded by the European Commission in the project ‘Integration of Very High-k Dielectrics with CMOS Technology’ (INVEST) and by the AURORA project of the Austrian Science Fund. Parts of the calculations have been performed on the computers of the ‘Norddeutscher Verbund für Hoch- und Höchstleistungsrechnen’ (HLRN).

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Correspondence to Peter E. Blöchl.

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The Clausthal University of Technology has applied for a patent related to the subject of the paper. The authors will participate financially in the revenue.

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Först, C., Ashman, C., Schwarz, K. et al. The interface between silicon and a high-k oxide. Nature 427, 53–56 (2004). https://doi.org/10.1038/nature02204

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