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    Jonas Weiss

    A DC-to-44GHz amplifier with 19dB differential gain in a standard 90nm CMOS technology is presented. Capacitive bandwidth and group-delay enhancements are combined with series peaking in a shunt-peaking amplifier. The circuit occupies... more
    A DC-to-44GHz amplifier with 19dB differential gain in a standard 90nm CMOS technology is presented. Capacitive bandwidth and group-delay enhancements are combined with series peaking in a shunt-peaking amplifier. The circuit occupies 0.02mm2 and dissipates 57mW at 1V
    Page 1. Effect of Body Contacts on High-Speed Circuits in 90 nm CMOS SOI Technology Jonas RM Weiss', Christian Menolfi1, Thomas Morf1, Martin L. Schmatz1, Heinz Jaeckel2 1 IBM Zurich Research Laboratory, 8803 Rtlschlikon ...
    For the realization of a polymer waveguide based optical backplane link for computing applications, we developed a method to passively align multiple layers of polymer waveguide flex sheets in a single MT compatible ferrule. The minimal... more
    For the realization of a polymer waveguide based optical backplane link for computing applications, we developed a method to passively align multiple layers of polymer waveguide flex sheets in a single MT compatible ferrule. The minimal feature forming the backplane is a 192 channel link. This link is equipped with four MT connector at each end, and is performing a
    We report on recent developments of our board-level optical interconnect technology towards polymer waveguide flexes and on the adaption of connectorization and electro-optical assembly methods to be used in optical backplanes and... more
    We report on recent developments of our board-level optical interconnect technology towards polymer waveguide flexes and on the adaption of connectorization and electro-optical assembly methods to be used in optical backplanes and high-density optical subassemblies.
    We present a novel approach for packaging high-speed opto-electronic 12x-array devices in a compact, low-cost package for waveguide-based intra-system links. In order to avoid optical signal loss and crosstalk, the mutual alignment... more
    We present a novel approach for packaging high-speed opto-electronic 12x-array devices in a compact, low-cost package for waveguide-based intra-system links. In order to avoid optical signal loss and crosstalk, the mutual alignment between PCB-embedded multimode waveguides and the opto-electronic components needs to be in the order of 5-10 micrometer, which is an order of magnitude tighter than standard PCB manufacturing
    To satisfy the intra- and inter-system bandwidth requirements of future data centers and high-performance computers, low-cost low-power high-throughput optical interconnects will become a key enabling technology. To tightly integrate... more
    To satisfy the intra- and inter-system bandwidth requirements of future data centers and high-performance computers, low-cost low-power high-throughput optical interconnects will become a key enabling technology. To tightly integrate optics with the computing hardware, particularly in the context of CMOS-compatible silicon photonics, optical printed circuit boards using polymer waveguides are considered as a formidable platform. IBM Research has already demonstrated the essential silicon photonics and interconnection building blocks. A remaining challenge is electro-optical packaging, i.e., the connection of the silicon photonics chips with the system. In this paper, we present a new single-mode polymer waveguide technology and a scalable method for building the optical interface between silicon photonics chips and single-mode polymer waveguides.
    I. INTRODUCTION Performance scaling of microprocessors and denser com-ponent integration on the processor package lead to higher bandwidth requirements for the data flow to and from the pro-cessor package. Electrical signaling on printed... more
    I. INTRODUCTION Performance scaling of microprocessors and denser com-ponent integration on the processor package lead to higher bandwidth requirements for the data flow to and from the pro-cessor package. Electrical signaling on printed circuit boards (PCBs) is limited by ...
    We describe circuit techniques for a 40 Gbit/s CMOS CDR circuit in 65 nm CMOS-SOI technology, which mostly uses a full-swing CMOS circuit style to minimize power and area. The quarter rate receiver uses a phase-programmable PLL (P-PLL)... more
    We describe circuit techniques for a 40 Gbit/s CMOS CDR circuit in 65 nm CMOS-SOI technology, which mostly uses a full-swing CMOS circuit style to minimize power and area. The quarter rate receiver uses a phase-programmable PLL (P-PLL) architecture for clock generation and phase tracking, and implements a high-speed sampler based on CMOS SenseAmp latches. The circuit uses 0.03mm2 of
    ABSTRACT We report on the implementation of novel flexible polymer waveguide interconnects. They are based on newly developed mechanically flexible low-loss silicone waveguides. In addition to meeting the generic requirements of rigid... more
    ABSTRACT We report on the implementation of novel flexible polymer waveguide interconnects. They are based on newly developed mechanically flexible low-loss silicone waveguides. In addition to meeting the generic requirements of rigid waveguide interconnects, several flex-material challenges were mastered: a) mechanical flexibility permitting waveguide flexing down to radii of 1.0 mm without cracking; b) minimization of waveguide curling induced by the CTE mismatch between flex substrates and polymer layers to enable assembly and connectorization; c) greatly improved cladding adhesion on standard PCB flex substrates, such as polyimide; and d) high environmental stability despite the reduced polymer cross-linking required for better mechanical flexibility. The new waveguides exhibit excellent stability in damp heat (2000 h in 85°C/85% rH) and under thermal shock (500 cycles from -40° to +120°C), and lead-free solder reflow up to 260°C. Using the newly engineered “Dow Corning WG-1017 Optical Waveguide Clad Dev Sample” and the established “Dow Corning WG-1010 Optical Waveguide Core”, we were able to develop a manufacturing process suitable for large areas and offering high process control and stability to produce waveguides having optical loss values of less than 0.05 dB/cm at 850 nm VCSEL wavelength and fulfilling requirements (a) to (d) above. We describe this manufacturing process and how we have overcome the material challenges mentioned. Furthermore, we present characterization and manufacturing results, show demonstrators, and outline the potential of flexible waveguides as versatile electro-optic assembly platform.
    ... Using the pI as the goal function, m must be larger than 0.4, as for smaller values, there is no gain overshoot (peaking). Replica Bias Generator & Common Mode Control R50 rl_ctrl<0:11>... more
    ... Using the pI as the goal function, m must be larger than 0.4, as for smaller values, there is no gain overshoot (peaking). Replica Bias Generator & Common Mode Control R50 rl_ctrl<0:11> R50 Cload Measu remen t E q u ip men t VDD RL RL LL Cload vin vip von vop M1,2 ...
    ABSTRACT An LC-based VCO in standard 65 nm CMOS SOI technology is presented. The VCO exhibits a measured tuning range 6.4-11.3 GHz. The tuning range is significantly extended by a combination of switchable inductor and capacitor banks.... more
    ABSTRACT An LC-based VCO in standard 65 nm CMOS SOI technology is presented. The VCO exhibits a measured tuning range 6.4-11.3 GHz. The tuning range is significantly extended by a combination of switchable inductor and capacitor banks. The switchable inductor consists of two magnetically coupled spiral inductors. The secondary coil can be either open or closed with a large FET switch, which in closed condition significantly reduces the inductance of the main coil by means of mutual inductance.