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High-Performance and Energy-Efficient Network-on-Chip Architectures for Graph Analytics

Authors:

Karthi Duraisamy,

Partha Pratim Pande,

Ananth KalyanaramanAuthors Info & Claims

ACM Transactions on Embedded Computing Systems (TECS), Volume 15, Issue 4

Article No.: 66, Pages 1 - 26

https://doi.org/10.1145/2961027

Published: 01 September 2016 Publication History

Abstract

With its applicability spanning numerous data-driven fields, the implementation of graph analytics on multicore platforms is gaining momentum. One of the most important components of a multicore chip is its communication backbone. Due to inherent irregularities in data movements manifested by graph-based applications, it is essential to design efficient on-chip interconnection architectures for multicore chips performing graph analytics. In this article, we present a detailed analysis of the traffic patterns generated by graph-based applications when mapped to multicore chips. Based on this analysis, we explore the design-space for the Network-on-Chip (NoC) architecture to enable an efficient implementation of graph analytics. We principally consider three types of NoC architectures, viz., traditional mesh, small-world, and high-radix networks. We demonstrate that the small-world-network-enabled wireless NoC (WiNoC) is the most suitable platform for executing the considered graph applications. The WiNoC achieves an average of 38% and 18% full-system Energy Delay Product savings compared to wireline-mesh and high-radix NoCs, respectively.

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Cited By

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https://dl.acm.org/doi/10.1109/JSAC.2024.3399253
Yadav SLaxmi VKapoor HGaur MKumar A(2023)Adaptive distribution of control messages for improving bandwidth utilization in multiple NoCThe Journal of Supercomputing10.1007/s11227-023-05208-079:15(17208-17246)Online publication date: 1-Oct-2023
https://dl.acm.org/doi/10.1007/s11227-023-05208-0
Choudhury DBarik RRajam AKalyanaraman APande A(2022)Software/Hardware Co-design of 3D NoC-based GPU Architectures for Accelerated Graph ComputationsACM Transactions on Design Automation of Electronic Systems10.1145/3514354Online publication date: 4-Apr-2022
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Index Terms

High-Performance and Energy-Efficient Network-on-Chip Architectures for Graph Analytics
1. Hardware
  1. Very large scale integration design
    1. Analog and mixed-signal circuits
      1. Radio frequency and wireless circuits
    2. Design reuse and communication-based design
      1. Network on chip
2. Mathematics of computing
  1. Discrete mathematics
    1. Graph theory
      1. Graph algorithms

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Published In

cover image ACM Transactions on Embedded Computing Systems

ACM Transactions on Embedded Computing Systems Volume 15, Issue 4

Special Issue on ESWEEK2015 and Regular Papers

August 2016

411 pages

ISSN:1539-9087

EISSN:1558-3465

DOI:10.1145/2982215

Editor:
Sandeep K. Shukla
Indian Institute of Technology, India

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Copyright © 2016 ACM.

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ACM Journals for the Design of Smart and Connected Systems

Publication History

Published: 01 September 2016

Accepted: 01 May 2016

Revised: 01 May 2016

Received: 01 December 2015

Published in TECS Volume 15, Issue 4

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Cited By

Abadal SHan CPetrov VGalluccio LAkyildiz IJornet J(2024)Electromagnetic Nanonetworks Beyond 6G: From Wearable and Implantable Networks to On-Chip and Quantum CommunicationIEEE Journal on Selected Areas in Communications10.1109/JSAC.2024.339925342:8(2122-2142)Online publication date: 1-Aug-2024
https://dl.acm.org/doi/10.1109/JSAC.2024.3399253
Yadav SLaxmi VKapoor HGaur MKumar A(2023)Adaptive distribution of control messages for improving bandwidth utilization in multiple NoCThe Journal of Supercomputing10.1007/s11227-023-05208-079:15(17208-17246)Online publication date: 1-Oct-2023
https://dl.acm.org/doi/10.1007/s11227-023-05208-0
Choudhury DBarik RRajam AKalyanaraman APande A(2022)Software/Hardware Co-design of 3D NoC-based GPU Architectures for Accelerated Graph ComputationsACM Transactions on Design Automation of Electronic Systems10.1145/3514354Online publication date: 4-Apr-2022
https://doi.org/10.1145/3514354
Choudhury DRajam AKalyanaraman APande P(2022)High-Performance and Energy-Efficient 3D Manycore GPU Architecture for Accelerating Graph AnalyticsACM Journal on Emerging Technologies in Computing Systems10.1145/348288018:1(1-19)Online publication date: 31-Jan-2022
https://doi.org/10.1145/3482880
Franques AKokolis AAbadal SFernando VMisailovic STorrellas J(2021)WiDir: A Wireless-Enabled Directory Cache Coherence Protocol2021 IEEE International Symposium on High-Performance Computer Architecture (HPCA)10.1109/HPCA51647.2021.00034(304-317)Online publication date: Feb-2021
https://doi.org/10.1109/HPCA51647.2021.00034
Kim R(2020)Learning-Enabled NoC Design for Heterogeneous Manycore Systems2020 21st International Symposium on Quality Electronic Design (ISQED)10.1109/ISQED48828.2020.9137000(268-272)Online publication date: Mar-2020
https://doi.org/10.1109/ISQED48828.2020.9137000
Alaei MYazdanpanah F(2020)A high‐performance FPGA‐based multicrossbar prioritized network‐on‐chipConcurrency and Computation: Practice and Experience10.1002/cpe.605533:6Online publication date: 12-Oct-2020
https://doi.org/10.1002/cpe.6055
Kalyanaraman APande P(2019)A Brief Survey of Algorithms, Architectures, and Challenges toward Extreme-scale Graph Analytics2019 Design, Automation & Test in Europe Conference & Exhibition (DATE)10.23919/DATE.2019.8715024(1307-1312)Online publication date: Mar-2019
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Fernando VFranques AAbadal SMisailovic STorrellas JBahar IHerlihy MWitchel ELebeck A(2019)ReplicaProceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems10.1145/3297858.3304033(849-863)Online publication date: 4-Apr-2019
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Zhou LChen RXia YTeodorescu R(2018)C-GraphProceedings of the 47th International Conference on Parallel Processing10.1145/3225058.3225136(1-10)Online publication date: 13-Aug-2018
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