Location via proxy:   [ UP ]  
[Report a bug]   [Manage cookies]                
Scribd Logo
Upload

Welcome to Scribd!

  • 436 views

    Ei2353:Digital System Design: Question Bank

    Uploaded by

    nithyadece
    This document contains questions from 5 units on the topic of digital system design: 1. Digital logic families including TTL, CMOS, ECL and comparisons between them. 2. Programmable logic devices including CPLD, FPGA, PAL, PLA and their applications. 3. Digital memories including SRAM, DRAM, ROM and their characteristics. 4. Digital system design case studies including displays, ADCs, frequency counters. 5. Design for testability including controllability, observability, scan-based testing.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd

    Ei2353:Digital System Design: Question Bank

    Uploaded by

    nithyadece
    436 views3 pages
    This document contains questions from 5 units on the topic of digital system design: 1. Digital logic families including TTL, CMOS, ECL and comparisons between them. 2. Programmable logic devices including CPLD, FPGA, PAL, PLA and their applications. 3. Digital memories including SRAM, DRAM, ROM and their characteristics. 4. Digital system design case studies including displays, ADCs, frequency counters. 5. Design for testability including controllability, observability, scan-based testing.

    Original Description:

    III EIE DSD 2008 REGULATION

    Original Title

    Qb Unit Wise

    Copyright

    © © All Rights Reserved

    Available Formats

    PDF, TXT or read online from Scribd

    Did you find this document useful?

    Is this content inappropriate?

    This document contains questions from 5 units on the topic of digital system design: 1. Digital logic families including TTL, CMOS, ECL and comparisons between them. 2. Programmable logic devices including CPLD, FPGA, PAL, PLA and their applications. 3. Digital memories including SRAM, DRAM, ROM and their characteristics. 4. Digital system design case studies including displays, ADCs, frequency counters. 5. Design for testability including controllability, observability, scan-based testing.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    436 views3 pages

    Ei2353:Digital System Design: Question Bank

    Uploaded by

    nithyadece
    This document contains questions from 5 units on the topic of digital system design: 1. Digital logic families including TTL, CMOS, ECL and comparisons between them. 2. Programmable logic devices including CPLD, FPGA, PAL, PLA and their applications. 3. Digital memories including SRAM, DRAM, ROM and their characteristics. 4. Digital system design case studies including displays, ADCs, frequency counters. 5. Design for testability including controllability, observability, scan-based testing.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    You are on page 1of 3

    EI2353:DIGITAL SYSTEM DESIGN

    Question Bank
    UNIT I- DIGITAL LOGIC FAMILIES

    PART A
    1. What factors determine CMOS Fan out?
    2. How is saturation delay time reduced with schottky TTL?.
    3. Compare TTL, CMOS and ECL logic families with respect to power dissipation and
    propagation delay.
    4. List the salient features of ECL family.
    5. What is the main advantage of ECL over other IC technologies? In what type of
    application should ECL not be considered?
    6. Which logic family performs better in a high-noise environment : CMOS or TTL? Why?
    7. State the advantages of a CMOS logic family.
    PART B
    1. Explain the working of basic TTL NAND gate with a neat diagram. Explain the following
    three types of output configurations 1)operation of open collector 2)Totem-pole 3) Tristate output.
    2. Explain the transfer characteristics of CMOS gate, , 2 input NAND gate and 2 input NOR
    gate.
    3. Discuss on basic ECL inverter/buffer circuit, two input OR/NOR gate operation and
    mention the characteristics of the ECL family.
    4. Discuss in detail TTL-to-CMOS interface. Explain the features of I2L.
    5. Draw the circuit of CMOS inverter and explain its operation. Also explain CMOS-toTTL interface.

    UNIT II-PROGRAMABLE LOGIC DEVICES


    PART A
    1.
    2.
    3.
    4.
    5.

    What is CPLD? List a few CPLD Devices?


    What is FPGA?What type of gate is used as programmable inversion in FPGAs?
    List the features of PLD .
    What does CPLD stand for? How is it different from the term PLD
    List two advantages of programmable logic over fixed function logic.

    6. Compare FPGA and CPLD


    7. Give the advantages of PAL over PLA.
    PART B
    1. Realize the following function using (i) PAL and (ii) PLA
    F(A,B,C,D) = m(0,2,5,7,8,10,11,14)
    2. (i)Implement the following function using suitable multiplexer F(A,B,C)= m(0,2,4,6)
    (ii)Design a two bit up counter using D Flip Flops and implement it using suitable PAL
    3. Realize the sum of product expression Y = m(0,5,10,15) using 8:1 multiplexer. Draw a
    ROM circuit that produces the following outputs.
    Y0 = ABC + ABC + A(BC) + ABC
    Y1 = ABC + ABC + ABC and Y2 = ABC + ABC
    4. Compare a ROM implementation with a PLA implementation of the circuits with output
    function.
    F1= (0,1,6,7)
    F2 =(1,3,5,6,7)
    F3 =(1,2,3)
    5. (i) Explain the schematic design of programmable interconnect and basic logic element of
    typical FPGA.
    (ii) Write short notes on CPLD.
    UNIT III- DIGITAL MEMORIES
    PART A
    1.
    2.
    3.
    4.

    What is a FIFO Memory?


    What is the advantage of EPROM over PROM?
    Compare between SRAM and DRAM.
    Determine the number of inputs, the number of outputs, and the type of output for each of
    the following PAL part number (a) PAL 12H6 (b) PAL 16L2
    5. List different types of ROMs available and their application areas.
    6. What is access and cycle time.
    7. Write any four characteristics of memory.
    PART B
    1. What is a ROM? Draw the ROM cell and explain its operation
    2. What is Memory expansion? Construct a 2K x 8 memory from 1K x 4 memories
    3. Draw a basic logic diagram for a 512 x 8 bit static RAM, showing all the inputs and
    outputs. Also, mention the capacity of a DRAM that has twelve address lines.
    4. Give two valid differences between SRAM and DRAM. Use 16k x 8 DRAM to build 64k
    x 8 DRAM, show the logic diagram
    5. With a typical three-transistor DRAM cell explain the Read and write operation with
    timing diagram.
    6. Draw the schematic diagram of a SRAM cell array and explain its operation

    UNIT IV- DIGITAL SYSTEM DESIGN CASE STUDIES


    PART A
    1.
    2.
    3.
    4.
    5.
    6.

    List the features of flash memory.


    What is the basic difference between time and frequency measurement?
    Mention some applications of PRBS generator.
    An ADC3511 is connected with a reference voltage of +2V dc. What will be the duty
    Cycle held in the counter for an analog input of 1.25V dc?
    Show how to multiplex a commonanode- type display. What happen if the pulse width
    is decreased in the multiplexing display?
    7. Draw the block diagram of a basic frequency counter.
    PART B
    1. Discuss in detail about the operation of a Digital Voltmeter with neat sketch.
    2. Discuss in detail on : (i) Frequency counter (8) (ii) Time measurement
    3. Discuss on multiplexing displays using common-anode and common-cathode type LED
    seven-segment indicator
    4. With the circuit diagram explain the operation of 4-bit PRBS generator. Give the PRBS
    output for continuous 16 clock cycles.
    5. (i) Explain the design aspects and digital logic implementation of PRBS Generator
    (ii) How are displays multiplexed and interfaced?
    6. Describe the digital logic implementation of electronic frequency counter and analyze its
    performance measures
    UNIT V-DESIGN FOR TESTABILITY
    PART A
    1.
    2.
    3.
    4.
    5.
    6.

    Give the importance of testability measures.


    When do we go for scan methods based testing?
    When is a circuit said to have poor random observability?
    Give the principle of scan based test techniques
    Mention few electrical faults and logical faults
    Define the term controllability and observability with respect to design for testing of
    logic circuits.
    7. What is test access port. Mention its significance
    PART B
    1.
    2.
    3.
    4.
    5.

    Discuss in detail about board level and system DFT approaches


    Discuss in detail about digital circuit testing by applying test vectors and by in-circuit
    testing
    Explain the following Ad Hoc Design for testability techniques (i) Test points (ii)
    Initialization and (iii) Oscillators and clocks.
    Discuss on scan-based technique with a suitable example
    Explain in detail about various types of cross point fault that occur in PLAs and also
    explain how test generation can be achieved in testing a PLA

    You might also like