MICROPROCESSOR

8085
Arithmetic Operations
 ARITHMETIC OPERATIONS
Arithmetic Operations Related to Registers

The 8085 Microprocessor performs various arithmetic

operations such as Addition, Subtraction, Increment and
decrement. These operations have the following
mnemonics:-
1.ADD : Add

2.ADI : Add Immediate

3.SUB : Subtract

4.SUI : Subtract Immediate

5.INR : Increment
1
6.DCR : Decrement
 ADD R: ADD REGISTER TO
ACCUMULATOR

 The contents of the register is added to the contents of the

accumulator and the result is stored in the accumulator.
 It is a one byte instruction.
 It belongs to the register addressing modes.
 All flags are modified to reflect the result of addition

2
 EXAMPLE:
 51H is stored in register B and the accumulator contains
47H.Add the contents of B to accumulator A.
Mem Address Opcode Operand Hex. Code
8000 MVI B,51H 06,51
8002 MVI A,47H 3E,47
8004 ADD B 80
8005 HLT 76

EXPLANATION:
47H = 0 1 0 0 0 1 1 1
51H = 0 1 0 1 0 0 0 1
98H = 1 0 0 1 1 0 0 0
FLAG STATUS:
Registers contents before instruction Registers contents after instruction
S Z AC P CY
A 47 X Flags A 98 1 0 0 0 0 Flags
B 51 X C X C 3
B
ADI: ADD IMMEDIATE TO
ACCUMULATOR

 The 8-bit data are added to the contents of the

accumulator and the result is stored in the accumulator.
 It is a two byte instruction.
 It belongs to the Immediate addressing modes.
 All flags are modified to reflect the result of addition
4
 EXAMPLE:
 The accumulator contains 4AH.Add the data byte 59H to the
contents accumulator A.
Mem Address Opcode Operand Hex. Code
8000 MVI A,4AH 3E,4A
8002 ADI 59H C6,59
8004 HLT 76

EXPLANATION:
4AH = 0 1 0 0 1 0 1 0
59H = 0 1 0 1 1 0 0 1
A3H = 1 0 1 0 0 0 1 1
FLAG STATUS:
Registers contents before instruction Registers contents after instruction

S Z AC P CY
A 4A X Flags A A3 1 0 1 1 0 Flags
5
 SUB R: SUBTRACT REGISTER FROM
ACCUMULATOR

 The contents of the register is subtracted from the contents of

the accumulator and the result is stored in the accumulator.
 It is a one byte instruction.
 It belongs to the register addressing modes.
 All flags are modified to reflect the result of subtraction.
6
 SUI: SUBTRACT IMMEDIATE FROM
ACCUMULATOR

 The 8-bit data are subtracted from the contents of the

accumulator and the result is stored in the accumulator.
 It is a two byte instruction.
 It belongs to the Immediate addressing modes.
 All flags are modified to reflect the result of subtraction.

7
 EXAMPLE FOR SUB:
 Register B has 65H and the accumulator contains 97H.Subtract the
contents of B from the contents of the accumulator A.

Mem Address Opcode Operand Hex. Code

8000 MVI A,97H 3E,97
8002 MVI B,65H 06,65
8004 SUB B 90
8005 HLT 76

EXAMPLE FOR SUI:

 The accumulator contains 97H.Subtract the data byte 65H from
the contents accumulator A.
Mem Address Opcode Operand Hex. Code
8000 MVI A,97H 3E,97
8002 SUI 65H D6,65
8004 HLT 76
8
EXPLANATION:

STEP 1: Subtrahend (B) : 65H = 0 1 1 0 0 1 0 1

1’s compliment of 65H = 1 0 0 1 1 0 1 0
(Substitute 0 for 1 and 1 for 0)
+
STEP 2: Add 01 to obtain
0000 0001
2’s compliment of 65H 9BH = 1 0 0 1 1 0 1 1

STEP 3: To Subtract : 97H – 65H +

Add 97H to 2’s compliment of 65H 97H = 1 0 0 1 0 1 1 1
11 111

CY 10 0 1 1 0 0 1 0
STEP 4: Complement Carry
Result (A) : 32H
00 0 1 1 0 0 1 0

FLAG STATUS:
Registers contents before instruction Registers contents after instruction
S Z AC P CY
A 97 X Flags A 32 0 0 1 0 0 Flags
9
B 65 X C B 65 X C
 INR: INCREMENT CONTENTS OF
REGISTER BY 1
 The contents of the designated register are incremented by 1
and the result is stored in the accumulator.
 It is a one byte instruction.
 It belongs to the register addressing modes.
 S, Z, P, AC are modified to reflect the result of the operation.
CY is not modified. 10
 EXAMPLE:
 Register D contains FFH. Specify the contents of register after
Increment.
Mem Address Opcode Operand Hex. Code
8000 MVI D,FFH 16,FF
8002 INR D 14
8003 HLT 76

EXPLANATION:
FFH = 1 1 1 1 1 1 1 1
+1 = 0 0 0 0 0 0 0 1
CY 1 1 1 1 1 1 1 1 Carry
______________
Compliment Carry 00H 00 0 0 0 0 0 0 0
FLAG STATUS:
Registers contents before instruction Registers contents after instruction
S Z AC P CY
A X X Flags A X 0 1 1 0 X Flags
D FF X E D 00 X E 11
 DCR: DECREMENT CONTENTS OF
REGISTER BY 1
 The contents of the designated register are decremented by 1
and the result is stored in the accumulator.
 It is a one byte instruction.
 It belongs to the register addressing modes.
 S, Z, P, AC are modified to reflect the result of the operation.
CY is not modified. 12
 EXAMPLE:
 Here we have to decrement the contents of D that is 00H by 1

Mem Address Opcode Operand Hex. Code

8000 MVI D,00H 16,00
8002 DCR D 15
8004 HLT 76

FLAG STATUS:
Registers contents before instruction Registers contents after instruction

S Z AC P CY
X X Flags A X 1 0 0 1 X Flags
A
00 X E D FF X E
D
13
EXPLANATION:
STEP 1: 1H: 1H = 0 0 0 0 0 0 0 1
1’s compliment of : 1H = 1 1 1 1 1 1 1 0
(Substitute 0 for 1 and 1 for 0)
+
STEP 2: Add 01 to obtain
0000 0001
2’s compliment of 01H FFH = 1 1 1 1 1 1 1 1

+
STEP 3: To Subtract : 01H – 00H
Add 00H to 2’s compliment of 01H 00H = 0 0 0 0 0 0 0 0
D =1111 1111

STEP 4: Result (A) : FFH

FLAG STATUS:
Registers contents before instruction Registers contents after instruction

S Z AC P CY
A X X Flags A X 1 0 0 1 X Flags
14
D 00 X E D FF X E
ARITHMETIC OPERATIONS RELATED TO
MEMORY

The arithmetic operations related to memory performs two tasks:

I.Copy a data byte from memory to the Microprocessor.

II.Perform arithmetic operations.

These instructions(other than INR and DCR) implicitly assume that

one of the operands is (A); after an operation, the previous contents
of the accumulator is replaced by the result. These operations have
the following mnemonics:-
1.ADD : Add

2.SUB : Subtract

3.INR : Increment 15
4.DCR : Decrement
ADD M: ADD MEMORY TO ACCUMULATOR
 The contents of the memory is added to the contents of the
accumulator and the result is stored in the accumulator.
 The memory location is specified by the contents of HL register
pairs.
 It is a one byte instruction.
 It belongs to indirect addressing mode.
16
 All flags are affected to reflect the result of addition.
 EXAMPLE:
 Mem.location 2050H has A2H and the accumulator has 76H.Add the contents
of memory to the contents of the accumulator.
Mem Address Opcode Operand Hex. Code
8000 LXI H,2050H 21,50,20
8003 ADD M 86
8004 HLT 76

EXPLANATION:
(A) 76H = 0 1 1 1 0 1 1 0
(2050H)mem A2H = 1 0 1 0 0 0 1 0
CY 1 18H = 10 0 0 1 1 0 0 0
FLAG STATUS:
Memory contents before instruction Memory contents after instruction
S Z AC P CY
A 76 X Flags A 18 0 0 0 1 1 Flags
B X X C B X X C
D X X E D X X E
H 20 50 L H 20 50 L 17
 SUB M: SUBTRACT MEMORY FROM
ACCUMULATOR
 The contents of the memory are subtracted from the contents of
the accumulator and the result is stored in the accumulator.
 The memory location is specified by the contents of HL register
pairs.
 It is a one byte instruction.
 It belongs to indirect addressing mode.
18
 All flags are affected to reflect the result of subtraction.
 EXAMPLE:
 Mem.location 2050H has 7FH and the accumulator has 98H.Subtract
the contents of memory from the contents of the accumulator.

Mem Address Opcode Operand Hex. Code

8000 LXI H,2050H 21,50,20
8003 SUB M 96
8004 HLT 76

FLAG STATUS:
Memory contents before instruction Memory contents after instruction

S Z AC P CY
A 98 X Flags A 19 0 0 0 0 0 Flags
B X X C B X X C
D X X E D X X E
H 20 50 L H 20 50 L

19
EXPLANATION:
STEP 1: Subtrahend (2050H) : 7FH = 0 1 1 1 1 1 1 1
1’s compliment of : 7FH = 1 0 0 0 0 0 0 0
(Substitute 0 for 1 and 1 for 0)
+
STEP 2: Add 01 to obtain 0000 0001
2’s compliment of 7FH 81H = 1 0 0 0 0 0 0 1

STEP 3: To Subtract : 98H – 7FH +

Add 98H to 2’s compliment of 7F 98H = 1 0 0 1 1 0 0 0
10 0 0 1 1 0 0 1

STEP 4: Complement Carry CY 00 0 0 1 1 0 0 1

Result (A) : 19H
FLAG STATUS:
Memory contents before instruction Memory contents after instruction
S Z AC P CY
A 98 X Flags A 19 0 0 0 0 0 Flags
B X X C B X X C
D X X E D X X E
20
H 20 50 L H 20 50 L
INR M: INCREMENT CONTENTS OF MEMORY BY 1

 The contents of the designated memory are incremented by 1 and

the result is stored in the same place.
 It is a one byte instruction.
 It belongs to indirect addressing mode.
 S, Z, P, AC are modified to reflect the result of the operation. CY
is not modified.
 The memory location is specified by the contents of the HL
register pairs.
21
 EXAMPLE:
 Increment the memory location 2075H which holds
7FH.Assume HL register contains 2075H.
Mem Address Opcode Operand Hex. Code
8000 MVI M,7FH 36,7F
8002 LXI H,2075H 21,75,20
8005 INR M 34
8006 HLT 76

Memory contents before instruction

H 20 75 L Memory

2074

2075 7F

2076
22
EXPLANATION:
7FH = 0 1 1 1 1 1 1 1
Incremented by 1 : 01H = 0 0 0 0 0 0 0 1
Result : 80H = 1 0 0 0 0 0 0 0
Memory contents before instruction Memory contents after instruction

H 20 75 L Memory H 20 75 L Memory

2074 2074

2075 7F 2075 80

2076 2076
FLAG STATUS:
Memory contents before instruction Memory contents after instruction
S Z AC P CY
A X X Flags A X 1 0 1 0 X Flags
B X X C B X X C
D X X E D X X E
H 20 75 L H 20 75 L 23
 DCR M: DECREMENT CONTENTS OF
MEMORY BY 1
 The contents of the designated memory are decremented by 1
and the result is stored in the same place.
 It is a one byte instruction.
 It belongs to indirect addressing mode.
 S, Z, P, AC are modified to reflect the result of the operation. CY
is not modified.
 The memory location is specified by the contents of the HL
register pairs.
24
 EXAMPLE:
 Decrement the memory location 2085H which holds
A0H.Assume HL register contains 2085H.
Mem Address Opcode Operand Hex. Code
8000 MVI M,A0H 36,A0
8002 LXI H,2085H 21,85,20
8005 DCR M 34
8006 HLT 76

Memory contents before instruction Memory contents after instruction

H 20 85 L Memory H 20 85 L Memory
2084 2084
2085 A0 2085 9F
2086 2086
25
EXPLANATION:
STEP 1: 1H: 1H = 0 0 0 0 0 0 0 1
1’s compliment of : 1H = 1 1 1 1 1 1 1 0
(Substitute 0 for 1 and 1 for 0)
+
STEP 2: Add 01 to obtain 0000 0001
2’s compliment of 01H FFH = 1 1 1 1 1 1 1 1
+
STEP 3: Add A0H to 2’s compliment of 01H A0H = 1 0 1 0 0 0 0 0
STEP 4: Complement Carry
11001 1111
Result (M) : 9FH 9F = 1 0 0 1 1 1 1 1

FLAG STATUS:
Memory contents before instruction Memory contents after instruction
S Z AC P CY
A X X Flags A X 1 0 0 1 X Flags
B X X C B X X C
D X X E D X X E
20 85 L 26
H H 20 85 L
ARITHMETIC OPERATIONS RELATED
TO 16-BIT OR REGISTER PAIRS
INX: INCREMENT REGISTER PAIR BY 1

• The contents of the specified register pair is incremented by 1.

• It treats the contents of two register pairs as one 16-bit number
and increases the contents by 1.
• It is a one byte instruction.
• No flags are affected.
27
EXAMPLE:
 Register pair HL contains 9FFFH.Specify the contents of the register if it
is incremented by 1.
Mem Address Opcode Operand Hex. Code
8000 LXI H,9FFFH 21,FF,9F
8003 INX H 23
8004 HLT 76

EXPLANATION:
9FFFH = 1 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1
Incremented by 1 : 01H = 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1
Result : A000H = 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0

Memory contents before instruction Memory contents after instruction

H 9F FF L H A0 00 L

28
DNX: DECREMENT REGISTER PAIR BY 1

 The contents of the specified register pair is decremented by 1.

 It treats the contents of two register pairs as one 16-bit number
and decreases the contents by 1.
 It is a one byte instruction.
 No flags are affected.
29
EXAMPLE:
 Register pair HL contains 2000H.Specify the contents of the register if it
is decremented by 1.
Mem Address Opcode Operand Hex. Code
8000 LXI H,2000H 21,00,20
8003 DCX H 2B
8004 HLT 76

Memory contents before instruction Memory contents after instruction

H 20 00 L H 1F FF L

30
EXPLANATION:

STEP 1:
1H: 1H = 0000 0000 0000 0001
1’s compliment of : 1H = 1111 1111 1111 1110
(Substitute 0 for 1 and 1 for 0)
+
STEP 2: Add 01 to obtain 0000 0000 0000 0001
2’s compliment of 01H FFFFH = 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

STEP 3: Add 2000H to +

2’s compliment of 01H 2000H = 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0
STEP 4: Complement Carry CY = 10 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1
Result (A) : 1FFFH 1FFF = 00 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1

Memory contents before instruction Memory contents after instruction

H 20 00 L H 1F FF L

31