N-Channel Enhancement Mode Field Effect Transistor: Voltage Package Current
N-Channel Enhancement Mode Field Effect Transistor: Voltage Package Current
N-Channel Enhancement Mode Field Effect Transistor: Voltage Package Current
DESCRIPTION
N-channel enhancement mode field effect transistor, designed for high speed pulsed amplifier and driver applications, which is manufactored by the N-Channel DMOS process.
FEATURES
High density cell design for low RDS(ON). Voltage controlled small signal switching. Rugged and reliable. High saturation current capability. High-speed switcing. CMOS logic compatible input. Not thermal runaway. No secondary breakdown.
S
ABSOLUTE MAXIMUM RATINGS
TA = 25OC Unless otherwise noted.
Symbol V
DSS
2N7002 60 60
20 20
Units V V V mA mW mW / OC
O
1M)
VDRG V
GSS
Gate Source Voltage -Continuous -No Repetitive (tp<50s) Maximum Drain Current -Continuous -Pulsed Maximum POwer Dissipation Derated Above 25OC Operation and Storage Temperature Range Thermal Resistance, Junction-to-Ambient
ID P
D
TJ , TSTG RJA
C/W
PAGE 1
ELECTRICAL CHARACTERISTICS
TA = 25OC Unless otherwise noted. Parameter Symbol Conditions Min. Typ. Max. Units
OFF CHARACTERISTICS
Drain-Source Breakdown Voltage Zero Gate Voltage Drain Current Gate - Body Leakage, Forward Gate - Body Leakage, Reverse BVDSS I DSS I GSSF I GSSR VGS=0V, ID=10A VDS=60V, VGS=0V, TJ=25OC VDS=60V, VGS=0V, TJ=125OC VDS=0V, VGS=20V VDS=0V, VGS= -20V 60 1.0 0.5 100 -100 V A mA nA nA
ON CHARACTERISTICS (note1)
Gate Threshold Voltage Static Drain-Source On-Resistance Drain-Source On-Voltage On-State Drain Current Forward Transconductance VGS(th) RDS(ON) VDS(ON) I D(ON) GFS VDS=VGS, ID=250A VGS=10V, ID=500mA, TJ=100OC VGS=10V, ID=500mA VGS=5.0V, ID=50mA VGS=10V, VDS 2VDS(ON) VDS 2VDS(ON), ID=200mA 1 500 80 2.1 1.2 0.60 0.09 2700 320 2.5 7.5 3.75 1.50 V V mA mS
DYNAMIC CHARACTERISTICS
Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Time Turn-Off Time CISS COSS CRSS TON TOFF VDS=25V, VGS=0V, F=1.0 MHz VDS=25V, VGS=0V, F=1.0 MHz VDS=25V, VGS=0V, F=1.0 MHz VDD=30V, RL=150, ID=200 mA VGS=10V, RGEN=25 VDD=30V, RL=150, ID=200 mA VGS=10V, RGEN=25 20 11 4 50 25 5 20 20 pF pF pF ns ns
PAGE 2
2.0
3.0
V GS =4.0V
V GS =10V
9.0
8.0 7.0
1.5
2.5
4.5 5.0 6.0 7.0 8.0
6.0
2.0
1.0
5.0
1.5
9.0 10
0.5
4.0 3.0
1.0 0.5
0.4
0.8
1.2
1.6
2.0
V GS =10V 2.0
I D =500mA
1.5
2.0 1.5
25 C
O
1.0
1.0
-55 C
O
0.5 0
0.5 -50
-25
25
50
75
100
O
125
150
0.4
0.8
1.2
1.6
2.0
V DS =10V 2.0
TJ = -55 C
O
V DS = V GS 1.1
I D = 1mA
25 C 125 C
O
1.0
0.9
0.8
10
-50
-25
25
50
75
100
O
125
150
PAGE 3
I D = 250 m A
V GS =0V 1
1.10
1.05
0.1
TJ = 125 C
1.00
25 C
0.01
-55 C
0.001 0.2
0.4
0.6
0.8
1.0
1.2
1.4
VSD, Body Diode Forward Voltage (V) Body Diode Forward Voltage v.s. Current and Temperature
f=1MHz 50
V GS =0V
VDS = 25V
10 8 6
ID = 500mA
CISS
Capactance (pF)
20 10 5
Coss
Crss
4 2 0
280mA 115mA
2 1 1 2 3 5 10 20 30 50
0.1
0.8
1.2
1.6
2.0
1 0.5 0.2 0.1 0.05 P(pk) t1 0.01 t2 TJ - TA = P * RqJA (t) Duty Cycle, D = t1 / t2 0.001 0.01 0.1 1 10 100 300 RqJA (t) = r(t) * RqJA RqJA = (See Datasheet)
PAGE 4
T A= 25 C
VDD
10 0m s
0.5
RD
0.1 0.05
S(O
L N)
t imi
RL VIN D VOUT
1m s
VGS
RGEN
G S
DUT
0.01 0.005 1 2 5 10 20 30 60 80
VDS, Drain-Source Voltage (V) Maximum Safe Operating Area Switching Test Circuit
t off tf 90%
10% 90%
10% Inverted
V IN 10%
50%
Switching Waveforms
PAGE 5
OUTLINE DRAWING
SOT-23
.119(3.00) .110(2.80)
.007(.20) MIN.
.083(2.10) .066(1.70)
.006(.15) MAX.
.006(.15) .002(.05)
.020(.50) .013(.35)
.044(1.10) .035(.90)
.103(2.60) .086(2.20)
.056(1.40) .047(1.20)
PAGE 6