COURSE INFORMATION SHEET

PROGRAMME: B.Tech in ECE DEGREE: BTECH

COURSE: VLSI Design SEMESTER: II CREDITS: 4
COURSE CODE:R32045
REGULATION:R10
COURSE TYPE: CORE
COURSE AREA/DOMAIN: ECE / VLSI CONTACT HOURS: 4+1 (Tutorial) hours/Week.
CORRESPONDING LAB COURSE CODE (IF
ANY):R32048
LAB COURSE NAME: Electronic Computer Aided
design Laboratory
SYLLABUS:
UNIT DETAILS HOURS
I
INTRODUCTION: introduction to IC Technology, the IC Era, MOS and related VLSI
technology .Basic MOS transistors, enhancement and depletion modes of transistor action, IC
production process, MOS and CMOS fabrication process BICMOS technology, Comparison
between CMOS and Bipolar technologies.
8
II
BASIC ELECTRICAL PROPERTIES OF MOS AND BICMOS CIRCUITS: I
ds
versus
V
ds
Relationships, aspects of MOS transistor threshold voltage, MOS trans conductance and
output conductance , MOS transistor figure of merit, the pass transistor ,then MOS inverter
,determination of pull up to pull- down ratio for nMOS inverter driven by another nMOS
inverter and for an nMOS inverter driven through one or more pass transistors ,alternative
forms of pull up, the CMOS inverter ,MOS transistor circuit model ,Bi-CMOS inverter ,latch
up in CMOS circuits and BiCMOS latch up susceptibility
9
III
MOS AND BICMOS CIRCUIT DESIGN PROCESSES:MOS layer ,stick diagrams
,design rules and layout, general observations on the design rules .2m double metal double
poly CMOS/BICMOS rules ,1.2 m double metal ,double poly CMOS rules ,layout diagrams
if NAND and NOR gates and CMOS inverter ,Symbolic diagrams Translation on mask
form.
8
IV
BASIC CIRCUIT CONCEPTS: Sheet resistance ,sheet resistance concepts applied to MOS
transistors and invertors ,area capacitance of layer ,standard unit of capacitance some area
capacitance calculations ,the delay unit ,inverter delays ,driving large capacitive loads
,propagation delays, wining capacitances ,fan in and fan out characteristics, Choice of layers,
transistor switches, realization of gates using nMOS, pMOS and CMOS technologies.
9
V
SCALING OF MOS CIRCUITS: Scaling models and scaling factors, scaling factors for
device parameters, limitations of scaling, limits due to sub threshold currents .limits on logic
levels and supply voltage due to noise ,limits due to current density ,some architectural issues
,introduction to switch logic and gate logic.
7
VI
SEMICONDUCTOR INTEGRATED CIRCUITS DESIGN: Introduction to
programmable logic devices (PLDs),programmable logic arrays (PLA) ,programmable array
logic(PAL) ,implementation approaches in VLSI design full custom design ,semi custom
design gate arrays ,standard cells ,complex programmable logic devices (CPLDs),field
programmable gate arrays (FPGAs),Design issues .
8
VII
DIGITAL DESIGN USING HDL: Digital system design process, VLSI circuit design
process ,Hardware simulation ,Hardware Synthesis History of VHDL,VHDL requirements
,levels of abstraction, elements of VHDL ,packages ,libraries and bindings ,objects and
classes ,variables assignments ,sequential statements ,usage of subprograms ,comparison of
VHDL and verilog HDL
8
VIII
VHDL MODELLING: Simulation ,logic Synthesis ,inside a logic synthesizer ,constraints
,technology libraries ,VHDL and logic synthesis ,functional gate level verification ,place and
route ,post layout timing simulation ,static timing ,major net list formats for design
representation ,VHDL synthesis programming approach .
7
TOTAL HOURS 64
TEXT/REFERENCE BOOKS:
T/R BOOK TITLE/AUTHORS/PUBLICATION
T
Essential of VLSI Circuits and systems Kamran Eshraghian,Douglas and A.Pucknell and Sholeh
Eshraghian ,prentice-Hall of india private limited .2005 edition .
T
Vlsi design A Shanthi and A.Kavita, new age international private limited ,2006 first edition
T
VLSI design K.Lal kishore and V.S.V.Prabhakar, I.K.international publishing house private
limited, 2009 first edition
R VLSI Design By Debaprasad Das, Oxford university press, 2010
R VLSI Design By A.Albert Raj & T.Latha, PHI Learing private limited 2010
R
Principles of VLSI and CMOS integrated circuits by richa jain & Amrita Rai. S,Chand, & company
limited, First Edition, 2012
COURSE PRE-REQUISITES:
C.CODE COURSE NAME DESCRIPTION YEAR/SEM
R21026 Electronic devices & Circuits MOSFET,BJT II/I
R22029 Switching theory & Logic
Design
Digital Circuits II/II
R31042 Digital IC Applications Logic families III/I
COURSE OBJECTIVES:
1 To understand Electrical Properties of MOS and Bi-CMOS Circuits.
2 To discuss about various Design Approaches in VLSI design.
3 To understand the design and analyze digital circuits, understand transistor operations, circuit
families, area-power-performance analysis, layout design techniques.
4
To describe Electronic Systems (digital hardware) at various levels of abstractions using VHDL.

COURSE OUTCOMES:
SNO DESCRIPTION PO MAPPING
1 Understand about Electrical Properties of MOS and Bi-CMOS Circuits. A,C,E,F,G,I,K
2 Understand about the Design Issues. A,B,C,D,E,F,G,H,I,J,K
3 Able to write the HDL code for different digital circuits in different
models.
A,B,C,D,E,F,G,H,I,J,K
GAPS IN THE SYLLABUS - TO MEET INDUSTRY/PROFESSION REQUIREMENTS:
S.NO DESCRIPTION PROPOSED ACTIONS
1 Crystal growth, Photo lithography, Oxidation, Metallization PPT
2 Production of E-beam Masks
Chalk & Talk
3 Eulars Path
Chalk & Talk

PROPOSED ACTIONS: TOPICS BEYOND SYLLABUS/ASSIGNMENT/INDUSTRY VISIT/GUEST
LECTURER/NPTEL ETC


TOPICS BEYOND SYLLABUS/ADVANCED TOPICS/DESIGN:
1
MESFET
2
CMOS Inverter as an Amplifier
3
Introduction to Verilog
WEB SOURCE REFERENCES:
1 https://www.youtube.com/watch?v=CLUoWkJUnN0
2 www.viit.ac.in/UNIT1_ghongade.pdf
3 http://www.asic-world.com/vhdl/
4 http://lecturenotes.in/notes/engg/paper/vlsi/index.html
5 http://www.youtube.com/watch?v=AOaJFKWXYY0
6 http://www.youtube.com/watch?v=OBiu2agne_U
7 http://www.cmosvlsi.com/coursematerials.html
8 http://www.learnerstv.com/Free-Engineering-Video-lectures-ltv176-Page1.htm
DELIVERY/INSTRUCTIONAL METHODOLOGIES:
CHALK & TALK STUD.
ASSIGNMENT
WEB RESOURCES
LCD/SMART
BOARDS
STUD. SEMINARS ADD-ON COURSES
ASSESSMENT METHODOLOGIES-DIRECT
ASSIGNMENTS STUD.
SEMINARS
TESTS/MODEL EXAMS UNIV. EXAMINATION
STUD LAB
PRACTICES
STUD. VIVA MINI/MAJOR
PROJECTS
CERTIFICATIONS
ADD-ON
COURSES
OTHERS

ASSESSMENT METHODOLOGIES-INDIRECT
ASSESSMENT OF COURSE OUTCOMES (BY
FEEDBACK, ONCE)
STUDENT FEEDBACK ON FACULTY
(TWICE)
ASSESSMENT OF MINI/MAJOR PROJECTS BY
EXT. EXPERTS
OTHERS