What is a digital-to-analog converter?

A.
It takes the digital information from an audio CD and converts it to a usable form.
B.
It allows the use of cheaper analog techniques, which are always simpler.
C.
It stores digital data on a hard drive.
D.
It converts direct current to alternating current.


A full subtracter circuit requires ________.
A.
two inputs and two outputs
B.
two inputs and three outputs
C.
three inputs and one output
D.
three inputs and two outputs



Give the decimal value of binary 10010.
A.
610 B.
910
C.
1810 D.
2010

Which of the following is not an analog device?
A.
Thermocouple
B.
Current flow in a circuit
C.
Light switch
D.
Audio microphone


A flip-flop has ________.
A.
one stable state
B.
no stable states
C.
two stable states
D.
none of the above


Digital signals transmitted on a single conductor (and a ground) must be transmitted in:
A.
slow speed.
B.
parallel.
C.
analog.
D.
serial.


n positive logic, ________.
A.
a HIGH = 1, a LOW = 0
B.
a LOW = 1, a HIGH = 0
C.
only HIGHs are present
D.
only LOWs are present


The rise time is the time it takes a pulse to go from ________.
A.
the base line to the maximum HIGH voltage
B.
10% of the pulse amplitude to the maximum HIGH voltage
C.
the base line to 90% of the pulse amplitude
D.
10% of the pulse amplitude to 90% of the pulse amplitude


A multiplexer has ________.
A.
one input and several outputs
B.
one input and one output
C.
several inputs and several outputs
D.
several inputs and one output

What kind of logic device or circuit is used to store information?
A.
Counter B.
Register
C.
Inverter D.
Buffer

A type of digital circuit technology that uses bipolar junction transistors is ________.
A.
TTL B.
CMOS
C.
LSI D.
NMOS

A classification of ICs with complexities of 12 to 100 equivalent gates on a chip is known as
________.
A.
SSI B.
MSI
C.
LSI D.
VLSI


If a signal passing through a gate is inhibited by sending a LOW into one of the inputs, and the
output is HIGH, the gate is a(n):
A.
AND B.
NAND
C.
NOR D.
OR


TTL operates from a ________.
A.
9-volt supply
B.
3-volt supply
C.
12-volt supply
D.
5-volt supply

How many flip-flops are required to make a MOD-32 binary counter?
A.
3 B.
45
C.
5 D.
6

What is the difference between combinational logic and sequential logic?
A.
Combinational circuits are not triggered by timing pulses, sequential circuits are triggered by
timing pulses.
B.
Combinational and sequential circuits are both triggered by timing pulses.
C.
Neither circuit is triggered by timing pulses.


To operate correctly, starting a ring counter requires:
A.
clearing one flip-flop and presetting all the others.
B.
clearing all the flip-flops.
C.
presetting one flip-flop and clearing all the others.
D.
presetting all the flip-flops.


How is a J-K flip-flop made to toggle?
A.J = 0, K = 0
B. J = 1, K = 0
C. J = 0, K = 1
D.J = 1, K = 1

Referring to the GAL diagram, which is the correct logic function?

A.
B.
C.
D.

Implementing the expression AB + CDE using NAND logic, we get:

A.(A) B. (B)
C. (C) D.(D)

The following waveform pattern is for a(n) ________.

A.2-input AND gate
B. 2-input OR gate
C. Exclusive-OR gate
D.None of the above


The circuits in the 8085A that provide the arithmetic and logic functions are called the:
A.CPU
B. ALU
C. I/O
D.none of the above


How many buses are connected as part of the 8085A microprocessor?
A.2 B. 3
C. 5 D.8

Single-bit indicators that may be set or cleared to show the results of logical or arithmetic
operations are the:
A.flags B. registers
C. monitors D.decisions


The register in the 8085A that is used to keep track of the memory address of the next op-code to
be run in the program is the:
A.stack pointer
B. program counter
C. instruction pointer
D.accumulator

1. Which interrupt has the highest priority?
a) INTR b) TRAP c) RST6.5

2. In 8085 name the 16 bit registers?
a) Stack pointer b) Program counter c) a & b

3. Which of the following is hardware interrupts?
a) RST5.5, RST6.5, RST7.5 b) INTR, TRAP c) a & b

4. What is the RST for the TRAP?
a) RST5.5 b) RST4.5 c) RST4

5. What are level Triggering interrupts?
a) INTR&TRAP b)RST6.5&RST5.5 c)RST7.5&RST6.5

7. What are software interrupts?
a) RST 0 - 7 b) RST 5.5 - 7.5 c) INTR, TRAP


8. Which stack is used in 8085?
a) FIFO b) LIFO c) FILO
9. Why 8085 processor is called an 8 bit processor? a)
Because 8085 processor has 8 bit ALU.
b) Because 8085 processor has 8 bit data bus. c) a &
b.
10. What is SIM?
a) Select Interrupt Mask b) Sorting Interrupt Mask c) Set Interrupt Mask.
11. RIM is used to check whether, ______
a) The write operation is done or not b) The
interrupt is Masked or not
c) a & b
12. What is meant by Maskable interrupts?
a) An interrupt which can never be turned off.
b) An interrupt that can be turned off by the programmer.
c) none
13. In 8086, Example for Non maskable interrupts are
a) Trap b) RST6.5 c) INTR
14. What does microprocessor speed depends on?
a) Clock b) Data bus width c) Address bus width
15. Can ROM be used as stack?
a) Yes b) No c) sometimes yes, sometimes no
16. Which processor structure is pipelined?
a) all x80 processors b) all x85 processors c) all x86 processors
17. Address line for RST3 is?
a) 0020H b) 0028H c) 0018H
18. In 8086 the overflow flag is set when
a) The sum is more than 16 bits
b) Signed numbers go out of their range after an arithmetic operation
c) Carry and sign flags are set
d) During subtraction
19. The advantage of memory mapped I/O over I/O mapped I/O is,
a) Faster
b) Many instructions supporting memory mapped I/O
c) Require a bigger address decoder
d) All the above
20. BHE of 8086 microprocessor signal is used to interface the a)
Even bank memory
b) Odd bank memory c) I/O
d) DMA
21. In 8086 microprocessor the following has the highest priority among all type
interrupts.
a) NMI b) DIV 0
c) TYPE 255
d) OVER FLOW
22. In 8086 microprocessor one of the following statements is not true.
a) Coprocessor is interfaced in MAX mode
b) Coprocessor is interfaced in MIN mode
c) I/O can be interfaced in MAX / MIN mode
d) Supports pipelining
23. 8088 microprocessor differs with 8086 microprocessor in a)
Data width on the output
b) Address capability
c) Support of coprocessor
d) Support of MAX / MIN mode
24. Address line for TRAP is?
a) 0023H b) 0024H c) 0033H

Indicate the order in which the microprocessor provides the operations on instructions:
a. Interpret
b. Fetch
c. Execute
d. Address or locate
Match the functions shown to one of the units from the microcomputer
a. Program Memory
b. Control Inputs
c. Data Memory
d. Control Outputs
e. Communication Inputs
f. Communication Outputs
g. Microprocessor
A. Store Data
B. Time and Control System
C. Store Instructions
D. Perform Work
E. Monitor external conditions
F. Receive information from operators.
G. Send information to operators.
A 14-bit binary signal could represent one of _____ different numbers.
a. 4096 c. 16384
b. 8192 d. 32768
Microprocessors examine digital input signals:
a. When they change.
b. All the times.
c. At specific times determined by the system clock.
d. None of the above.
In a microcomputer data can flow from :
a. Processor to program memory.
b. Program memory to processor.
c. Input devices to output devices.
d. Data memory to and from the processor.
e. Input devices to processor.
f. Processor to output devices.
g. All the above.
h. a, b, and c above.
i. b, d, e and f above.
The program counter of a microprocessor contains:
a. The address of data.
b. The value of the data.
c. The address of an instruction.
d. None of the above.

A 32-bit address bus allows access to a memory of capacit y
(a) 64 Mb
(b) 16 Mb
(c) 1Gb
(d) 4 Gb

Whi c h pr oc e s s or s t r uc t ur e i s pi pe l i ne d?
a)all x80 processors
b) all x85 processors
c) all x86 processors

A 32-bit address bus allows access to a memory of capacity
(a) 64 Mb
(b) 16 Mb
(c) 1Gb
(d) 4 Gb
Which processor structure is pipelined?
a)all x80 processors
b) all x85 processors
c) all x86 processors

In 8086 microprocessor one of the following statements is not true
.a)Coprocessor is interfaced in MAX mode
b)Coprocessor is interfaced in MIN mode
c)I/O can be interfaced in MAX / MIN mode
d)Supports pipelining

5.In an 8085 microprocessor, the instruction CMP B has been executed while the contents of
accumulator is less than that of register B. As a result carry flag and zero flag will be
respectively
(A)set, reset
(B) reset, set
(C) reset, reset
(D) set, set

Registers, which are partially visible to users and used to hold conditional, are known as
a.PC
b.Memory address registers
c.General purpose register
d.Flags

The 8255 Programmable Peripheral Interface isused as described below.
An A/D converter is interfaced to a microprocessor through an 8255. The conversion is initiated
by a signalfrom the 8255 on Port C. A signal on Port C causes datato be stobed into Port A.
Two computers exchange data using a pair of 8255s.Port A works as a bidirectional data port
supported byappropriate handshaking signals. The appropriatemodes of operation of the 8255 for
(i) and (ii) would be
(A)Mode 0 for (i) and Mode 1 for (ii)
(B)Mode 1 for (i) and Mode 2 for (ii)
(C)Mode 2 for (i) and Mode 0 for (ii)
(D)Mode 2 for (i) and Mode 1 for (ii)


The flag that cannot be operated by direct instructions is
a) Cy b) Z c) P d)AC
16.The number of software interrupts in 8085 is ____
a) 5 b)8 c) 9 d) 10
Adress line for RST 3 is
a) 0020H b) 0028H c)0018H d) 0038H

20.Interfacing devices for serial communication, programmable interval timer are
respectivelya)
8257, 8253
b) 8253, 8251 c) 8257,8251 d)8251,8257

The contents of accumulator before CMA instruction is A5H. Its content after
instructionexecution isa) A5H b)
5AH
c) AAH d) 55H

In an 8085 based system, the maximum number of input output devices can be connectedusing
I/0 mapped I/O method isa) 64 b)
512
c) 256 d) 65536



Serial port interrupt is generated, if ____ bits are seta) IE b) RI, IE c) IP, TI d)
RI, TI

The TRAP is one of the interrupts available its INTEL 8085. Which one of the
followingstatements is true of TRAP?(a)It is level triggered(b)It is negative edge triggered(c)It is
positive edge triggered
(d)It is both positive edge triggered and level triggered
In an 8085 based system, the maximum number of input output devices can be connectedusing
I/0 mapped I/O method isa) 64 b)
512
c) 256 d) 65536

When the RET instruction at the end of subroutine is executed,1.the information where the stack
is iniatialized is transferred to thestack pointer 2.the memory address of the RET instruction is
transferred to the program counter
3.two data bytes stored in the top two locations of the stack aretransferred to the program counter
4.two data bytes stored in the top two locations of the stack aretransferred to the stack pointer

1. Which interrupt has the highest priority?
a) INTR b) TRAP c) RST6.5
2. In 8085 name the 16 bit registers?
a) Stack pointer b) Program counter c) a & b
3. Which of the following is hardware interrupts?
a) RST5.5, RST6.5, RST7.5 b) INTR, TRAP c) a & b
4. What is the RST for the TRAP?
a) RST5.5 b) RST4.5 c) RST4
5. What are level Triggering interrupts?
a) INTR&TRAP b)RST6.5&RST5.5 c)RST7.5&RST6.5
6. Which interrupt is not level sensitive in 8085?
a) RST6.5 is a raising edge-trigging interrupt.
b) RST7.5 is a raising edge-trigging interrupt.
c) a & b.
7. What are software interrupts?
a) RST 0 - 7 b) RST 5.5 - 7.5 c) INTR, TRAP