Asst. Prof.

Alkesh M Khatri

MPI Sem- IV

Samarth College of Engineering and Technology

Unit 1 Introduction to 8 bit Microprocessor
Q.1.

Draw Schematic to Generate read / write Control Signal for memory and I/O of
8085 Microprocessor.

Q.2.

Draw & Explain Programming Model of 8085 Microprocessor. Explain

working of 16bit Register.

Q.3.

Explain Architecture of 8085 Microprocessor with help of Block diagram.

Explain Function of Each block in details.

Q.4.

Explain T State, Machine Cycle & Instruction Cycle.

Q.5.

Sketch the bus Structure of Microprocessor & Explain Data , Address and
Control Bus.

Q.6.

Draw Pin Diagram of 8085 Microprocessor and explain its pin configuration.

Asst. Prof. Alkesh M Khatri

MPI Sem- IV

Solution of Assignment 1
Q.1.

Draw Schematic to Generate read / write Control Signal for memory and I/O of
8085 Microprocessor.

Ans.1 Generating Control signals: The Mp provides RD and WR signals to initiate read
and write

cycle. Because these signals are used both for reading / writing

memory or reading writing an input/output device, it is necessary to generate

separate read and write signals for

memory

and

I/O

provides IO/M signal to indicate that initiated cycle is for

devices.
I/O

8085

device

or

for memory device. Using IO/M signal along with RD and WR, it is possible to
generate four signals shown below.
MEMR (Memory Read)

: To read data from memory

MEMW(Memory Write)

: To write data in memory

IOR (I/O Read)

: To read data from I/O devices

IOW (I/o Write)

: To write data in I/O devices.

We know that for OR gate , When the both inputs are low then only output is
low. The signal

IO/M signal goes low for memory operation. This signal is

logically OR-ed with RD and WR to

get MEMR and MEMW signals. When

both RD and IO/M signals go low, MEMR signals in

goes low. Similarly when

both WR and ME/MW signal goes low. To generate IO/R and IO/W
signals for I/O operation, IO/M signal is first inverted and then Logically OR-ed
with RD and WR signals.

Asst. Prof. Alkesh M Khatri

MPI Sem- IV

Same truth table can be implemented using 3:8 decoder.

Q.2.

Draw & Explain Programming Model of 8085 Microprocessor. Explain working

of 16bit Register.

Ans.1 The 8085 programming model includes six registers, one accumulator, and one
flag register, as shown in Figure. In addition, it has two 16-bit registers: the
stack pointer and the program
follows.

counter.

They

are

described

briefly

as

Asst. Prof. Alkesh M Khatri

MPI Sem- IV

Registers
The 8085 has six general-purpose registers to store 8-bit data; these are
identified as B,C,D,E,H, and L as shown in the figure. They can be combined as
register pairs -BC, DE, and HL - to perform some 16-bit operations. The
programmer can use these registers to store or copy data into the registers by
using data copy instructions.
Accumulator
The accumulator is an 8-bit register that is a part of arithmetic/logic unit (ALU).
This register is used to store 8-bit data and to perform arithmetic and logical
operations. The result of an operation is stored in the accumulator. The
accumulator is also identified as register A.
Flags
The ALU includes five flip-flops, which are set or reset after an operation
according to data conditions of the result in the accumulator and other registers.
They are called Zero(Z), Carry (CY), Sign (S), Parity (P), and Auxiliary Carry
(AC) flags; their bit positions in the flag register are shown in the Figure below.
The most commonly used flags are Zero, Carry, and Sign. The microprocessor
uses these flags to test data conditions.

For example, after an addition of two numbers, if the sum in the accumulator id
larger than eight bits, the flip-flop uses to indicate a carry -- called the Carry
flag (CY) -- is set to one. When an arithmetic operation results in zero, the flipflop called the

Zero(Z) flag is set to one. The first Figure shows an 8-bit

register, called the flag register, adjacent to the accumulator. However, it is not
used as a register; five bit positions out of eight are used to store the outputs of
the five flip-flops. The flags are stored in the 8-bit register so that the
programmer can examine these flags (data conditions) by accessing the register
through an instruction.
These flags have critical importance in the decision-making process of the
microprocessor.

Asst. Prof. Alkesh M Khatri

MPI Sem- IV

The conditions (set or reset) of the flags are tested through the software
instructions. For example, the instruction JC (Jump on Carry) is implemented to
change the sequence of a program when CY flag is set. The thorough
understanding of flag is essential in writing assembly language programs.
Program Counter (PC)
This 16-bit register deals with sequencing the execution of instructions. This
register is a memory pointer. Memory locations have 16-bit addresses, and that
is why this is a 16-bit register.
The microprocessor uses this register to sequence the execution of the
instructions. The function of the program counter is to point to the memory
address from which the next byte is to be fetched. When a byte (machine code)
is being fetched, the program counter is incremented by one to point to the next
memory location
Stack Pointer (SP)
The stack pointer is also a 16-bit register used as a memory pointer. It points to
a memory location in R/W memory, called the stack. The beginning of the stack
is defined by loading 16-bit address in the stack pointer.
This programming model will be used in subsequent tutorials to examine how
these registers are affected after the execution of an instruction.
Q.3.

Explain Architecture of 8085 Microprocessor with help of Block diagram.

Explain Function of Each block in details.
The functional block diagram or architecture of 8085 Microprocessor is very
important as it gives the complete details about a Microprocessor. Fig. shows
the Block diagram of a Microprocessor.

8085 Bus Structure:

Address Bus: The address bus is a group of 16 lines generally identified as A0
to A15.
The address bus is unidirectional: bits flow in one direction-from the MPU to
peripheral devices. The MPU uses the address bus to perform the first function:
identifying a peripheral or a memory location.

Asst. Prof. Alkesh M Khatri

MPI Sem- IV

Data Bus: The data bus is a group of eight lines used for data flow. These lines
are bi-directional data flow in both directions between the MPU and memory and
peripheral devices. The MPU uses the data bus to perform the second function:
transferring binary information. The eight data lines enable the MPU to
manipulate 8-bit data ranging from 00 to FF (28 = 256 numbers).The largest
number that can appear on the data bus is 11111111.
Control Bus: The control bus carries synchronization signals and providing timing
signals. The MPU generates specific control signals for every operation it
performs. These signals are used to identify a device type with which the MPU
wants to communicate.
Registers of 8085:
The 8085 have six general-purpose registers to store 8-bit data during program
execution. These registers are identified as B, C, D, E, H, and L.They can be
combined as register pairs-BC, DE, and HL-to perform some 16-bit operations.
Accumulator (A):
The accumulator is an 8-bit register that is part of the arithmetic/logic unit
(ALU).
This register is used to store 8-bit data and to perform arithmetic and logical
operations.
The result of an operation is stored in the accumulator.
Flags:

Asst. Prof. Alkesh M Khatri

MPI Sem- IV

The ALU includes five flip-flops that are set or reset according to the result of
an operation.
The microprocessor uses the flags for testing the data conditions.

They are Zero (Z), Carry (CY), Sign (S), Parity (P), and Auxiliary Carry

(AC) flags. The most commonly used flags are Sign, Zero, and Carry.
The bit position for the flags in flag register is,

1. Sign Flag (S): After execution of any arithmetic and logical operation, if
D7 of the result is 1, the sign flag is set. Otherwise it is reset.D7 is
reserved for indicating the sign; the remaining is the magnitude of
number. If D7 is 1, the number will be viewed as negative number. If D7
is 0, the number will be viewed as positive number.
2. Zero Flag (z): If the result of arithmetic and logical operation is zero,
then zero flag is set otherwise it is reset.
3. Auxiliary Carry Flag (AC): f D3 generates any carry when doing any
arithmetic and logical operation, this flag is set. Otherwise it is reset.
4.

Parity Flag (P): If the result of arithmetic and logical operation contains
even number of 1's then this flag will be set and if it is odd number of 1's
it will be reset.

5.

Carry Flag (CY):If any arithmetic and logical operation result any carry
then carry flag is set otherwise it is reset.

Arithmetic and Logic Unit (ALU):It is used to perform the arithmetic operations like
addition, subtraction, multiplication, division, increment and decrement and logical
operations like AND, OR and EX-OR. It receives the data from accumulator and
registers. According to the result it set or reset the flags.
Program Counter (PC): This 16-bit register sequencing the execution of instructions. It
is a memory pointer. Memory locations have 16-bit addresses, and that is why
this is a 16-bit register. The function of the program counter is to point to the
memory address of the next instruction to be executed. When an opcode is
being fetched, the program counter is incremented by one to point to the next
memory location.
Stack Pointer (Sp): The stack pointer is also a 16-bit register used as a memory
pointer. It points to a memory location in R/W memory, called the stack. The

Asst. Prof. Alkesh M Khatri

MPI Sem- IV

beginning of the stack is defined by loading a 16-bit address in the stack pointer
(register).
Temporary Register: It is used to hold the data during the arithmetic and logical
operations.
Instruction Register: When an instruction is fetched from the memory, it is
loaded in the instruction register.
Instruction Decoder: It gets the instruction from the instruction register and
decodes the instruction. It identifies the instruction to be performed.
Serial I/O Control: It has two control signals named SID and SOD for serial
data transmission.
Timing and Control unit.
It has three control signals ALE, RD (Active low) and WR (Active low) and
three status signals IO/M(Active low), S0 and S1.
ALE is used for provide control signal to synchronize the components of
microprocessor and timing for instruction to perform the operation.
RD (Active low) and WR (Active low) are used to indicate whether the
operation is reading the data from memory or writing the data into memory
respectively.
IO/M(Active low) is used to indicate whether the operation is belongs to the
memory or peripherals.
Table 1.3 Machine cycle status and control signals

Q.4.

Explain T State, Machine Cycle & Instruction Cycle.

T State:
T-state is defined as one subdivision of the operation performed in one clock period

Asst. Prof. Alkesh M Khatri

MPI Sem- IV

The execution of instruction always requires read and writes operations to transfer data
to or from the P and memory or I/O devices. Each read/ write operation constitutes
one machine cycle (MC1). Each machine cycle consists of many clock periods/ cycles,
called T-states.
Machine Cycle:
Machine cycle is defined as the time required completing one operation of accessing
memory, I/O or acknowledging an external request.

Usually machine cycle consists of 3 to 6 T-states. In this article let us discuss about
their
different types and how they are being classified.
Types of machine cycle
There are various types of machine cycles which are classified based onStatus signals
(IO/M, S1 and S0) ,Control Signals (RD, WR, INTA).
The different types of machine cycle available in 8085 microprocessor are:

Opcode Fetch

Memory Read

Memory write

I/O Read

I/O Write

INTR Acknowledge

Bus Idle

Asst. Prof. Alkesh M Khatri

MPI Sem- IV

Instruction cycle:
Instruction cycle is defined, as the time required completing the execution of an
instruction.
The time taken by the P in performing the fetch and execute operations are called
fetch and execute cycle. Thus, sum of the fetch and execute cycle is called the
instruction cycle as indicated in Fig.

Q.5.

Sketch the bus Structure of Microprocessor & Explain Data , Address and
Control Bus.
Typical system uses a number of busses, collection of wires, which transmit binary
numbers, one bit per wire. A typical microprocessor communicates with memory and
other devices (input and output) using three busses: Address Bus, Data Bus and
Control Bus.

Address Bus
One wire for each bit, therefore 16 bits = 16 wires. Binary number carried alerts
memory to open the designated box. Data (binary) can then be put in or taken
out.The Address Bus consists of 16 wires, therefore 16 bits. Its "width" is 16 bits. A 16
bit binary number allows 216 different numbers, or 32000 different numbers, ie
0000000000000000 up to 1111111111111111. Because memory consists of boxes, each
with a unique address, the size of the address bus determines the size of memory,

Asst. Prof. Alkesh M Khatri

MPI Sem- IV

which can be used. To communicate with memory the microprocessor sends an address
on the address bus, eg 0000000000000011 (3 in decimal), to the memory. The
memory the selects box number 3 for reading or writing data.
Address bus is unidirectional, ie numbers only sent from microprocessor to memory, not
other way.
Data Bus
Data Bus: carries data, in binary form, between P and other external units, such as
memory. Typical size is 8 or 16 bits. Size determined by size of boxes in memory and
P size helps determine performance of P. The Data Bus typically consists of 8 wires.
Therefore, 28 combinations of binary digits. Data bus used to transmit "data", ie
information, results of arithmetic, etc, between memory and the microprocessor.
Bus is bi-directional. Size of the data bus determines what arithmetic can be done. If
only 8 bits wide then largest number is 11111111 (255 in decimal). Therefore, larger
number have to be broken down into chunks of 255. This slows microprocessor. Data
Bus also carries instructions from memory to the microprocessor. Size of the bus
therefore limits the number of possible instructions to 256, each specified by a separate
number.
Control Bus
Control Bus are various lines which have specific functions for coordinating and
controlling uP operations. Eg: Read/NotWrite line, single binary digit. Control whether
memory is being written to (data stored in mem) or read from (data taken out of
mem) 1 = Read, 0 = Write. May also include clock line(s) for timing/synchronising,
interrupts, reset etc. Typically P has 10 control lines. Cannot function correctly
without these vital control signals.
The Control Bus carries control signals partly unidirectional, partly bi-directional. Control
signals are things like "read or write". This tells memory that we are either reading
from a location, specified on the address bus, or writing to a location specified. Various
other signals to control and coordinate the operation of the system.

Q.6.

Draw Pin Diagram of 8085 Microprocessor and explain its pin configuration.
The following describes the function of each pin:
Pin Diagram and Pin description of 8085
8085 is a 40 pin IC, The signals from the pins can be grouped as follows

Asst. Prof. Alkesh M Khatri

MPI Sem- IV

1. Power supply and clock signals

2. Address bus
3. Data bus
4. Control and status signals
5. Interrupts and externally initiated signals
6. Serial I/O ports
1. Power supply and Clock frequency signals:

Vcc:
+ 5 volt power supply

Vss:
Ground

X1, X2 :
Crystal or R/C network or LC network connections to set the frequency of internal
clock generator. The frequency is internally divided by two. Since the basic operating
timing frequency is 3 MHz, a 6 MHz crystal is connected externally. CLK (output)-Clock
Output is used as the system clock for peripheral and devices interfaced with the
microprocessor.
2. Address Bus:

Asst. Prof. Alkesh M Khatri

MPI Sem- IV

A8 - A15:
(output; 3-state) It carries the most significant 8 bits of the memory address or the 8
bits of the I/O address;
3. Data bus:
AD0 - AD7 (input/output; 3-state):

These multiplexed set of lines used to carry the lower order 8 bit address as well as
data bus.

During the opcode fetch operation, in the first clock cycle, the lines deliver the lower
order address A0 - A7.

In the subsequent IO / memory, read / write clock cycle the lines are used as data
bus.

The CPU may read or write out data through these lines.
4. Control and Status signals:
ALE (output) - Address Latch Enable.

It is an output signal used to give information of AD0-AD7 contents.

It is a positive going pulse generated when a new operation is started by uP.

When pulse goes high it indicates that AD0-AD7 are address.

When it is low it indicates that the contents are data.

RD (output 3-state, active low) - Read memory or IO device.

This indicates that the selected memory location or I/O device is to be read and that
the data bus is ready for accepting data from the memory or I/O device
WR (output 3-state, active low) - Write memory or IO device.

This indicates that the data on the data bus is to be written into the selected memory
location or I/O device.
IO/M (output) - Select memory or an IO device.

This status signal indicates that the read / write operation relates to whether the
memory or I/O device.

It goes high to indicate an I/O operation.

It goes low for memory operations.

5. Status Signals:

S1:

S2:

It is used to know the type of current operation of the microprocessor.

Asst. Prof. Alkesh M Khatri

MPI Sem- IV

IO/M

S1

S0

OPERATION

Opcode fetch

Memory read

Memory write

I/O read

I/O write

Interrupt acknowledge

Halt

Hold

Reset

6. Interrupts and Externally initiated operations:

They are the signals initiated by an external device to request the microprocessor to do
a particular task or work.

There are five hardware interrupts called,

1.TRAP
2.RST 7.5
3.RST 6.5
4.RST 5.5
5.INTA

On receipt of an interrupt, the microprocessor acknowledges the interrupt by the active

low INTA (Interrupt Acknowledge) signal.
Reset In (input, active low)

This signal is used to reset the microprocessor.

The program counter inside the microprocessor is set to zero.

The buses are tri-stated.

Reset Out (Output)

It indicates CPU is being reset.

Used to reset all the connected devices when the microprocessor is reset.
7. Direct Memory Access (DMA): Tri state devices:

When 2 or more devices are connected to a common bus, to prevent the devices from
interfering with each other, the tristate gates are used to disconnect all devices except
the one that is communicating at a given instant.

Asst. Prof. Alkesh M Khatri

MPI Sem- IV

The CPU controls the data transfer operation between memory and I/O device. Direct
Memory Access operation is used for large volume data transfer between memory and
an I/O device directly.

The CPU is disabled by tri-stating its buses and the transfer is effected directly by
external control circuits.
HOLD signal is generated by the DMA controller circuit. On receipt of this signal, the
microprocessor acknowledges the request by sending out HLDA signal and leaves out
the control of the buses. After the HLDA signal the DMA controller starts the direct
transfer of data.
READY (input)

Memory and I/O devices will have slower response compared to microprocessors.

Before completing the present job such a slow peripheral may not be able to handle
further data or control signal from CPU.

The processor sets the READY signal after completing the present job to access the
data.

The microprocessor enters into WAIT state while the READY pin is disabled.
8. Single Bit Serial I/O ports:

SID (input)

- Serial input data line

SOD (output)

These signals are used for serial communication.

- Serial output data line