Power Converters Lab Manual

POWER ELECTRONICS
Laboratory Manual
Department of Electrical and Electronic Engineering

Gokaraju Rangaraju
Institute of Engineering & Technology
BACHUPALLY, MIYAPUR, HYDERABAD-500072
POWER ELECTRONICS
Laboratory Manual
V.Vasantha & P.V.Basavaiah
Griet
Department of Electrical and Electronic Engineering
Gokaraju Rangaraju
Institute of Engineering & Technology
BACHUPALLY, MIYAPUR, HYDERABAD-500072
List of Experiments
S. No Name of the Experiment Page No

1 Description of Kit 01
2 Characteristics of SCR, IGBT, MOSFET and DIAC 05
3 Resistance Triggering of Thyristor 21
4 Resistance – Capacitance Triggering of Thyristor 24
5 UJT Triggering of Thyristor 27
6 Making of PCB for Extended pulse using UJT 34
Triggering
7 1-Ô Half Wave Converter using R-Load 38
8 1- Ô Half Wave Converter using RL-Load with and 40
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without FWD
9 1-Ô AC Voltage controller using R-Load 43
10 1-Ô AC Voltage controller using RL-Load 45
11 1-Ô Full Wave converter Controller using R-Load 47
12 1-Ô Full Wave converter Controller using RL-Load 50
with and without FWD
13 Triggering of Thyristor using 555 Timer 54
14 Triggering of Thyristor using Astable Multivibrator 58
15 DC Chopper using MOSFET 63
16 Single Phase Series Inverter 66
17 Single Phase Parallel Inverter 69
18 Single Phase Inverter using MOSFET 73
19 Single Phase Cyclo Converters 75
20 Commutation of SCRs 78
21 Viva Questions 84
Experiment 1
DESCRIPTION OF KIT
The Universal Power Electronics Trainer kit
L
T1 T3 D1 D3 Bulb
230V, 1-f
50 Hz,AC
Supply
N
R
T2 T4 D2 D4
L 12
DC
V
E motor
+
30V/5A RL1 Rl2 Rl3

DC
Supply 1K, 100W 1K, 100W 1K, 100W
Griet
R1 R2 R3
1E, 10W 47K, 2W 2.4K, 5W
O O O
500mA
X Y GND
CRO Points
15V 15V
230 V, Input
PT1 PT2
Multimeter
+
-
0 to 15V
DC
(Control Knobs
on left side of
- Kit)
+
100K, 3W 10K, 3W
POT POT Terminals
kit for
Supply CRO
switch Connections
POT Control Knobs
Fig- 1.1
1
Description of the main components on the kit:
1. SILICON CONTROLLED RECTIFIERS(thyristors)- 4 Nos.

(T1, T2, T3, T4)
Electrical specifications and data sheets are enclosed.
2. SILICON POWER DIODES- 4 Nos.

(D1, D2, D3, D4)
Electrical Specifications and Data sheets are enclosed.
3. BULB (R-LOAD) - 1 No.

230V, 60W
4. RLE LOAD - 1 No.

(12V permanent magnet DC MOTOR / 2400 RPM)
5. RESISTORS
1. RL1, RL2, RL3- 3 Nos.

1KÙ, 100W
Mounted on the back side of kit.
2. R1 - 1 No.
Griet
1Ù, 10W
Current sense resistor. Useful for measurement of current.
3. R2- 1 No.
47 KÙ, 2W
Useful for attenuation.
4. R3- 1 No.
47 KÙ, 2W
Useful for attenuation.
6. AC INPUT (L-N) SOURCE

Mains supply, Single Phase AC Input 0-230V, 50Hz.
7. DC INPUT SOURCE
Fixed DC input source +30V, 5A current rating provided on the front panel. DC source
is designed by using SMPS technology. The specification of the DC source and data
sheets are enclosed.
8. AC VOLTAGES FIXED 15-0-15V

The step down transformer, secondary voltages 15-0-15V, 500mA, 50Hz provided on
the front panel.
9. X, Y, GND
Are the output test points connected to terminals fixed on the right side of the kit.
These test points are useful to make connections to the CRO.
10. 1:1:1 Pulse Transformer No 2503- 2 No's

Useful for triggering circuits.
2
11. Digital Meter- 1 No
MODEL: 830B
Useful to measure Input /Output AC/DC Voltage and Currents.
SPECIFICATIONS:
DC Voltage - 0.2V, 2V, 20V, 200V, 1000V.
AC Voltage - 200V, 750V
DC Current - 2mA, 20mA, 200mA, 10A
Transistor hFE Measurement
Diode Test
Continuity Test and Resistance Measurement.
12. VARIABLE DC SOURCES- 2 No's

0 to +15V, 500mA and 0 to -15V, 500mA variable electrically isolated DC voltages
are provided on the breadboard.
13. FIXED AC VOLTAGES- 2 No's

Fixed AC voltages 0-15V & 0-15V/500mA are provided on the bread board.
14. VARIABLE RESISTORS- 2 No's

0-10 KÙ, 1W & 0-100 KÙ, 3W Variable resistors are provided on the bottom of the
strip of the bread board.
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15. BREADBOARD
Solder less Breadboards (WB-102, WISH Make)- 2 No's
To accept 0.3 to 0.85mm single strand wires. The breadboard on the trainer is very
convenient for constructing any type of firing circuits.
It has three distinctive strips: top, bottom and the middle. The top and bottom strips
are small compared to the middle strip. The top and the bottom are divided into two
strips each. First half of the top strip contains 0 to +15V DC variable supply and
second half of the strip contains 0-15V AC fixed supply. First half of the bottom
strip contains 0 to 10 KÙ variable resistors and second half of the strip contains 0-
100 KÙ variable resistors.
16. Use of potential divider circuit

+
47 K
230 V
I/P +
2.4 K
To CRO
- -
Fig -1.2
Whenever 230V signal observed on the CRO Potential divider circuit should
be connected as shown in the above figure.
3
Y
GND
+ Common
Vs - Point
between
Two ignals
X
Fig-1.3
17. To observe two signals at a time, a common point should exists between two signals and
that common point should be connected to CRO ground.
18. To check the Working of the thyristor
Connect a half wave rectifier using the thyristor, 30V DC supply and the bulb available
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on the kit. Between the gate and cathode, connect a variable voltage DC supply of 2V with
positive terminal to gate and negative terminal to cathode. After the bulb glows, remove the
gate connection.
4
Experiment 2
CHARACTERISTICS OF SCR, TRIAC, IGBT,
MOSFET AND DIAC
SCR Characteristic:
1.1. AIM: To study the V-I characteristics of SCR.
1.2. APPARATUS: 1. SCR (TYN 616) characteristics trainer

2. Ammeters 0-500mA dc
0-25mA dc
3. Voltmeters 0-50V dc
0-20V dc
4. Patch chords
1.3. THEORY:
The SCR is a controlled rectifier, allowing the current to pass only in one
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direction, from anode to cathode. So it is unidirectional device. It has two states, one
conducting and the other non-conducting. If anode is positive with respect to cathode,
J1 and J3 can be forward biased, and conduct. When anode is negative with respect to the
cathode, these two junctions reverse bias and SCR turns off. J2 junction has n on top and
p below. With a positive voltage on the anode, this junction is reverse biased. Without
the voltage applied to the gate, the SCR is indeed always off, When the anode is positive
with respect to cathode, it can tolerate 50V before it turn ON without giving gating pulse.
anode Anode
p
n J1
gate
p J2 gate
cathode
n
J3
cathode Fig: 2.1
Thyristor V-I characteristics is drawn between anode to cahode voltage and anode
current at constant gate current. This divided into three modes:
1. Reverse blocking mode
2. Forward blocking mode
3. Forward conducting mode
5
Refer to figure 2.3,
In reverse blocking mode, thyristor exhibits blocking characteristics like diode.
A small leakage current flows. When reverse voltage applied is less than VBR, then
device offers high impedance in reverse direction. So in reverse blocking mode, SCR
acts as an open switch.
In forward blocking mode, anode is made positive with respect to cathode with
gate open. So in this mode a small current called leakage current flows.
In this mode (curve O-M), the device does not conduct.
In forward conduction mode the anode to cathode forward voltage is increasing
with gate circuit open. Forward break-down occurs at the reverse biased junction J2
at a critical Forward break over voltage (VBO). Then the SCR switches into low
impedance state. The curve M-N shows the device latches on to its ON
state. Then the voltage across the device suddenly drops from high voltage to low
voltage(1 to 2 volts). Suddenly a large amount of current starts flowing through the
device. The curve N-K is called the forward conduction state.
Forward Voltage Triggering: When anode to cathode forward voltage is

increased with gate open circuit, the reverse biased junction J2 will break. This is
known as avalanche break-down and the voltage at which avalanche break-down
occurs is called forward break over voltage VBO. At this voltage, thyristor changes
from OFF state to ON state, characterized by a low voltage across it with large
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forward current. This current is called Latching current in ON mode. The forward
voltage drop across the SCR during ON state is of the order of 1 to 1.5V and
increases slightly with load current. After avalanche break down J2 junction loses
its reverse blocking capability. Therefore, if the anode voltage is reduced below VBO,
SCR will continue conduction of the current. SCR will be turned OFF only by
reducing the anode current below a certain value called Holding current value.
Holding current is always less than Latching current (IL>IH).
Gate Triggering: This is the most common method used for triggering of SCRs.
In fig.2.2(a); let SCR be OFF. Then the voltage VAK between anode and cathode will be
V2 volts, with anode positive. Now if a voltage is applied between gate and cathode,
making the gate positive with respect to cathode, the SCR turns ON; and the
voltage VAK will become nearly zero. The gate loses further control on the SCR
For gate triggering, 3 types of signals are applied between gate and cathode of the
device
1. DC signal
2. AC signal
3. Pulse signal
6
1.4. CIRCUIT DIAGRAM:
Lamp
I I 0-500mA
R2
I I
I I IA
Anode (A)
V2
A + (2.5-35V)
SCR
VAK 0-50V
R1 K
IG -
G
V1 Gate(G)
(1.5-15V) Cathode (K)
VG
0-20V
Fig 2.2 (b)
Fig 2.2 (a)
1.5. PROCEDURE:
VAK -IA CHARACTERISTICS:(Table -1)
1. Make all the connections as per the circuit diagram
2. Initially keep V1 & V2 at minimum position and R1 & R2 also at minimum
position.
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3. Adjust gate current IG to some constant, say 2.5mA or 5mA, by varying V1 or
gate current potentiometer R1.
4. Now slowly vary V2 and observe anode to cathode voltage and anode current
Also note down readings for every 5V.
5. Vary V1 till SCR conducts. This can be identified by sudden drop of anode, to
cathode voltage and rise of anode current.
6. The above procedure is repeated with different values of gate current.
Draw the graph between VAK Vs IAK for each gate current
GATE TRIGGERING AND VGK vs IG :(Table -2)

1. Initial settings: a) potentiometer R1 : maximum resistance position
b) source V1 : minimum voltage position.
c) potentiometer R2 : Approximately half the value.
d) Source V2: 10V
e) SCR off
2. Slowly increase V1. If IG is too small to be read reduce R1 till IG becomes readable.
3. At this value of R1, increase V1 from zero and for different values of V1; note VG , IG and Ia
(IA will be small, indicating that the SCR is still off)
4. As V1 is being increased, at same value of V1; the SCR triggers, as will be indicated by
a sudden increase in IA. Note VG, IB and IA at this point. Turn off the SCR by opening
the anode-cathode circuit, and reduce V1 to zero.
5. Repeat steps (1) to (4) for different values of V2. As V2 is increased, R2 should also be
increased appropriately, to limit the SCR current when it turns on.
6. Draw VG ~IG graphs for different values of V2.
7
FOR LATCHING CURRENT
1. Initial settings: R1 potentiometer: Minimum resistance position.
V1: zero
R2 potentiometer: Small value
V2:10V
2. Gradually increase V1 till SCR is on (IA suddenly increases). Note IA.
3. Now make V1 as zero by opening gate- cathode circuit. If IA is unaffected, IA> latching
current.
4. Assuming IA to be greater than latching current, repeat steps (1) to (3); with an
increased value of R2. For some IA opening gate- cathode circuit will cause IA to go to
zero. This is the latching current of the SCR.
FOR HOLDING CURRENT:

1. Initial settings: a) potentiometer R1: maximum resistance position
b) Source V1: minimum voltage position.
c) Potentiometer R2: Approximately half the value.
d) Source V2: 10V
e) SCR off
2. Slowly increase V1 till SCR remains off. Then reduce V1 to zero.
3. If SCR current is less than latching current; SCR turns off. In that case, either reduce
resistance R2, or increase voltage V2 (or both); and repeat step (2), until you get an
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anode current greater than the latching current at the end of step (2).
4. Now decrease the anode current ( by increasing R2, decreasing V2, or both ) slowly and
note the current at which the SCR if off. ( Anode current suddenly decreases nearly
zero). This is the holding current and should be lesser than latching current.
1.6. TABULAR FORMS:

At IG = mA At IG = mA
VAK IA VAK IA
Volts mA Volts mA
Table 1
At VAK = 10 V At VAK = 30 V
VGK IG VGK IG
Volts mA Volts mA
Table 2
8
1.7. VAK vs IA characteristic:
+Ia Forward conduction

AMP (on state)
K
Latching current
Holding current
Ig3 Ig2 Ig1
v
N M
Ig=0
Reverse Leakage
mA Ig1
Current Ig3 Ig2
VBR
O
VB0 + VAK
Forward Leakage
Current
Reverse
blocking Forward
blocking
V Bo = Forward breakover voltage
V BR = Reverse breakover voltage
Ig = Gate current
TRIAC Characteristic:
Griet -Ia
Fig 2.3
2.1. AIM: To study the V-I characteristics of TRIAC.
2.2. APPARATUS: 1. TRIAC ( BT 136-600) characteristics trainer

2. Ammeters 0-500mA dc
0-25mA dc
0-20V dc
4. Patch chords
2.3. THEORY:
Thyristor has reverse blocking characteristic that prevents current flow from
cathode to anode direction. In TRIAC, two SCRs are connected in anti parallel. So it
conducts current in both directions.
9
R
MT2
MT1
gate
N3 N4
+
P1 J1
VS(t)=VmSinwt
N1 J2
-
P2 J3
S
N2 +
gate signal
Vg
-
MT1
MT2
Fig 2.4
Refer to fig 2.4, An AC sinusoidal voltage Vmsinwt in series with a load resistance R is applied
between the terminals MT1 and MT2. A pulse voltage Vg will be applied between gate and terminal
MT1 whenever the switch S in the gate is closed. ( Note that triggering signal is applied between
gate and MT1 only, but never between gate and MT2). In the following, whenever current flow
between MT1 and MT2 is mentioned, it is understood that the current flow is through the device
only.
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MT2 positive with respect to MT1: If gate is made positive with respect to MT1; current starts flow
from MT2 to MT1. If gate is made negative with respect to MT1; then again current flows from MT2
to MT1; but a larger gate voltage is needed for triggering the TRIAC.
MT2 negative with respect to MT1: If gate is made positive with respect to MT1; current starts to
flow from MT1 to MT2, but here also, a larger magnitude of gate voltage is needed for triggering.
If gate is made negative with respect to MT1; the current flow from MT1 to MT2 is triggered, with
a much smaller magnitude of gate voltage.

Lamp 0-500mA
I I
R2
I I
I I IL
Symbol:
MT2 (main terminal 2)

V2
MT2 (2.5-35V)
VT2T1 0-50V
G MT1
R1
IG
0 - 25 mA
V1
(1.5-15V)
Gate (G)
VG Fig 2.5 (b)
0-20V
Fig 2.5 (a)
10
2.5. PROCEDURE: (Refer to fig. 2.5)
V-I CHARACTERISTICS: (Table 3)
1. Initially keep all control pots at minimum position.

2. Adjust gate current IG to some constant, say 10mA, by varying V1 or
gate current potentiometer R1.
3. Now slowly vary V2 and note down corresponding VT2T1 & IL readings for every
5V.
4. Vary V1 till TRIAC conducts. This can be identified by sudden drop VT2T1
and rise of IL.
Same procedure is also repeated for reverse direction by reversing the polarity of V2
Same wave from is obtained in reverse direction also.
TO FIND VG/IG: (Table 4)

1. Adjust V1 to zero and set VT2T1 to some value say 10V.
2. Slowly increase V1 till TRIAC conducts.
3. Note down corresponding VG and IG values.
FOR LATCHING CURRENT:
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1. Initial settings: R1 potentiometer: Minimum resistance position.
V1: zero
R2 potentiometer: Small value
V2:10V
2. Gradually increase V1 till TRIAC is on (IA suddenly increases). Note IA.
3. Now make V1 by opening gate- MT1 circuit. If IA is unaffected, IA> latching
current.
4. Assuming IA to be greater than latching current, repeat steps (1) to (3); with an
increased value of R2. For some IA opening gate- MT1 circuit will cause IA to go to
zero. This is the latching current of the TRIAC.
FOR HOLDING CURRENT:

1. Initial settings: a) potentiometer R1: maximum resistance position
b) Source V1: minimum voltage position.
c) Potentiometer R2: Approximately half the value.
d) Source V2: 10V
e) TRIAC off
2. Slowly increase V1 till TRIAC remains off. Then reduce V1 to zero.
3. If TRIAC current is less than latching current; TRIAC turns off. In that case, either
reduce resistance R2, or increase voltage V2 (or both); and repeat step (2), until you get
an anode current greater than the latching current at the end of step (2).
4. Now decrease the anode current ( by increasing R2, decreasing V2, or both ) slowly and
note the current at which the TRIAC if off. ( Anode current suddenly decreases nearly
zero). This is the holding current and should be lesser than latching current.
11
2.6. TABULAR FORMS:
IG = mA VT2T1 = V
VT2T1 IL VG IG
Volts mA mA
Volts
Table 3 Table 4
2.7. WAVEFORMS:
+IL Quadrant I
(MT2 positive, MT1 negative)
Ig2 Ig1 Ig0
v
v
Ig2 Ig1 Ig0 = 0
-Va
VBR
-Ig0
Quadrant III
-Ig1
Griet
-Ig2
(MT2 negative, MT1 positive)

-VB01 +Va
-IL
mA
Fig 2.6
DIAC Characteristic:
3.1. AIM: To study the V-I characteristics of DIAC.
3.2. APPARATUS: 1. DIAC ( DB-3) characteristics trainer

2. Ammeter 0-25mA dc
3. Voltmeter 0-50V dc
4. Patch chords
12
3.3. THEORY:
A DIAC is a two terminal device which can conduct in both directions. It has no triggering
mechanism to initiate conduction, and in this respect it is similar to a piece of ordinary conducting
wire. But unlike a wire, it can block up to 30V in either direction before it starts conducting.
Once it is conducting, there is a small ( about 3V) voltage drop across the device.
MT2
Symbol: MT2
N3 P1 N3 P1
P1 N1
N1
N1 P2
P2 N2 P2 N2

MT1
Fig 2.7 MT1
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(Refer to fig 2.9) At voltage less than VBO1 a very small amount of leakage current
flows through the device. This is not sufficient to conduct the device. So the state
0-A is called blocking state. Whenever voltage reaches break-over voltage it starts
conducting with VI characteristics as shown. The value of current corresponding
to point is A known as break over current. For negative half cycle the characteristics
is similar. Once the device turns on, it can carry a high current with only a small
voltage drop across it. DIAC is mainly used to trigger TRIAC. When the current
through the switch fall below the holding current, the DIAC goes off.
3.4. CIRCUIT DIAGRAM: Lamp

I I R2
I I
I I I
0-25mA
MT2
V2
(2.5V-35V)
V 0-50V
MT1
Fig 2.8
13
3.5. PROCEDURE: (Refer to fig 2.8; Table 5)
1. Keep V2 at minimum position and R2 at maximum position.

2. Switch ON and vary V2 in steps of 5V and note down corresponding ammeter
reading Io.
3. At a particular value of voltage, device conducts as indicated by the sudden rise
in ammeter reading and sudden fall in the voltage across the device. This is known
as break-over voltage of the device.
4. If start of conduction is not clearly observable; repeat steps (3) and (4) with a
reduced value of R2 .
5.Repeat the same procedure in reverse direction, that is by changing MT1 connections
to MT2. We obtain the same readings as in forward bias, note down and draw a
graph, Graph is similar to both in forward and reverse directions.
3.6. TABULAR FORMS: V I

Volts mA
Table 5
3.7. WAVEFORMS:
Griet +Ia
mA
Conduction state
For Positive half
cycle
I Bo
-Va
A
VBo2
o VBO1
+Va
I Bo Blocking State
Conduction state
For negative half
cycle
-Ia
Fig. 2.9
14
MOSFET Characteristic:
4.1. AIM: To study the output and transfer characteristics of MOSFET.
4.2. APPARATUS: 1. MOSFET ( IRF 540) characteristics trainer

0-20V dc
4. Patch chords
4.3. THEORY:
MOSFET is a power electronics device with three terminals called Gate, source and drain.
(Similar to the base, emitter, collector respectively of a transistor). A control voltage is applied
between the gate and source; with gate positive for N channel enhancement type MOSFET and
gate is negative for P channel type MOSFET. Because of the high impedance that the device
offers between the gate and the source; it draws virtually zero current from the signal connected
between the gate and source. Hence it is called a voltage controlled device. In MOSFET,
current flow is either due to flow of electrons or flow of holes, but never due to both.
Hence it is called unipolar. Drain
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Symbol:
DRAIN (D)
N
Gate P Substrate
Substrate
Gate (G)
N
Oxide Layer
Source (S)
Source
Fig 2.10
Output Characteristics: Refer to fig 2.12(b)
The output characteristics of MOSFET indicates the variation of drain

current ID as a function of drain-source voltage VDS with VGS as a parameter. For low
value of VGS the graph between ID-VDS is almost linear, this indicates a constant
value of ON resistance RDS = VDS/ID. At very low value of drain-source voltage the
device has constant resistance characteristics. But at high value of drain source
voltage, the current is determined by the gate voltage. For low VDS , graph linear
but VDS is increased output characteristics is relatively indicating that drain current
is nearly constant. A load line intersects the output characteristics at point A& B.
Here A indicates fully ON condition, B indicates fully OFF condition. So it behaves
as a switch.
15
Transfer Characteristics: Refer to fig.2.12(a)
This transfer characteristic shows the variation of drain current ID as a
function of gate source voltage VGS, here VGST is the threshold voltage. Below this
voltage, the device turns off. The magnitude of the threshold voltage is of the order
of 2 to 3V.
Lamp
I I R2
I I
I I ID
0-500mA
V2
D
(25or2.5V)
MOSFET
G
VDS 0-50V
Griet
V1 (1.5-15V)
VGS
0-20V
Fig 2.11
4.5. PROCEDURE: Refer to fig. 2.11

TRANSCONDUCTANCE: (Table 6)
1. Initially keep all the voltages and potentiometers at minimum positions.

2. Set VDS to some value say 10V.
3. Slowly vary the gate-source voltage VGS by varying V1.
4. Note down ID-VGS readings for every 5V.
5. The device will turn on at some voltage. This voltage is called threshold voltage
VGST.
6. If VGS < VGST small leakage current flows from drain to source.
7. If VGS > VGST drain current depends on the magnitude of gate voltage.
8. Repeat the above procedure for VDS. = 20 & 30 V.
16
OUTPUT OR DRAIN CHARACTERISTICS: (Table 7)
1. Initially set VGS to some value say 3V by varying V1.
2. Slowly vary V2 and note down ID & VDS.
3. At particular value of VGS, there is pinch off voltage (VP) between Drain and
Source.
4. If VDS < VP device works in the constant resistance region and ID is directly
proportional to VDS.
5. If VDS > VP then ID flow from the device and this is known as constant current
region.
6. Repeat the procedure for different values of VGS and note down the readings.
4.6. TABULAR FORMS:
At VDS = 10 V At VDS = 30 V
VGS Volts ID mA VGS Volts ID mA
Table 6
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At VGS = 3 V At VGS = 3.6 V
VDS Volts ID mA VDS Volts ID mA
Table 7
4.7. WAVEFORMS:
Drain Load Line
Current.
ID (mA)
ID
(mA) VGS 7 > VGS 6...........>VGS 1
A VGS 7
VGS 6
VGS 5
VGS 4
VGS 3
VGS 2
VGS T
VGS 1
B
2 4 6 8 10 Drain Source Voltage VDS
Transfer Characterisitics VGS (Volts)
Out put characteristics
(a) Fig: 2.12 (b)
17
IGBT Characteristic:
5.1. AIM: To study the output and transfer characteristics of IGBT.
5.2. APPARATUS: 1. IGBT (IRGBC 20S) characteristics trainer

0-20V dc
4. Patch chords
5.3. THEORY:
The Insulated Gate Bi-polar Transistor (IGBT) is a voltage controlled device

that combines the advantages of both MOSFET & BJT. That is the fast acting feature
and high power capability of the bipolar transistor, with the voltage control feature
of the MOSFET. Its emitter characteristics are similar to those of the bipolar transistor
and control features are those of MOSFET. It has high input impedance like MOSFET.
VI Characteristics: Static VI characteristics of an IGBT show the plot of collector

current IC versus collector emitter voltage VCE, for various values of gate emitter
voltages. In VI characteristics of IGBT in forward direction, the shape of the output
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characteristics is similar to that of BJT. But here the controlling parameter is gate
emitter voltage VGE, because IGBT is a voltage controlled device.
Refer to fig. 2.15

In forward conducting mode, positive voltage is applied to the collector of the
device with gate short circuited to the emitter terminal then the device operates in its
forward blocking mode. Then the positive gate to emitter voltage applied of
sufficient magnitude then the device switches in to forward conducting state. In
forward conducting state, the device characteristics are similar to that of a forward
biased P-N diode. This continuous up to gate-bias voltage sufficiently larger than the
device forward current will saturate by increasing gate- bias voltage this state the
device will operate it is active region. To turn off the device, remove the gate-bias
voltage, then the collector current decays gradually and device becomes off. Actually
the current flow cannot occur when negative voltage is applied to the collector with
respect to the emitter, hence the device has reverse blocking capability.
(C) Collector
(G) Gate
(E) Emitter
Fig 2.13
18
Transfer Characteristic: Refer to fig. 2.15(b)
This is the plot of collector current IC versus gate-emitter
voltage VGE. This characteristic to identical to that of MOSFET characteristic.
When VGE is less than VGET (threshold voltage), the device is in off state, after that
it is in ON state.
5.4. CIRCUIT DIAGRAM: Lamp

I I 0-500mA R2
I I
I I IC
0-500mA
C V2
(2.5-35V)
G
VCE 0-50V
E
V1
(1.5-15V)
VGE
0-20V
Fig 2.14
Griet
5.5. PROCEDURE: Refer to fig. 2.14
TRANSFER CHARACTERISTICS: (Table 8)
1. Initially keep all the voltages and potentiometers at minimum positions.
2. Set VCE to some value say 10V.
3. Slowly vary the gate-emitter voltage VGE by varying V1.
4. Note down IC-VGE readings for every 0.5V.
5. The device will turn ON at some voltage. This voltage is called threshold voltage
VGET
6. If VGE < VGET, small leakage current flows from collector to emitter.
7. If VGE > VGET, collector current depends on the magnitude of gate voltage.
8. Repeat the above procedure for VCE. =20 & 30V
VI CHARACTERISTICS:(Table 9)
1. Initially set VGE to some value say 5V by varying V1.
2. Slowly vary V2 and note down IC & VCE.
3. At particular value of VGE, there is pinch off voltage (VP) between drain and
source.
4. If VCE < VP, device works in the constant resistance region and IC is directly
proportional to VGE.
5. If VCE > VP, then IC flow from the device and this is known as constant current
region.
6. Repeat the procedure for different values of VGE and note down the readings.
19
5.6. TABULAR FORMS:
At VGE = 5.0 V At VGE = 5.4 V
VCE Volts IC mA VCE Volts IC mA
Table 9
At VCE = 10 V At VCE = 30 V
VGE Volts IC mA VGE Volts IC mA
Table 8
Griet
5.7. WAVEFORMS:
IC
(A)
IC
VGE 7
VGE 7 > VGE 6...........>VGS 1 (A)
VGE 6
VGE 5
VGE 4
VGE 3
VGE 2
VGE 1
VRM
0
VI Characteristics VCE VGE
VGE T Transfer Characterisitics
(a) (b)
Fig: 2.15
RESULT: Characteristics of SCR, TRIAC, IGBT, MOSFET and DIAC are verified.
20
Experiment 3
R-TRIGGERING
1. AIM: To study resistance triggering of thyristor.
2. APPARATUS: 1. Universal Power Electronic Trainer Kit.

2. 230V, 15W bulb.
3. 560Ù, 250W.
4. CRO
+
3. THEORY:
A
G K
+
V AK
V GK
Griet
_ _
Fig -3.1
3.1) Consider the half cycle 0 < wt<p for the supply voltage Vs(t)= Vm sinwt. In the
initial part of this half cycle, the voltage Vs is very small, and the SCR is in off state.
IA=0 and iL=I, the small current flowing through the resistance R1, R2 and Rb; Vl»0
and VAK(t) » Vm sinwt = Vs(t).
3.2) As wt increases VAK(t) increases; and the SCR anode becomes more and more
positive with respect to cathode. Simultaneously, VGK(t); the voltage between the
gate and cathode increases, making the gate more positive with respect to cathode.
3.3) These larger anode-cathode, and gate-cathode voltages cause the SCR to turn on at
some instant 0 £wt£p/2. Once it turns on; VAK reduces to nearly zero, and the
supply voltage gets applied across the load. The SCR continues to conduct till the
current through it tends to reverse; at which point of time the SCR turns off. For a
purely resistive load, turn off occurs at wt = p. For an inductive load, current lags
behind the voltage and turn off occurs at a later instant.
3.4) The maximum value that VAK can attain, if the SCR does not turn on, is Vm at
wt = p/2. At this instant, VGK also is maximum. Suppose this maximum value of VGK
cannot turn on the SCR with its anode to cathode voltage maximum. As wt
increases beyond p/2, both VAK and VGK decreases, and so the SCR can ever turn
on. In resistance triggering, maximum firing angle that can be obtained is 90°.
21
C
Load
+ Vo _ i
IL i
A
R1
A
+
TYN 612
R2
Vs = Vm Sinwt V AK
D G
+
Ig K _
R VGK
b
Fig -3.2
3.5) To achieve a firing angle less than 90°; the resistance R2 must be decreased. This
increases VGK for a given VAK; and hence SCR turns on at a lesser VAK
( at wt<p/2). Firing angle can thus be controlled from a little more than 0 to 90°.
3.6) Once it is off , the SCR remains off till the next positive half cycle of the supply,
Griet
when the turn on process is repeated.
3.7) Diode D prevents the current flowing in R1, R2, Rb branch during the negative half
cycle of the supply voltage.
4. CIRCUIT DIAGRAM:
R-Load
230V, 60W bulb
Load
+ Vo _
IL I IA
R1=10K, 3W
A
+
TYN 612
R2= 100k, 3W
Vs = Vm Sinwt V AK
D G
+
IG K _
560W R Vg
0.25W b
Fig- 3.3
22
5. PROCEDURE:
5.1. Connect the circuit diagram as shown in figure.
5.2. Initially keep POT at minimum position.
5.3. Vary the POT and observe the lamp glowing.
5.4. Observe the waveforms across thyristor, supply and load with potential divider on
CRO.
6. RESULT:
By using resistance triggering, the thyristor is triggered and corresponding firing angle
is noted.
7. WAVEFORMS: (Resistive load assumed)
VM
Supply 2 3 4 5
Volatage o wt
Ig
Griet
-Vm
wt
a
+Vm
Load Voltage
wt
+Vm
VT
wt
-Vm
Fig- 3.4
23
Experiment 4
RC-TRIGGERING
1. AIM: To study resistance -capacitance triggering of thyristor.
2. APPARATUS: 1.Universal Power Electronic Trainer Kit.

2.230V, 15W bulb.
3. 4.7KÙ, 0.25W.
4. 0.2µF Capacitor.
5. CRO
3. THEORY:
+ Vo -
R- Load
A +
RL
R D2
+ T1
Vs = Vm Sinwt c VAK
- +
+
Griet
D1
Vc C
VGK
- - K -
Fig- 4.1
3.1) Like R-triggering, RC triggering can also be used along with an AC supply voltage
to turn on an SCR during every positive half cycle of the supply. But, unlike in R
triggering, the firing angle in RC triggering can be varied from 0o to 180o(nearly).
3.2) C, D2, and RL of fig.4.1 are in series across the ac source, which circulates a current
in the ACW direction in the loop containing these elements. For this direction of
current, D2 in ON and shorts the potentiometer R. The voltage drop across RL
caused by this current is small and can be neglected. So, all the supply voltages
appears across C; VC=VS and VC reaches the value Vm at wt=-ð/2, as shown in the
figure 4.2.
3.3) Period: -ð /2 £ wt £ 0:
The voltage (VC -VS) drives a current in the clockwise direction through RL and R.
For this direction of current, D2 is in open circuit, and if R is large; the capacitor has
a large time constant. The voltage across C decreases in magnitude at a small rate as
shown in the fig.4.2.
24
3.4) Period: 0=wt= ð: In this period
a) VS is positive and anode of the SCR is +ve with respect to the cathode.
b) At the same instant during this period, VC assumes a positive value just sufficient
to turn on the SCR taking into account the anode-cathode voltage of the SCR at
that instant. This instant is represented by wt=a. Since VC is always applied between
gate and cathode through D1 ; the SCR torns ON at wt= a.Once the SCR turns ON C
discharges through D2 and the SCR, and VC becomes zero. The triggering process
is then repeated for ð £wt£2ð ; 3ð £wt£4ð and so on.
4. PROCEDURE:
5.2. Initially keep POT at minimum position.
5.3. Vary the POT and observe the lamp glowing.
5.4. Observe the waveforms across thyristor, supply and load using potential divider circuit
on CRO.
Vs
RC triggering waveforms
+Vm
Griet
C
P/2 4P
O P 2P 3P wt
B
-Vm
Vo
+Vm wt
o wt
VT1
o wt
-Vm
Fig- 4.2
25
5. CIRCUIT DIAGRAM:
Lamp
230V, 60W
+ R-Load
A
R1 4.7K
0.25W +
D1 R2
230 V 100 k
TYN612
50 Hz
IN4007 3W VAK
1-f G
AC D2
+
IN4007 -
+ GK
Vc C, 0.2mF
-
-
- K
Fig- 4.3
6. RESULT:
By using resistance-capacitance triggering, the thyristor is triggered and corresponding
Griet
firing angle is noted.
7. WAVEFORMS:
Supply
voltage Vm
Vs
-P/2 P 3P 4P
2P
wt
-Vm
V0
Output
Voltage 0 P 2P 3P
wt
+Vm
Voltage
across P 2P 3P
wt
thyristor
-Vm
Fig- 4.4
26
Experiment 5
UJT TRIGGER CIRCUITS
1. AIM: To study 1. The UJT oscillator triggering

2. Ramp triggering
3. The ramp and Pedestal triggering
2. APPARATUS:1. Universal Power Electronic Trainer Kit.

2. CRO.
3. UJT 2N 2646.
4. Zener diode No.20V, 1W.
5. Resistors 560Ù 2W.
560Ù 0.25W.- 2 Nos.
6. 0.2µF Capacitor.
3. THEORY:
B2 (base 2)
Griet
(Emitter)
B1 (base 1)
Fig-5.1
3.1) The symbolic representation of the UJT is given in fig 5.1
E B1
2N2646
B2
Fig- 5.2
Fig. 5.2 is a representation of UJT when it is held in hand with the connecting leads
facing the viewer. The terminals E, B1, B2 are marked in the fig.5.2 The distance between
B1, and B2 is high compared to others.
27
R2
B2
I
Rb2
+ VD -
IE +
Vs
E
D -
+
VRB1
VEG Rb1
-
B1 +
R1 Vo
Fig-5.3
The operation of the UJT is explained using the circuit of fig-5.3. RB1, RB2 and the
diode D are internal to the UJT. Vs, R1, R2 and VEG. Are externally connected
When VEG is kept at zero volts, the current
VRB1 and Vo have the values IRB1 and IR1 respectively.
VD = - ( VRB1+ Vo) a negative quantity. So IE = 0
Griet
Now let VEG be increased
VD = (VEG - ( VRB1+ Vo))
Becomes less negative., But till VD reaches zero value IE remains zero and VRB
and Vo are unchanged. When VEG reaches the value - ( VRB1+ Vo), VD becomes 0.
IE starts flowing and due to internal changes in the UJT, RB1 becomes 0, Vo
becomes equal to VEG.
3.2) The UJT Oscillator Circuit:
In a UJT oscillator circuit, the variable voltage source VEG (fig 5.4) is made up of a
capacitor(C) which is charged by an external source through a resistance(R).
A
R2
R
B2
+
IE E
Vs
-
+ B1
C Vc (t) +
-
R1
Vo (t)
- B
Fig-5.4
28
Fig- 5.4 gives the UJT oscillator circuit, in which the capacitance is charged by the
voltage source Vs through the variable resistance R. Till it reaches the required
value, IE remains zero. The UJT is an open circuit for C. When Vc reaches the
required value, the UJT suddenly becomes conducting, RB1 becomes zero and R1
gets directly across C. C discharges quickly through R1 (R1 has a small value) and
Vc decreases to small value. Now the UJT again becomes open, and C starts getting
charged again by Vs through R. Typical waveforms of Vc(t) and Vo(t) are shown
in fig-5.5.
Vc(t)
Time Constant RC
V0(t) Triggering Pulses
3.3) Ramp triggering:
Griet Fig- 5.5
This is also called synchronized UJT triggering. The Vo(t) pulses of fig-5.5 are
usually used to trigger thyristor in power electronics circuit which have the AC
source. These pulses must therefore be synchronized with AC source. For example,
a pulse may be required á degrees from every zero-crossing of an AC sinusoidal
voltage. A circuit to achieve this is given in fig 5.6.
R1
IE +
+ VR1 - A
D1 D3
Vs
+ - +
VZ
1
-
E mSinwt
D4 D2
B
-
Fig-5.6
29
The voltage source Vs to the right points of A and B in fig-5.4 is replaced by the
circuit of fig 5.6. Waveforms of the AC voltage Vs ,voltages after diodes the zener
diode voltage Vz are shown in fig 5.7, from which it is evident that theses two
waveforms have a definite phase relationship. It is the voltage Vz which charges
the capacitance of the UJT circuit and so the trigger pulses from the UJT bear a
finite phase relation with Vz , and hence with the ac voltage Vs. Pulse output
voltages are shown in fig 5.7.
Vs = Vm Sinwt
+ Vm
2
wt
- Vm
+ Vm
Voltage
after
diodes wt
Griet
VZ1=Em-VZ
V
Z1
wt
Output of Pulse
Transformer
Fig- 5.7
Fig5.7 also gives the waveform of the voltage across R1, assuming terminals A&B
are open. Vz is determined by the zener diode. (Vs-Vz) is the voltage appearing
across R1. A large R1 will reduce the current due to this voltage across R1.
The zener voltage goes to zero at the end of every half cycle of the supply voltage.
So, the RC circuit starts with zero voltage across it every half cycle. Hence, the
trigger pulse occurs a fixed time after every zero crossing of the supply voltage, and
synchronization is achieved.
30
3.4) Ramp and PedestalTriggering:
Across the terminals A and B (zener diode terminals) of fig 5.6, a resistance R2 is
connected, which serves as a potential divider. The is shown in fig 5.8.
When Vz reaches the Vz early in the half cycle of the AC supply voltage, the diode
D1 enables C to be charged to a voltage VPD (pedestal voltage) very quickly. There after,
C gets charged through R and Vc increases beyond VPD. When Vc reaches the
required value, the UJT is turned on and one pulse is obtained.
In this type of triggering, a large value for VPD means that the triggering pulse
occurs earlier. So the setting of the slider R2 controls the output pulse timing.
+
R
D1
+
R2 +
VZ
To
V Vc UJT
PD C
Griet
-
-
Fig-5.8
3.5) Pulse Transformer:
Pulse transformers are often used in the firing circuits for SCRs. These transformers
have three windings: one primary and two secondaries. The three windings usually
have the same number of turns each. The windings are designed to have low
resistances, low leakage reactance and low inter -3winding capacitances.
If the magnetizing inductance of the transformer is small (this can be easily

achieved by using air core, which reduces the weight), the input and output voltages
waveforms will be as in fig 5.9
Input voltage to pluse transformer primary
output at a secondary of the pulse transformer
Fig-5.9
31
The positive pulses only will be useful in triggering SCRs. The negative pulses can
be removed, if desired, using suitable clipping circuits. The pulse transformer
provides an electrical isolation between the primary side and secondary sides
which is needed in power electronics.
4. CIRCUIT DIAGRAM:
10 K 560W , 0.25 W
3W
B2
100K
15 V 3W E
DC
Supply + UJT 2N 2646
B1
0.1mF +
Vc +
Vo 560W, 0.25 W
To CRO
- -
- -
Fig- 5.10
Griet
560W ,2W
10 kW 560W, 0.25 W
3W
IN4007 IN4007
Vs 100k W
3W B2
+ - 20 V, 1W
Zener E
UJT 2N2646
30 V, 50 Hz
1-f,AC B1
IN4007 0.1mF +
IN4007
560W, 0.25 W
To CRO
-
Fig- 5.11
560 ,2W
560W , 0.25W
IN 4007 IN 4007 1 MW
Vs B2
20 V, 1W 100K W
+ - 3W
Zener E
UJT 2 N2646
IN 4007
30 V, 50 Hz B1
1-f,AC
IN 4007 IN 4007 +
0.1mF
560W, 0.25 W
To CRO
-
Fig- 5.12
32
5. PROCEDURE:
5.1) UJT Oscillator:
1. Connect the oscillator circuit as shown if fig.5.10.

2. Observe the Vc and Vo waveforms on the CRO as the 100KÙ POT is varied. Note
the waveforms for one position of the 100KÙ POT.
5.2) Ramp Triggering Circuit:

2. Observe the waveforms of the output voltage and zener voltage on the CRO as the
100KÙ POT is varied. Note the waveforms for one position of the 100KÙ POT.
5.3) Ramp and Pedestal Triggering:

2. Observe the waveforms of the output voltage and zener voltage on the CRO as the
100KÙ POT is varied. Note the waveforms for one position of the 100KÙ POT.
5.4) Pulse Transformer:
Griet
1. Connect the primary of the pulse transformer across 560Ù.
2. Observe the primary and secondary voltages of the pulse transformer for different
positions of the 100KÙ POT.
6. RESULT:
The pulses useful for triggering of thyristor are generated by using UJT triggering.
33
Experiment 6
EXTENDED PULSE USING UJT TRIGGER
1. AIM: To study the generation of extended pulse for RL- load using UJT triggering.
To make PCB for the circuit.
2. APPARATUS:1. Universal Power Electronic Trainer Kit.

2. CRO.
3. UJT 2N 2646 - 1 No.
4. Zener diode No. 20V, 1W. -1No.
No. 10V, 1W- 2 Nos.
5. Resistors 33KÙ 2W.- 2Nos.
15KÙ, 2W - 2Nos.
22Ù, 2W - 2Nos.
33Ù, 2W - 2Nos.
560Ù, 0.25W.- 2 Nos.
6. POT 470 KÙ 1W - 1No.
7. Pulse Transformer No. 2503-1No.
8. Transformer 230V / 30V, 500mA, 1-f, 50 Hz -1No.
Griet
9. Thyristor No. TYN 2P4 - 2Nos.
10. Capacitor 0.02µF - 2Nos.
0.01µF - 2Nos.
3.THEORY:
3.1) Extended pulse: UJT circuits (for example UJT ramp triggering circuit) give a
narrow pulse as the output. Such a pulse is sufficient to turn on a thyristor, if the load
is resistive. But consider an inductive load; the load current needs time to reach
latching value( since an inductance delays current changes). If the gate cathode
pulse goes to zero before this time; the SCR turns off as soon as the pulse is over. So,
when an SCR is used with an inductive load, pulses of larger duration are needed.
These are called extended pulses.
3.2) Circuit to produce extended pulse: Operation of the circuit: Refer to fig 6.1, 6.3
During 0 < wt<p when Vs(t) is positive, a pulse of Vi(t) occurs at wt=a . Before this
instant, the SCR is off and there is no current in the circuit. Both SCR and the zener
are off, and Vs(t)=Va(t)-Vz(t). Since they are off; both the SCR and the zener act like
high resistances, and share the total voltage Vs(t) in proportion to their resistances.
Va(t) is positive, and the SCR turns on at wt=a; .when the gate pulse occurs it
remains on for the rest of the half cycle, with Va(t)=0. The SCR is ON,when wt=a.
At this time, let Vs(t)= V1; V1< E. The SCR is on then the current through the circuit is
still zero and Vs(t) appears across the zener with Vz(t) = -Vs(t).
34
The SCR is ON When Vs(t) reaches E; the zener is on; and the output voltage stays
at E as long as Vs(t) remains greater than E. Subsequently, it follows the Vs(t)
waveform for the rest of the half cycle. During the half cycle p < wt< 2p; the
zener is forward biased and has zero voltage across it, Vo(t)=0. Since Va(t)=Vs(t);
Vs(t) is negative; Va(t) also is negative and the SCR does not conduct, even when
triggered.
+
VS(t)=VmSinwt
-
+ + -
Va (t) Vz (t) Vo (t) Output pulses
+ - - +
Vi (t)
- +
R VR (t)
-
Griet
Fig.6.1
4. PROCEDURE:
4.1. Make a PCB for the circuit shown in the fig 6.2.
4.2. Observe the waveforms of the output voltage on CRO.
5. RESULT:
The pulses useful for triggering of thyristors in inductive circuit are generated by using
UJT triggering.
35
1-f,
230 V, 50 HZ
Ac Supply
5. CIRCUIT DIAGRAM:
33 K W
2W 15 KW 560W, 0.25 w
2W
IN 4007 IN 4007 230V/12-0-12V
Vs = Vm Sinwt B2
36
470 K
E
1W
Pot TYN
20 V, IW UJT 2 N2646 TYN 10 V
1-f, 2P4 10V
230 V, 50 HZ Zener B1
2P4 Zener
Ac Supply IW Zener
IW
IN 4007 IN 4007 22W
560W, 0.25 W 22 W 0.01m F
0.02mF 2W 2W
0.01m F
33W, 2W
33W, 2W
Griet Fig- 6.2

6. WAVEFORMS:
UJT EXTENDED PULSE WAVEFROMS
+Vm
2 Supply voltage
0
-Vm
voltagel after
cliodes
VZ Zener voltage
Vc Capacitor
voltage
Griet
Pulse Transformer
Output trigger pulse 1
Output trigger pulse 2
Fig- 6.3
37
Experiment 7
1- f HALF CONTROLLED CONVERTER WITH R-LOAD
1. AIM: To study the performance of a single phase half wave controlled converter
with R-load.
2. APPARATUS: 1. Universal Power Electronics Trainer Kit

2. UJT Triggering Circuit
3. CRO
3. THEORY: Refer to fig 7.1

3.1) In the period 0 <wt £ p ;let the SCR be of .Then current through the load, and voltage
drop across the load are zero, and all the supply voltage appears between the anode
and cathode of the SCR; and the SCR is forward biased.
3.2) Let it be triggered at wt=a (0 £ a £ p). Because of the forward bias, it turns on; and the
voltage across the device drops to zero( neglecting the small voltage drop across the
device when it conducts). Supply voltage appears across the load; causing a load
current Vs(t)/RL where RL is load resistance in ohms.
Griet
3.3) During the remaining part of the half cycle a £wt £ p ; Vs(t) is positive , the load
current is positive, and the SCR continues to be on. When the load current tends to
reverse ( at wt= p); the SCR turns off.
3.4) The SCR continues to be off from wt= p up to wt= (2p+a);when it is turned on
again, and the cycle repeats. Wave forms of the supply voltage Vs(t); the gate
cathode triggering signal Vgk(t); and the load voltage Vo(t); can be plotted from the
above .
+ -
4. CIRCUIT DIAGRAM: V T1
+ +
T1
230V, 60 W
1-f, 50 HZ
230 V Ac Supply
Bulb R-Load Vo
VS(t)=VmSinwt To CRO
- -
Fig-7.1
5. PROCEDURE:
5.1. Connect the PCB and observe the extended pulse on CRO.
5.2. Connect the observed pulse to the thyristors between gate and cathode.
5.4. Observe the waveforms across load, thyristor and supply using potential divider
on a CRO.
38
6. CALCULATIONS:
Firing Angle á =
Peak Value of the Supply Voltage (Vm) =
Average value of Load Voltage =
R.M.S.Value of Load Voltage =
7. RESULT:
The performance of a single phase half wave controlled with R-load is verified and
firing angle, average and rms value of the load voltages are calculated.
8. WAVEFORMS:
Griet
+ Vm
Supply Voltage
O
2 3
wt
a
-Vm
V0
wt
V T1
2 3
0 wt
-V m
Fig- 7.2
39
Experiment 8
1- Ô HALF CONTROLLED CONVERTER WITH
RL AND RLE-LOAD
1. AIM: To study the performance of a single phase half wave controlled converter with
RL-load.

2. 12V DC motor
3. CRO
4. 1Ù, 10W resistor,
5.Diode-IN4007.
3. THEORY:Refer to Fig 8.1
3.1) Shows a single phase half wave controlled converter with an input voltage of
VmSinwt, and a permanant magnet dc motor as the load. A dc motor is an R-L-E
load. For just an RL load, the motor is to be replaced by one winding for a
transformer(whose other winding is left open).
Griet
3.2) At wt=a (0<a£ p), the thyristor is triggered and it turns ON. The input voltage which
till this instant is across the thyristor, will now appear across the load and current
starts flowing through the thyristors and the load.
3.3) If the load were purely resistive, the load current and the load voltage will be in
phase. At wt= p; when load voltage reaches zero, the load current also will reach
zero. But since the load inductance opposes changes in the load current also will
reach zero. But since the load inductance opposes change in load current at this
instant load current is still greater than zero. Let the load current finally reach zero
at wt=b,b> p. The SCR then remains ON from wt=a to wt=b and the output voltage
becomes ve during the period wt=p to wt= b. This negative voltage across the load
while the current through it is positive implies that part of energy stored in the
inductance of the load is returned back to the supply. The rest of the stored energy of
the inductor is dissipated in the load resistance.
3.4) Fig.8.2.is identical with fig.8.1.except for the free wheeling diode FWD across the
load .FWD does not permit the load voltage to be negative .Hence, in the period
from wt=p to wt=b; a) load current flows through the free wheeling diode and load
voltage is zero and b) SCR current is zero, the SCR is reverse biased , and it turns
off. Energy in the inductance has to be dissipated only in the load resistance and b is
larger than when a free wheeling diode is not used. If the inductance is large enough;
the load current may persist till wt= 2p +a; at which instant the SCR is triggered
again. -
40
4. CIRCUIT DIAGRAM:
G
+ A K
M
1-f, 50 HZ O To CRO
T
15v, AC Supply O
R
VS(t)=VmSinwt
1W,10W To CRO
-
Fig-8.1
G
+ A K
M
1-f, 50 HZ FWD O To CRO
T
15v, AC Supply O
R
IN 4007
1W,10W To CRO
-
Fig-8.2
5. PROCEDURE:
Griet
5.1. Connect the PCB and observe the extended pulse on CRO.
5.2. Connect the observed pulse to the thyristors between gate and cathode.
5.3. Connect the circuit diagram as shown in figure, 8.1 and 8.2
5.4. Observe the waveforms across load, 1Ù resistor, thyristor and supply with and
without FWD on CRO.
6.1 CALCULATIONS (WITHOUT FWD):
Firing Angle á = Extinction Angle â =

Conduction Angle ã =â-á
Average Value of Load Voltage = Vm
R.M.S.Value of Load Voltage = Vm
6.2 CALCULATIONS (WITH FWD):
Firing Angle á=
41
7. RESULT:
The performance of a single phase half wave controlled with RL-load is verified and
firing angle, average and rms values of the load Voltage are calculated.
8. WAVEFORMS: Without Freeweeling diode
+Vm
Supply P 2P 3P 4P
Voltage O wt
Vs
-Vm
+Vm
out put
Voltage wt
Vo a
Voltage
Across VT1
Thyristor P 2P 3P 4P
wt
out put
Griet
current
Io wt
b
Fig- 8.3
With Freeweeling diode
Vm
Vs
Supply wt
Voltage 2 3
-Vm
Vm
out put
Voltage wt
Vo
Voltage
actross VT wt
Thyriston
-Vm
out put
current
Io wt
Fig- 8.4
42
Experiment 9
1- Ô AC VOLTAGE CONTROLLER WITH
R-LOAD
1. AIM: To study and test the performance of a single phase AC voltage controller with
R-load.

3. CRO
3. THEORY: Refer to Fig 9.1 and 9.2
3.1) When ac voltage is to be stepped down, transformer can do the job efficiently,
and without introducing harmonics in the output voltage. We can also get
reduced voltages by employing SCRs. These are useful in applications where
harmonics in the output voltages are acceptable. The circuit is as shown in fig.9.1
3.2) Then i) io(t) and vo(t) are zero; and ii) VT1(t)= Vm sinwt and VT2(t)= -Vm sinwt. During
the half cycle 0£wt£p; VT1(t) is positive while VT2(t) is negative. Thyristor T1 will
turn on if triggered while T2 cannot. Similarly, during the half cycle p £wt£2p ; it is
T2 that will turn on if triggered; while T1 cannot.
Griet
3.3) Let T1 be turned on wt=p in the half cycle 0£wt£From wt=a to wt=p; the load
voltage Vo(t) and load current io(t) become Vm sinwt and (Vm sinwt/RL) respectively.
At wt=p; io tends to become negative and T1 turns off. Now if T2 is turned on at wt=
p+a in the half cycle p£wt£2p , and a non zero io(t) and vo(t) will be obtained for
p +a£wt£2p . The process is repeated for subsequent cycles of the supply.
3.4) As long as T1 is ON; the small positive value of Vt1 will keep T2 reverse biased and
OFF. A similar process takes place when T2 is turned ON in the negative half cycle of
the supply.
4. CIRCUIT DIAGRAM:
+ V T1 -
T1
Io (t)
+
+
1-f, 50 HZ T2 R - Load
15v, AC Supply
+ Vo (t) Bulb, 230 V
VS(t)=VmSinwt -
V T2 60 W
-
-
Fig-9.1
43
5. PROCEDURE:
5.1. Connect the PCB and observe the extended pulses with 1800 phase shift on CRO.
5.2. Connect the observe pulses to the thyristors between gate and cathode.
5.3. Connect the circuit diagram as shown in fig.
5.4. Observe the waveforms across supply, load and thyristors using potential divider
circuit on CRO.
6. CALCULATIONS:
Firing Angle á =
7. RESULT:
The performance of a single phase AC voltage controller with R-load is verified,
firing angle and rms value of the load voltage is calculated.
8. WAVEFORMS:
+Vm
Supply
Volatage
-Vm
Griet
a
2 3 4 5 wt
+Vm
Output
Voltage wt
-Vm
VT1 wt
VT2 wt
44
Fig-9.2
Experiment 10
1- Ô AC VOLTAGE CONTROLLER WITH RL-LOAD
1. AIM: To study and test the performance of a single phase AC voltage controller with
RL-load.

3. CRO
4. 1Ù, 10W resister
5. 230/12V,500mA(lv) transformer
to serve an RL load.
3. THEORY:Refer to fig 10.1 and 10.2
3.1) 10.1 gives the circuit of on ac voltage controller with R-L load. Fig 10.2 gives the
waveforms of various voltages and currents in the circuit.
3.2) Referring to fig 10.1, during the interval 0£wt£ p ; Let T1 be turned ON at wt=a
i0=iT starts building up through the inductive load R-L. V0(t) becomes equal to Vs(t).
At wt= p ,Vs(t)=V0(t) goes to zero ,but i0(t) does not become zero because of the
Griet
inductance L in the load. T1 continues to conduct beyond wt= ð .Finally, i0 becomes
zero at wt=b; where b> p
3.3) For the period (wt=a) to (wt=b); the load voltage V0(t) is the source voltage Vs(t),
and VT1 (t)=0 .At (wt=b),i0 becomes zero and tends to be negative, T1 turns off, V0(t)
becomes zero, VT1(t) becomes Vs(t) which is negative, and thus effectively turn off T1.
3.4) From (wt=b) to (w=p +a); i0(t) and V0(t) remain zero .(It is assumed that
b<( p +a)).
3.5) A second half-cycle similar to the half-cycle a£w£p +a is obtained by turning ON

T2 at w=(p +a). From wt=(p+a) to wt=(b+p ); i0(t) will be non zero but negative;
while from wt=p +b to wt=2p +a; i0(t) and V0(t) will be zero.
A fresh cycle of load voltage and current variations starts from wt=(2p +a).
4. CIRCUIT DIAGRAM:
T1
Io (t)
+ V T1 -
+ +
+ R Vo
1-f, 50 HZ To CRO
15v, AC Supply T2
- + Vo (t) L
VS(t)=VmSinwt V T2 -
+
1W10W To CRO Io
- -
-
Fig-10.1
45
5. PROCEDURE:
5.2. Connect the observe pulses to the thyristors between gate and cathode.
5.3. Connect the circuit diagram as shown in fig.
5.4. Observe the waveforms across supply, load and thyristors on CRO.
6. CALCULATIONS:
Firing Angle á= Extinction Angle â =

7. RESULT:
The performance of a single phase AC voltage controller with RL-load is verified,
firing angleand rms value of the load voltage is calculated.
8. WAVEFORMS:
+ Vm
VS O
-V m
a
Griet b
2 3 4 wt
b =a+g
Vo wt
VT1 wt
VT2 wt
Fig-10.2
46
Experiment 11
1- Ô SEMI CONVERTER WITH R-LOAD
1. AIM: To study and test performance of a semi converter with R-load.
2. APPARATUS: 1) Universal power electronics kit.

2) UJT triggering circuit.
3) CRO.
3. THEORY: Refer to fig.11.1
3.1) Diode voltages V3 (t) and V4 (t) can never be positive. They can only be zero or
negative. (The anode to cathode voltage of an ideal diode can only be zero or
negative).
3.2) KVL gives Vs (t) =V3 (t)-V4 (t); valid for any t.
3.3) During the half cycle 0 < wt£p , Vs (t) is positive. So V3 (t)-V4 (t) must be positive. In
this half cycle at some instant, let Vs (t) be 10V. Then, at this instant, (V3-V4) must
be 10V. Satisfying the condition of 3.1, at this instant, V3 &V4 can possibly have the
Griet
values (0V & -10V) ;(-2V & -12V); & so on. We can argue that the pair of values
V3=0V and V4=-10V is the only practically possible value. (Practically, there is a
small leakage current being delivered by the source Vs (t) through the diodes. This
current is a forward current in diode D3, and so V3 must be 0).
3.4) We can thus conclude that during the half cycle 0£ wt£p, V3 is 0, diode D3 acts as a
short circuit,V4 is negative and diode D4 acts as an open circuit. If we assume that
none of thyristors is ON, i0 (t) and V0 (t) will be zero. KVL then gives V3 (t) =0 and
V1 (t) =Vs (t), which is positive. Thus thyristor T1 is ready to turn ON if triggered. If
T1 is turned ON at wt=a in this half cycle, the load current flows through T1, load,
D2 and the supply for the rest of half cycle. At wt=p, the current i0 tends to reverse
and T1 turns OFF.
3.5) In the half cycle ð£ wt£2ð; it is T2 that can turn ON and load current flows through
T2, load and D4.
3.6) Waveforms of Vs(t), VT1(t),VT2(t),V3(t), V4(t), V0(t), and i0(t) for some value of
á as shown in figure 11.2. It may be observed that for a purely resistive load, the
fully controlled converter and half controlled converter yield identical load voltage
and load current waveforms.
47
4. CIRCUIT DIAGRAM:
-
+ +
IN4007 IN4007
V3(t) D3 V4(t)
D4
1-f, 50Hz
- -
230 V AC Supply
R-Load
- +
230 V, 60w
Bulb
V0(t)
+ VS(t)=VmSinwt +
VT2(t)
T2 T1 VT1(t)
-
TYN612 TYN612
-
io(t) +
V
Fig-11.1
5. PROCEDURE:
5.2. Connect the observed pulses to thyristors between gate and cathode.
Griet
5.4. Observe the waveforms across supply, Load, Thyristor using potential divider
circuit.
6. CALCULATIONS:
Firing angle á =
Peak value of supply voltage Vm =
Average load Voltage = Vm
Rms value of load voltage = Vm
7. RESULT:
The performance of a single phase semi converter with R-load is verified and
firing angle, average and rms values of the load voltage are calculated.
48
8. WAVEFORMS:
Vs
Supply Vm
Voltage
Wt
2
VT1(t)
Wt
VT2(t)
Griet
Wt
Wt
VD3
Wt
VD4
V0,I0 Wt
49
Experiment 12
1- Ô SEMI CONVERTER WITH RL-LOAD
1. AIM: To study and test performance of a semi converter with RL-load.
2. APPARATUS: 1) Universal power electronics kit.

2) UJT triggering circuit.
3) CRO.
3. THEORY: Refer to fig. 12.1,12.2
3.1) Whenever both T1 and T2 are OFF, the following will be true:
a) I0 (t) = 0. (No path for current to flow).
b) di0/dt = 0 (since i0 (t) is zero continuously, this follows. This means that
Voltage across the inductance L is zero).
c) v0 (t) = E. (from KVL).
3.2) In addition to T1 and T2 both being OFF, if Vs(t) is +ve ( half cycles 0£wt£ ð,
2 ð£wt£3 ð ,…), V3(t)=0, V4(t)= -Vs(t); VT2(t)= -E, and VT1(t)= -E+ Vs(t). On the
Griet
other hand, if Vs(t) is ve( half cycles ð £wt£2 ð, 3 ð£wt£4 ð,…)
V4(t)=0,V3(t)=Vs(t),VT1(t)= -E, and VT2(t)= -E -Vs(t).
(All these relations can be shown using KVL).
3.3) Now consider the half-cycle 0£wt£ ð , with T1 and T2 both off. VT1 becomes
positive when Vs (t) > E. Let it occur for wt>q . Then T1 will turn ON if triggered at
wt=a, for any a >q. Let T1 be so turned ON. Then i0 (t) starts flowing through T1,
the RLE load, D3, and the supply. This current is opposed by E and so i0 reach zero
earlier than it would if E is zero. Let i0 reach zero at wt=b, depending on the values
of E, L, and R,b can be less than, equal to, or greater than ð. As an example,
b is considered to lie between ð and (ð +q) in the waveforms of fig.12.2.
3.4) From wt=b onwards, both T1and T2 will be OFF. T2 will be triggered at wt= (ð
+a), to cause another cycle of load voltage and load current, similar to those
described in (3) above.
3.5) Waveforms of Vs, VT1, V0 and i0 are shown in fig.12.2. During the period
ð£wt£b; while the load current is not zero, the load voltage V0 is zero in this semi
converter circuit. (It would be negative in a fully controlled converter). Waveform of
VT2 is complementary to that of VT1.
3.6) For an R-L Load, simply assume that E=0 in the above. Waveforms will get suitably
modified.
50
Vs
Supply Vm
Voltage
E
b p+qp+a
Wt
q a 2
Vm
Wt
-E
Vo(t)
E
Io(t)
Wt
VT
b-P
Fig-12.1
4. CIRCUIT DIAGRAM:
io(t)
V
+
+
TYN 612 TYN 612

- - R V0(t)
VT1(t) VT2(t)
T1 T2
L
Is + + RLE Load
V0(t)
V
+ E -
15V,50 Hz,
1-f AC Supply +
- -
- 1W
VS(t)=VmSinwt
10W
V4(t) D3
V3(t)
D4
Current I0(t)
+ IN4007 IN4007 + Sense
- -
Fig-12.2
51
5. PROCEDURE:
Griet
5.3. Connect the circuit diagram as shown in figure 12.1, and then as shown in fig. 12.2
5.4. Observe the waveforms across supply, load, thyristor, 1? resistor with and without
free-wheeling diode on CRO. ( theoretically same result should be obtained with
and without free-wheeling diode).
6.1 CALCULATIONS (for RL load):
Firing Angle á=
Peak Value of the Supply Voltage ( Vm) =

(1 + Cos a )
p
R.M.S.Value of Load Voltage = Vm 1
((b - a )- (Sin 2 b - Sin 2a ))
2 p
For RLE load
Firing Angle á=
Peak Value of the Supply Voltage (

Vm) =
Average Value of Load Voltage é a - b ù Vm
VAVG = E ê1 + + (1 + COSa )
ë p úû p
52
7. RESULT:
The performance of a single phase semi converter with RL-load is verified and
firing angle, average and rms value of the load is calculated.
8. WAVEFORMS:Practical
With Free Wheeling diode :-
+Vm
Supply
Voltage 2 3 4
wt
Vs
-Vm
out put
Voltage
Vo
+ a wt
a
Out put
Current
Griet
Io
+ a 2 a
+ 3 4 wt
Fig-12.3
Without Free Wheeling diode :-
+ Vm
Supply
Voltage O
2 3 4 wt
Vs
-Vm
a
+Vm
out put
Voltage 2 3 4
wt
Vo
a
Out put
Current
Io a 2 3 4 wt
Fig-12.4
53
Experiment 13
TRIGGERING OF THYRISTOR USING 555 TIMER
1. AIM: To study the operation of triggering of thyristors using 555 timer.
2. APPARATUS: 1. Universal Trainer Kit

2. CRO
3. 555 Timer
4. BC107 Transistor
5. 10V, 1W Zener
6. Resistor 250Ù 10W
1K Ù 1W3 No's
4.7KÙ 0.25W
250Ù 0.25W
7. 4.7KÙ 1W POT
8. 1ìF, 0.01 ìF, 0.047 ìF Capacitor
3. THEORY:
Internal connections of the 555 Timer chip:
8
2
3 VCC
Griet
Y 3
R S Out put
+1 stage
Out put
6 -
Comparator 1 7
5
FF
R
Points 1 to 8
are brought out
2 Y
+2 R through pins for
- Inputs
external connections
1 Comparator 2
R 3 VCC 4
VREF
1
Fig-13.1
External connections to be made to the 555 chip:
+V
RA
8 4
7 3 Out put
RB 555
6 5
2 1
C1
C
-VGround
Fig-13.2
54
Equivalent circuit diagram of connections:
+VCC 8
(NPN)
7
RA R Out put
3
stage Out put
Comparator 1
5
2V
3
CC
+ S
Y
1
- Control
R 6 FF
R
B Inputs
+2
-
R
Y
C1 1 V Comparator 2
CC
3
vC +_
C
C
R
Fig-13.3
(PNP transistor is not shown in the circuit .The capacitor C1 is for smoothing any
ripples in the Vcc supply and is not essential for understanding the operation of the
circuit)
Operation:
In case of comparators +input>-input; output=1
Griet
+input=input; output=0
Regarding SR filp flop
S R Y
0 0 ___
0 1 0
1 0 1
1 1 Previous state
3.1) From the circuit of fig.13.3, it can be seen that the resistance of 3RÙ is directly
across the dc supply Vcc volts. The inputs to the “+ terminal” of comparator1; and
to the “– terminal” of comparator2 are (2/3)Vcc and (1/3)Vcc respectively. These
do not change during operation of the circuit. C1 eliminates the ripples in DC.
3.2) It can also be noted that the capacitance C, in series with the resistances RA and
RB, is also directly across Vcc. The voltage Vc(t) across C is applied to the
“-terminal” of comparator1 and also to the “+terminal” of comparator 2.
3.3) At the instant of switching on power, Vc (t) =0.As can be verified from
Fig.13.3, R=0, S=1 and Y =0 at this instant. The NPN transistor of fig.13.3 acts
as an open-circuit, and C starts getting charged through RA and RB, with a time
constant (RA+RB) C sec. Vc (t) increases.
3.4) When Vc (t) reaches Vcc/3 and continues to increase, R become 1. The flip-flop
assumes the state R=1, S=1 and Y =0. Initial transient operation is now over.
3.5) When Vc (t) increases from Vcc/3 to 2Vcc/3 and slightly more, S becomes 0, R
stays at 1 and Y becomes 1. The NPN transistor acts as a short circuit and C in
series with RB is shorted.
3.6) VC(t) now starts decreasing, and as it becomes less than 2Vcc/3, S returns back to
the value 1; but Y stays at when Vc(t) decreases to Vcc/3 and slightly lesser, R
becomes 0; and with R=0, S=1; Y becomes 0.
55
3.7) The NPN transistor starts acting as an open- circuit. C now starts getting charged
through RA and RB, and R resumes the value 1. With R=1, S=1, A stays at 0
while the capacitor is getting charged.
15 W
Load
Bulb
4. CIRCUIT DIAGRAM:
TYN612
K
G
-
1-f AC
Supply
50 HZ
230 V
0/P
mf
1
2N5296
250W , ½ w
1 KW
1W
Griet
E
Fig-13.4
C
B
0.25 W
1 kW
mF
0.1
4.7kW
POT
0.25 W
4.7 KW
0.047
mf
6
2
3
1
1 kW, 1W
555
4
5
8
0.01
mf
10 V, 1W
250 W
10 W
+ 30V
56
5. PROCEDURE:
5.1. Connect the circuit as shown in fig.13.4
5.2. Observe the waveform at the emitter terminal of the transistor on CRO without
potential divider.
5.3. Observe the waveform at the supply, load and thyristors using potential divider
circuit on CRO.
6. RESULT:
The operation of triggering of thyristors using 555 timer is studied and firing angle is
calculated
7. WAVEFORMS:
30 V
Dc
Input
Output Pulse
Griet
WT
+ Vm
Supply O P 2P 3P 4P WT
Voltage
Vs a
- Vm
+Vm
out put
Voltage WT
Vo
Voltage VT1 WT
P 2P 3P 4P
Across
Thryvistor
Fig-13.5
57
Experiment 14
TRIGGERING OF THYRISTOR USING
ASTABLE MULTIVIBRATOR
1. AIM: To study the operation of triggering of thyristors using astable multivibrator.

2. CRO
3. UJT 2N2646 2 Nos.
4. BC107 Transistor 2 Nos.
5. 15V, 1W Zener
6. Resistor 180Ù,2W
6.8K Ù, 0.5W 2 Nos.
2.7KÙ, 0.5W 2 Nos.
330Ù, 0.5W 4 Nos.
7. 4.7KÙ, 1W POT
8. Capacitor 0.02 ìF 2 Nos.
0.47 ìF 2 Nos.
+ Vcc
3. THEORY:
Griet
R2 R1 I2
Rc1 I1 Rc2
Vc1 Vc2
C2 C1
Q1 Q2
OFF Vb1 Vb2 ON
Fig- 14.1
3.1) Fig.14.1 shows the collector coupled astable multivibrator using NPN transistor.
The collectors of both transistors Q1, Q2 are connected to the bases of the other
transistor through the coupling capacitor C1, C2. Since both are ac coupling,
neither transistor can remain permanently cut off.
3.2) Instead the circuit has two quassi states and it makes transition between these
states. Hence it is used as a master oscillator. No triggering signal is required for
this multivibrator.
3.3) The component values are selected such that, the moment it is connected to the
supply, due to transients, one transistor will go into saturation and the transistor
into cut off, and also due to capacitive coupling, it keeps on oscillating.
58
Q1 ON Q2 OFF Q1 ON
Vc2 Q2 OFF Q1 ON Q2 OFF
Vcc
(a) I’B Rc
VCE (Sat) d
0
t
t=0 t = T1 t = T1+T2
Vcc
VB2 VBE (Sat)
Vg
0
t
(b) I’B Rc
T1 T2
t=0 t = T1 t = T1+T2
Vc1
(c) Griet
VCE (Sat) d
Vcc
0
t
t=0 t = T1 t = T1+T2
Vcc
VB2 VBE(Sat)
Vg
0 t
(d)
I2RC
T1 T2
t=0 t = T1 t = T1+T2
Fig- 14.2
59
3.4) At t=0, Q2 goes to ON state and Q1 goes to OFF state. So for t<0, Q2 was OFF and
Q1 was ON. Hence for t<0, vB2 is negative, vC2= Vcc, vB1= VBE (sat), vC1= VCE (sat).
The capacitor C2 charges from Vcc through R2 and vB2 rises exponentially towards
Vcc. At t=0, vB2 reaches the cut-in voltage Vã and Q2 conducts.
3.5) As Q2 conducts, its collector voltage vC2 drops by I2Rc = Vcc - VCE (sat). This drop
in vC2 is transmitted to the base of Q1 through the coupling capacitor C2 and hence
vB1 also falls by I2Rc. Q1 goes to OFF state. So vB1= VBE (sat) - I2Rc and its collector
voltage vC1 rises towards Vcc. Since Q2 is ON, C1 charges from Vcc through R1 and
hence vB1 rises exponentially. At t=T1, when vB1 rises to Vã, Q1 conducts and due
to regenerative action Q1 goes into saturation and Q2 to cut off. For t>T1, the
coupling capacitor C2 charges from Vcc through R2 and at t= T1+T2, when vB2
rises to Vã Q2 conducts and due to regenerative feed back Q2 goes to ON state and
Q1 to OFF state. The cycle of events repeats and the circuit keeps on oscillating
between its two quassi state.
The frequency of the astable multivibrator is given by

If R1= R2=R, C1= C2=C then T1= T2= T
Griet
The frequency of oscillation can be varied from cycles to mega cycles by varying
RC.
4. PROCEDURE:
5.1. Connect the circuit as shown in fig.14.3
5.2. Observe the waveform at the pulse transformer on CRO without potential divider.
5.3. Observe the waveform at the supply, load and thyristors using potential divider
circuit on CRO.
5. RESULT:
The operation of triggering of thyristors using astable multivibrator is studied and
firing angle is calculated
60
+ 30 V Dc Supply
180W
2w
10 KW, 2w
dual
PoT 330 KW
6. CIRCUIT DIAGRAM:
330W 330W ½W
1/2w 1/2w
2.7 KW
15V, IW 1/2w
Zener 0.47 m f 0.47 m f
61
6.8 KW
TYN612
½W
330 KW
6.8 KW ½W
C
B2 C ½W 230 V
B2
UJT E UJT 1-f AC
2N2646 B 2N2646 R
B Supply Load
E 50 HZ
E B1 230V
B1 E
Q1 Q2 60W
Bulb
0.0 22mF
Pulse
Transformer
Fig-14.3 Griet 0.022mF Pulse Transforms

7. WAVEFORMS:
DC
Voltage
30 V
wt
VCE Q 1
15 V
wt
VCE Q 2
15 V
wt
Griet
Pulse
wt
Vm
Supply
Voltage
2 3
wt
a
-Vm
+Vm
Output
Voltage
wt
Thyristor
Voltage
wt
-Vm
Fig-14.4
62
Experiment 15
DC CHOPPER USING MOSFET
1. AIM: To study the performance of speed control of DC motor using MOSFET.

2. Diodes IN4007- 4
3. CRO
4. 741 OP-AMP- 1No
5. Resistors 15kÙ and 10kÙ- 1No
6. MOSFET( IRF 730)- 1No
3. THEORY: Refer to fig 15.1 and 15.2
3.1) 15V, 50Hz single phase sine wave is converted into full wave rectified DC by
using rectifier bridge.30V, 5amp fixed DC voltage is converted to variable DC
voltage by using the 100kÙ POT.
3.2) The variable dc voltage is compared with full wave rectifier by using 741 op-
amp. Here the op-amp is used as a comparator. When a sine wave is compared
with dc output of the comparator is a square wave.
Griet
3.3) The output of op-amp which is a square wave is available at pin 6. This is used
as a gating signal to trigger MOSFET. When dc voltage is varying, the width of
the output pulse gets varied.
3.4) When width of the output pulse varies, average DC output voltage between the
drain and source of the MOSFET varies, and the circuit acts as a chopper. The
chopper output controls the speed of a DC motor. The circuit achevies power
amplification as compared to the DC potential divider used in the comparator.
63
4. CIRCUIT DIAGRAM:
+12v
MOSFET
IRF 730
15kW, 0.5w - 2 7 G D S
741 lC 6
10kW
3 4
+
0.5w
-12v
12V M
o
DC t
o
Motor r
IN4007 IN4007
D1 D2
1-f, 50 Hz 12v
15v AC Supply
_
+
+
Vs
30 v
IN4007 IN4007 DC
D3 D4
Supply
100kW 3w
Griet
Fig-15.1
5. PROCEDURE:
5.1. Connect the circuit as shown in figure. 15.1.

5.2. By varying 100kÙ POT observe variation of speed of motor.
5.3. Observe the waveforms of gating signal and load voltage in CRO.
6. RESULT:
The performance of speed control of DC Motor using MOSFET is studied.
64
7. WAVEFORMS:
+Vm
Supply
P 2P 3P
Voltage Vs
wt
- Vm
Voltage
at
diodes Variable Dc Valtoage
wt
+12V
Output of Op-AMP wt
-12V
Griet
+10V
Voltage
across
Motor wt
Fig-15.2
65
Experiment 16
SINGLE PHASE SERIES INVERTER
1. AIM: To study the performance of single phase series inverter.
2. APPARATUS:1. Universal Power Electronics Trainer Kit

2. CRO
3. UJT triggering circuit.
4. Thyristors (TYN 612) -2 Nos
5. Inductor 10mH - 2 Nos
6. Capacitors 10ìf/230v -2 Nos
3. THEORY:
The DC to AC power converters are known as inverters. In other words, an inverter is
a circuit which converts a DC power into an AC power at desired output voltage and
frequency. This conversion can be achieved either by controlled turn-on and turn-off
devices (Eg: BJTs, MOSFETs, IGBTs) or by forced commuted thyristors, depending
on the applications. The output voltage waveforms of ideal inverter should be
sinusoidal. The voltage waveforms of practical inverters are however, non sinusoidal
and contain certain harmonics.
Important industrial applications of inverters are:
1.Variable speed AC motor drives
Griet
2.Induction heating
3.Aircraft power supplies
4.Uninterruptible power supplies
5.High voltage DC transmission
Inverter classification: Inverters can be classified in the following categories:

1.According to the method of commutation
2.According to the connections
Classification according to the method of commutation:
1.Line commutated inverters
2.Forced commutated inverters
Line commutated inverters: In case of AC circuits, when the current in the SCR goes
through a natural zero, the device is turned off. This process is known as natural
commutation process and the inverters based on the principle are line commutated
inverters.
Forced commutated inverters: In case of DC circuits, since the supply voltage does
not go through the zero point, some external source is required to commutate the device.
This process is known as forced commutation. and the inverters based on the principle
are called as forced commutation inverters.
Classification according to connections: According to the connections of the thyristor
and commutating components, the inverters can be classified mainly into 3 groups.
1.Series inverters
2.Parallel inverters
3.Bridge inverters
66
SERIES INVERTER: Operation of the circuit: Refer to fig: 16.1
3.1) Let T1 & T2 both be OFF. Then, by symmetry, Vc1(t)=Vc2(t)=E/2=VT1(t)=VT2(t).

There is no current anywhere. Either T1 orT2 can turn on if triggered.
3.2) Let T1 be turned ON then by using regular network methods for Vo(t) can be
Rt
analyzed The result is V (t ) = E R e - 2 L Sinwt ; where 1 R2
O
2 wL w= -
2 LC 4 L2
1 R2
(It is assumed that ñ 2 .otherwise the circuit cannot work as an inverter).
2L 4L C
When wt=ð; V0(t) reaches zero; also, the current through L (which is the same as
the current through T1 of fig 16.1) reaches zero and tends to reverse.T1 turns OFF.
(The circuit is a naturally commutated inverter);VT1 and VT2 resume their values of
E/2 each.
3.3) Any time after T1 turns off, T2 is tuned ON, and get a negative half cycle of V0(t). By
thus alternating turning ON T1 and T2 we get an AC voltage across load.
3.4) The mutual coupling between the two inductance of fig 16.1 serves to prevent short
circuiting of the supply in case T2 is turned ON before T1 is turned OFF.
Griet
3.5) The triggering circuit for the thyristors should be so designed that the period
between triggering of T1 and T2 is greater than the period ð/w is given in (3.2).
4. CIRCUIT DIAGRAM: +
+
Thyristor VC1(t) - 10 mF/230 V (CF)
VT1(t) TYN 612
C A G
LH10 mH
-
+ MH
To CRO
+ Vo -
1KW
Pulses
LH10 mH
30V Thyristor
DC VT2(t) TYN 612
supply
C A G
E
-
VC2(t) + mF CF/ )
- 1 0 2 3
Pulses
-
Fig-16.1
67
5. PROCEDURE:
5.3. Connect the circuit diagram as shown in figure 16.1.
5.4. Observe the waveforms across supply and load on CRO.
6. RESULT:
The performance of single phase series inverter is studied.
7. WAVEFORMS:
30 v
V dc Input Voltage
Griet
wt
+18v
Output Voltage
wt
10 msec
10 msec
-18v
Fig-16.2
68
Experiment 17
SINGLE PHASE PARALLEL INVERTER
1. AIM: To study the performance of single phase parallel inverter.

2. CRO
4. Thyristors (TYN 612) -2Nos
5. Transformer 230V / 30V, 500mA, 1-ö, 50 Hz - 1Nos
6. Capacitors 10ìf/230v -1Nos
3. THEORY:
Basic Parallel inverter: Principle of Operation
Assumptions: (Refer to fig 17.1)
1) T1, T2 ideal. When conducting, voltage drop across them is zero.
Their turn on& off times are zero.
2) Transformer core has a high permeability. A small magnetizing current is sufficient
to produce a large core flux. ö(t)=k i(t) where for a given ö, k large & I small
Griet
For a given rate of change of flux, since K large,
T1
will be small. It is the rate of
change of flux which determines the induced voltages in the windings.
IT1(t) I1(t)
D i L(t)
B C
+
+ -
V (t)
Ic(t)
V1(t)
N1 +
T1
R
- E
VL (t) R2
+ N2
A + Vc (t) c +
TYN612 -
Source E
F -
T2
IT2(t) V2(t) N1 -
+ - G -
J
VT2(t) H
I2(t)
Fig: 17.1
69
Analysis:
1) Initially, let T1 & T2 both be off. All currents in the circuit are zero.
Considering the loop ABCDEF, KVL gives
VT1(t) + V1(t)=E
Since i1(t) =0; no core flux; no voltages a/c transformer windings,V1(t) & V2(t) =0;
Therefore VT1(t)=E. T1 is ready to turn ON if triggered.
Considering the loop ABJGHEF, KVL gives
VT2(t) - V2(t)=E. Since V2(t)=0; VT2(t)=E.
T2 is also ready to turn ON if triggered.
2) At t=0; Let T1 be turned ON. At this instant, VT1(t) becomes zero. From KVL; V1(t)
becomes E; So V2 (t) becomes E; & VL(t) become E.
From the loop BCDHGJ; VT2(t) becomes 2E and T2 is ready to turn ON if triggered.
(Can the voltage across a transformer winding change instantaneously?
Certainly yes, All that it requires is that change instantly, not that ö should
change instantly).
Since VL(t) become E; iL(t) =
The current iL(t) = appearing instantly in the secondary of the transformer,
requires a component in i1(t),& in –i2(t);for amp-turn balance
Griet
requirements. Further; i1(t) [but not i2(t)] contains a component of current increasing
at a small but constant rate; to account for the dc voltages E across the two primaries
& the secondary of the transformer .The current i2(t) remains at zero. Again; at this
instant, a voltage 2E appears across the R-C circuit. in a short time, depending on
the time constant RC;C gets charged to Vc=2E.Let T2 be turned ON at a time t=T.
VL(t) = V1(t) =V2(t)
o
t
IL(t)
E/RL
T 2T t
Fig: 17.2 I1(t)
A
o
t
Vc(t)
2E
i2(t)
t
A
o t
70
3) At t=T; T2 is triggered: Analysis for t >T:
At t=T+; T2 is ON. The capacitor voltage gets applied across T1, such that
VT1(t) = -2E T1 turns OFF.
V2(t) becomes –E. V1(t) & VL(t) also become –E,& iL becomes
i1(t) drops to zero.- i2(t) contains a component
and another component which decrease at a steady rate to account for

the negative DC voltage across the windings.
Therefore i2(t) contains a component E/RL and another component which
increases at a steady rate. Vc(t) now acquires a value -2E; ready to deliver charge
necessary to turn off T2 when T1 is triggered.
The waveforms for T£t£2T are also shown, the cycle of operations being
repeated at t=2T.
The square waveforms of VL & iL show the inverter action.(In fig:17.2)
4. CIRCUIT DIAGRAM:
TYN612 15 v 230 v
Vi
10V
DC
Supply
+
-
Griet 10mF/230 V
TYN612
C
0
15 v 230 v
1KÙ
Vo
Fig-17.3
5. PROCEDURE:
5.4. Observe the waveforms across supply and Load on CRO using potential divider
circuit.
.
71
6. RESULT:
The performance of single phase parallel inverter is studied.
7. WAVEFORMS:
Input voltage10 V
Vo
8V
Griet
o
t
10 msec 10 msec
-8V
Fig-17.4
72
Experiment 18
SINGLE PHASE INVERTER USING MOSFET
1. AIM: To study the performance of single phase inverter using MOSFET.

2. CRO
4. MOSFET (IRF 730) -2Nos
5. Inductor 10mH - 2Nos
6. Capacitors 10ìf/230v -2Nos
3. THEORY:
The DC to AC power converters are known as inverters. In other words, an inverter is
a circuit which converts a DC power into an AC power at desired output voltage and
frequency. This conversion can be achieved either by controlled turn-on and turn-off
devices (Eg: BJTs, MOSFETs, IGBTs) or by forced commuted thyristors, depending
on the applications. The output voltage waveforms of ideal inverter should be
sinusoidal. The voltage waveforms of practical inverters are however, non sinusoidal
and contain certain harmonics.
Important industrial applications of inverters are:
Griet
1.Variable speed AC motor drives
2.Induction heating
3.Aircraft power supplies
4.Uninterruptible power supplies
High voltage DC transmission
INVERTER USING MOSFET: Refer to fig: 18.1

It consists of two MOSFETs M1 & M2 which are
used to produce two halves in the output. During the positive half cycle, M1 conducts
and the load voltage is positive, for the next half cycle, M2 conducts and the load
voltage is negative.
4. PROCEDURE:
5.2. Connect the observed pulses to MOSFET between gate and source.
5.4. Observe the waveforms across supply and Load on CRO.
5. RESULT:
The performance of single phase inverter using MOSFET is studied.
73
4. CIRCUIT DIAGRAM:
+
MOSFET -
10 mF/230 V
IRF 730
M1
G D S
10 mH To CRO
+
1KW
Pulse 10 mH
MOSFET
30 V M2 IRF 730
DC G D S
Supply
+
-
10 mF/230 V
Griet
Pulse
-
Fig-18.1
7. WAVEFORMS:
30 v
V dc Input Voltage
+18v
Output Voltage
t
10 msec 10 msec
-18v
Fig-18.2
74
Experiment 19
SINGLE PHASE CYCLO CONVERTER
1. AIM: To study the performance of single phase cyclo converter.

2. CRO
3. Single Phase Cyclo Converter Kit
4. 60W Bulb.
Tp1
3. THEORY:
A
TN1
+
Va0
60w lamp resistive
+ - io
0 Load C
Griet
-
+
VS(t)=VmSinùt -
V0
-
Vb0 Tp2
+
TN2
B
Fig-19.1
3.1) Let the load be resistive load. The circuit uses a single phase transformer with
center tapped secondary. It consists of four thyristors TP1, TN1, TP2 and TN2.
Thyristors TP1 and PN1 are connected in anti parallel and so are TP2 and TN2. All
the four thyristors need forced commutation. Thyristors TP1 and TP2 form positive
group, TN1 and TN2 form negative group. Load is connected between the center
tap O and the terminal C. The assumed positive polarities of voltages are vO, vAO,
vBO.
3.2) During the positive half cycle of source voltage vS, terminal A is positive with
respect to the centre tap O i.e. voltage vAO is positive. But terminal B is negative
with respect to O i.e. voltage vBO is negative.
3.3) Hence during the positive half cycle, thyristors TP1 and Tn2 gets forward biased
for 0< ùt <ð. Thyristor TP1 gets turned ON at ùt=0.
75
3.4) Load voltage vO becomes positive with respect to terminal O. At angle ùt1 TP1 is
forced commutated and forward biased thyristor TN2 is turned ON. As a result, vO
becomes negative i.e. terminal C becomes negative with respect to O. Hence
beyond ùt1 output voltage vO traces the negative envelop of the supply voltage.
3.5) At angle ùt2, thyristor TN2 is forced commutated and thyristor TP1 is turned ON.
The load voltage vO becomes positive and again traces the positive envelop of the
supply voltage. Thus thyristors TP1 and TN2 are alternately force commutated.
Thus output frequency is fo=6fs.
Supply Voltage
Supply Voltage nBA envelope
n envelope
A0
T0=1/f0
Vo,Io Tp1
Tp2
Tp1
Tp1 Tp2
Tp2
TN1
wt
TN2
TN2
Tn1
TN1
TN2
wt1
TS=1/fS
Griet Fig-19.2
3.6) At ùt= ð, terminal O becomes positive with respect to terminal A. Hence during
the negative half cycle ð < ùt <2ð, thyristors TP2 and TN1 get forward biased. At
ùt= ð, TN2 is forced commutated while forward biased thyristor TP2 is ON. At
instant 1/6 th half cycle beyond ùt= ð, TP2 is forced commutated and the forward
biased thyristor TN1 is ON. Thus during this half cycle i.e. ð < ùt <2ð, thyristors
TP2 and TN1 are switched alternately.
4. CIRCUIT DIAGRAM: T1
+
I
T1
+ -
Io
230V, Vs Load
1- f, AC
+ - +
V0
50 HZ
-
- T2
230/12-0-12 V
I
T2
Fig-19.3
76
5. PROCEDURE:
5.1. Connect the circuit as shown in figure. 19.3.

5.2. Supply is given externally by using 230/30V, 500 mA, and center tapped
transformer.
5.3. Switch ON the cyclo converter kit.
5.4. Observe the waveforms across load in CRO without potential divider by varying
the firing angle and frequency division.
6. RESULT:
The performance of single phase cyclo converter is studied at different frequencies and at
different firing angles.
7. WAVEFORMS:
+Vm
Supply
Griet
Voltage
o
P 2P 3P 4P 5P 6P wt
- Vm
+Vm
Output at f/2
Frequency
O
wt
T/2
- Vm
+Vm
Output at f/3
Frequency T/3
O P 2P 3P 4P 5P 6P wt
-vm
Fig-19.4
77
Experiment 20
COMMUTATION OF SCRs
1. AIM: To study different methods of commutation of SCRs.

2. THYSET No.9MR
3. Multimeter
4. Batteries 9V, 1.5V
3. THEORY:
3.1) SCRs are employed as switches in power circuits (high current circuits). When an
SCR is OFF (i.e. when the current through it is zero); it acts as an open switch.
While in the OFF state, if its anode is positive with respect to its cathode, it can be
turned ON by making the gate momentarily positive with respect to cathode.
3.2) In the ON state, the anode to cathode voltage is very small and constant,
irrespective of the current from the anode to cathode. The SCR acts as a closed
switch.
Griet
3.3) When SCR is ON, then the process of bringing it into OFF state is called
commutation. Basically, there are two ways of doing this:
1. When it is ON, if the current through it (from the anode to cathode) is made
zero, or negative, SCR turns OFF. It has to be triggered again to make it ON.
This is called current commutation.
2. When SCR is ON,if voltage is applied between anode and cathode with
cathode positive and anode negative, the SCR turns OFF. (The current it has
been carrying prior to turn OFF will be transferred to some other parts in the
circuits). This is called voltage commutation.
3.4) In circuits with external AC supplies, the currents naturally tend to reverse
periodically. The thyristor carrying these currents automatically turns OFF
periodically. This is called natural commutation. But in circuits like choppers and
inverters, this may not occur. There an external circuit has to be employed to turn
OFF the thyristor at the desired instants. This is called forced commutation.
Forced commutation circuits employ voltage or current commutation.
Commutation is again sub-divided into classes A, B, C, D & E.
78
4. CLASS A COMMUTATION:
4.1. CIRCUIT: +
+
A
VAK
5P4
0.1mF
FTO,SCR
S1
K 30 V
-
DC
5mH
560KW,1/2 W Supply
LED
1mF
1.5mF
0.22mF
C 2.7KW ,0.5w
-
Fig- 20.1
4.2. THEORY: Refer to fig: 20.1
With SCR OFF, VAK = 30V. When the push button is pressed, the SCR is
triggered and turns ON.
Griet
If C is large, the resistance across it can be ignored and the supply of 30V is
applied across L and C. The current through the series connected elements SCR,
L and C varies sinusoidally. When it tends to be negative, the SCR turns OFF by
current commutation.
If C is small, it could be ignored, and the SCR would permanently stay ON. It
would never commutate.
4.3. PROCEDURE:
1. With C= 0.22 ìF, turn ON the power supply and trigger the SCR by pressing S1.
2. Repeat with higher values of C.
79
5. CLASS B COMMUTATION:
5.1. CIRCUIT:
+
5mH
5P4 0.1 mF
FTO,SCR S1
+ 1.5mF 0.22mF 30 V
C
VC DC
1mF
- 560KW,1/2W Supply
LED
2.7KW ,0.5w
-
Fig- 20.2
Griet
5.2. THEORY: Refer to fig 20.2
Let the DC supply be switched ON. The SCR will be initially OFF and C gets
charged to Vc= 30V. A momentary glow of the indicating LED shows this
charging. When SCR is turned ON, a) lamp starts glowing; and b) the LC circuit
is completed through the SCR. Current ic varies sinusoidally with ( )
First ic completes a negative half cycle, and then becomes positive. While it is
positive and increasing, it opposes the load current flowing through the SCR, and
the net SCR current decreases. When the SCR current reaches zero, it turns OFF.
The indicating lamp momentarily glows and turns OFF when the SCR is
triggered, showing the turn ON and the commutation of SCR.
5.3. PROCEDURE:
1. With C= 0.22 ìF; turn ON the power supply and observe the indicating LED. Now
trigger the SCR by pressing S1 and observe the indicating LED.
80
6. CLASS C COMMUTATION:
6.1. CIRCUIT:
+
+ +
LED1 LED2
Vl1 Vl2
- -
2.7KW, ½ w 2.7KW, ½ w
+
0.1 mF 0.01 mF
C
VC
0.04mF
- 30 V
+ TYN
+ DC
2P4, SCR2
V1 5P4 0.1 mF
V2 S2 Supply
FTO, SCR1
- - VS
560KW
0.1 mF
S1
1W, 10w
560KW
Griet
-
Fig- 20.3
6.2. THEORY:Refer to fig :20.3
Initially let both the SCRs be OFF. Then v1 = v2 = vs and vc, vl1 and vl2 are zero.
Either thyristor can be turned ON if triggered. By pressing the switch S1 let SCR1
be turned ON. Then vL1=vs and LED1 glows. Simultaneously, C gets charged
through LED2 and SCR1. When steady state is reached, vc =vs and v2 = vs.
SCR2 is ready to turn ON if triggered. To turn ON SCR1, SCR2 is turned ON.
vc = vs gets applied to SCR1 which turns OFF by voltage commutation. Now C
starts charging through LED1 and SCR2. When steady state is again reached,
vc = -vs and v1 = vs and SCR1 is ready to turn on if triggered.
6.3. PROCEDURE:
1. With C= 0.01 ìF, turn ON the power supply and trigger the SCR1 by pressing
S1. Observe the glowing of the LED1.
2. Now press S2 and observe the glowing of the LED2.
81
7. CLASS D COMMUTATION:
7.1. CIRCUIT:
+ +
0.1 mF C
VC
0.22 mF
-
IN4007 D
+ 5P4
+ FTO MAIN SCR T1
5m H V2 TYN2P4 0.1 mF
AUX SCR T2
V1 S1 30 V DC
- Supply
-
560KW VS
S2
0.1 mF
1W, 10w
560KW
-
2.7 KW,1/2w
LED
Fig- 20.4
7.2. THEORY:Refer to fig: 20.4
Griet
Initially let both the SCRs be OFF. Then v1 = v2 = vs and vc=0. Either thyristor can
be turned ON if triggered. Let the auxillary SCR T2 be turned by pressing S2.
Current flows from supply positive through C, T2 and load. When Vc= Vs, the
current decreases to zero and T2 turns OFF. Now vc= v1 = vs. and v2=0 and the
circuit is ready for operation. The main thyristor T1 is turned ON by pressing S1.
The LED turns ON and stays ON. C, T1, L and D now form a closed loop and vc
changes to -vs, v2 changes to vs. To turn OFF T1 (commutation), S2 is pressed. V1
gets applied between the gate and cathode of T2 and turns it ON. The capacitor is
directly connected across T1 and turns T1 OFF by voltage commutation. T2
continues to conduct till vc = vs, after which T2 turns OFF. The circuit is now
ready for another cycle of operation.
7.3. PROCEDURE:
1. With C= 0.1 ìF, turn ON the power supply and trigger the T 2 by pressing
S2. Observe the glowing of the LED1.
2. Now press S2 and observe the LED1.
82
8. CLASS E COMMUTATION:
8.1. CIRCUIT:
+
LED
A
-
5P4 +9 V
FTO, SCR 0.1 mF
30 V
2.7KW,1/2W K
S1 DC
560KW
Supply
E C
B
Bc107
S2
1.5 V
-
Fig- 20.5
8.2. THEORY:Refer to fig:20.5
Griet
Initially when the supply is ON LED glows then SCR is turned ON by pressing S1 ,
then LED is OFF. To turn SCR OFF S2 is momentarily closed. The transistor then
acts as a closed switch between C & E, and applies a reverse voltage of about 9V
to the SCR, which turns OFF by voltage commutation and then LED glows.
8.3. PROCEDURE:
1. Switch ON the power supply, Trigger the SCR by pressing S1 and observe the
glowing of the LED.
2. Press the switch S2 and observe the LED.
9. RESULT:
Different methods of commutation of SCRs are studied.
83
VIVA QUESTIONS
1. What are the various types of thyristors?
2. What is a commutation circuit?
3. What are the conditions for the thyristor to conduct?
4. How can a thyristor be turned off?
5. What is line commutation?
6. What is forced commutation?
7. What is the difference between a thyristor and triac?
8. What is turn off time of thyristor?
9. What is converter?
10. What are the gating characteristics of an IGBT?
11. What are the differences between BJTs & IGBTs?
12. What is a freewheeling diode and what is its purpose?
13. What are the problems of series connected diodes?
14. What is a power diode?
15. What is a ideal diode?
16. Mention some of the applications of the diode?
17. What are the three important regions in current voltage characteristics of a diode?
18. What is reverse recovery time of a diode?
19. What is forward break over voltage, reverse break over voltage, holding current, gate
trigger current of a thyristor?
20. What is intrinsic stand off ratio?
Griet
21. What is the purpose of snubber circuit?
22. What is chopper?
23. Draw the static VI characteristics of a thyristor?
24. Define latching and holding current in thyristor?
25. How many layers and junctions are there in thyristor?
26. Differentiate between thyristor and SCR?
27. Name the different members of a thyristor family?
28. What are the different types of turn on methods?
29. Name different types of commutation?
30. Difference between natural and forced commutation?
31. Why UJT is better than other triggering methods?
32. What are the disadvantages of resistance triggering?
33. Name the devices of thyristor family that are bidirectional?
34. What are the uses of pulse transformer?
35. Difference between pulse transformer and power transformer?
36. How does UJT works?
37. Name the different protective devices used for SCR and their purpose?
38. How do you test SCR?
39. Differentiate between simultaneous triggering and sequential triggering?
40. What care is to be taken while mounting the thyristor in parallel?
41. Differentiate between IGBT and MOSFET?
42. What is the effect of gate current on thyristor characteristics?
43. IGBT imparts the characteristics of two devices. What are they?
44. What is phase angle control? What are the advantages and disadvantages of phase
angle control?
84
45. What are the advantages of semi converter over full converter?
46. Difference between self and mutual commutation?
47. What is the difference between voltage and current commutation?
48. If turn off time of the circuit is less than the turn off time of the component, what is
the disadvantage?
49. When do you say SCR is totally turn off?
50. Do we require reverse biased condition to turn off the thyristor?
51. What is the principle of resonant inverter?
52. What is the importance of dead zone in series inverter?
53. What is the effect of SCR turn off time on inverter frequency?
54. On what principle does parallel inverter works?
55. How can the operating frequency be varied?
56. What is the importance of inductor L?
57. What is finger voltage of an SCR?
58. What is string efficiency of parallel and series inverter?
59. What is thermal run away of SCR?
60. What is the definition of TRC, CLC methods in a SCR?
61. What is the use of converter, inverter, chopper and cyclo converter?
62. How can we get higher frequency of AC output than input frequency?
63. What is the frequency of output in phase control method?
64. Which type of commutation methods are used in Jones chopper?
65. What are the advantages of dual converter compared to a converter?
Griet
66. How can a gate of the thyristor be protected?
67. Why heat sinks are used?
68. What is circulating current? Why do the circulating currents flow in the thyristor?
69. What is extinction angle, conduction angle, firing angle?
70. What are the four quadrants of chopper?
71. What is current fed inverter?
72. What is voltage fed inverter?
73. What are the different modes of operation of a 555 timer? Why they are called so?
74. What is duty cycle?
75. What is Pulse-width-modulation of converter?
76. What is frequency modulation control of converter?
77. What are the performance parameters of converter?
78. What are the performance parameters of inverter?
79. What is sinusoidal PWM?
80. What is the purpose of di/dt protection?
81. What is the purpose of dv/dt protection?
82. What are the design considerations of snubber circuit?
83. What is derating factor of series connected thyristor?
84. What is inversion mode of converters?
85. What is conversion mode of converters?
86. What are the effects of removing the free-wheeling diodes 1- ô semi- converter?
87. Why is the power factor of semi converters is better than full- converters?
88. What are the advantages and disadvantages of cyclo-converter?
89. What are the gate signal requirements of thyristors for voltage controllers for R-L
load?
85
90. What is the main difference between MOSFET and BJT?
91. What is pulse width modulation control of a chopper?
92. What are the advantages and disadvantages of MOSFET?
93. What is the difference between half bridge and full bridge inverters?
94. What are the performance parameters of rectifiers?
95. What are the advantages of 3 -ô rectifiers over 1- ô rectifiers?
96. What are the advantages and disadvantages of AC voltage controllers?
97. What is frequency modulation of chopper?
98. What is the difference between series and parallel inverters?
99. What is the difference between SCR and TRAIC?
100. What are the performance parameters of chopper?
Griet
86

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POWER ELECTRONICS

Department of Electrical and Electronic Engineering

V.Vasantha & P.V.Basavaiah

S. No Name of the Experiment Page No

30V/5A RL1 Rl2 Rl3

1E, 10W 47K, 2W 2.4K, 5W

1. SILICON CONTROLLED RECTIFIERS(thyristors)- 4 Nos.

2. SILICON POWER DIODES- 4 Nos.

3. BULB (R-LOAD) - 1 No.

4. RLE LOAD - 1 No.

1. RL1, RL2, RL3- 3 Nos.

6. AC INPUT (L-N) SOURCE

8. AC VOLTAGES FIXED 15-0-15V

10. 1:1:1 Pulse Transformer No 2503- 2 No's

12. VARIABLE DC SOURCES- 2 No's

13. FIXED AC VOLTAGES- 2 No's

14. VARIABLE RESISTORS- 2 No's

16. Use of potential divider circuit

18. To check the Working of the thyristor

1.1. AIM: To study the V-I characteristics of SCR.

1.2. APPARATUS: 1. SCR (TYN 616) characteristics trainer

Forward Voltage Triggering: When anode to cathode forward voltage is

Fig 2.2 (a)

GATE TRIGGERING AND VGK vs IG :(Table -2)

FOR HOLDING CURRENT:

1.6. TABULAR FORMS:

+Ia Forward conduction

2.1. AIM: To study the V-I characteristics of TRIAC.

2.2. APPARATUS: 1. TRIAC ( BT 136-600) characteristics trainer

2.4. CIRCUIT DIAGRAM:

MT2 (main terminal 2)

Fig 2.5 (a)

V-I CHARACTERISTICS: (Table 3)

1. Initially keep all control pots at minimum position.

TO FIND VG/IG: (Table 4)

FOR LATCHING CURRENT:

FOR HOLDING CURRENT:

(MT2 negative, MT1 positive)

3.1. AIM: To study the V-I characteristics of DIAC.

3.2. APPARATUS: 1. DIAC ( DB-3) characteristics trainer

MT1 (main terminal 1)

Fig 2.7 MT1

3.4. CIRCUIT DIAGRAM: Lamp

1. Keep V2 at minimum position and R2 at maximum position.

3.6. TABULAR FORMS: V I

4.1. AIM: To study the output and transfer characteristics of MOSFET.

4.2. APPARATUS: 1. MOSFET ( IRF 540) characteristics trainer

The output characteristics of MOSFET indicates the variation of drain

4.4. CIRCUIT DIAGRAM:

4.5. PROCEDURE: Refer to fig. 2.11

1. Initially keep all the voltages and potentiometers at minimum positions.

4.6. TABULAR FORMS:

VGS Volts ID mA VGS Volts ID mA

VDS Volts ID mA VDS Volts ID mA

5.1. AIM: To study the output and transfer characteristics of IGBT.

5.2. APPARATUS: 1. IGBT (IRGBC 20S) characteristics trainer

The Insulated Gate Bi-polar Transistor (IGBT) is a voltage controlled device

VI Characteristics: Static VI characteristics of an IGBT show the plot of collector

Refer to fig. 2.15