MODERN PHYSICS LAB

Electrical Characterization of
Semiconductor Devices

D.C.B. Obeysekera
Fall 2013

EXPERIMENT I
Familiarization to the Lock-In Technique
In the first three sections of this experiment a lock-in amplifier is utilized to take the measurements.
Therefore the primary objective of this section is to familiarize ourselves with the techniques of the
lock-in amplifier method.
Theory
A lock-in amplifier (also known as a phase-sensitive detector) is a type of amplifier that can extract
a signal with a known carrier wave from an extremely noisy environment. Basically it can lock out
and separate out a single signal with a specific frequency. In our case the signal in question is a square
wave which is a collection of sine waves at multiple frequencies and related amplitudes and phases. A
2V pk-pk square wave is expressed as
S(t) = 1.273sin(t) + 0.4244 sin(3t) + 0.2546 sin(5t) + 0.1819 sin(7t) + (A)
The Lock-in amplifier will lock in the first harmonic of the composite square wave. Therefore the
signal measured will be the first part of the expression (A) and not 2V pk-pk.
Procedure
The Lock-in amplifier and the function generator were connected as shown in Figure 1. The Lock-in
amplifier source was set to External. A 4V (pk-pk) signal was applied (Since the function generator
gives a 4V pk-pk signal when 2V amplitude is given). The frequency was set to 1 kHz. Using the ref
phase function of the SR850 lock in amplifier the in phase voltage (V x) corresponding to harmonics 1
to 7 were measured.

Figure 1: The circuit for measuring harmonics of a square wave signal. Reference_In is the reference
frequency input and A-1 is the signal in of the lock-in amplifier. Out is the signal output of the
function generator

Observations
The Vx values shown here are r.ms. values as shown below in Table 1.
Harmonic
Vx(rms)(V)
number
1
0.8796
2
0
3
0.2927
4
0
5
0.1753
6
0
7
0.1250
Table 1: The in-phase voltage measurements
Calculations
Since the observed values are r.m.s. values, to convert them into pk-pk we have to multiply by 2.8.
Also since the lock-in indicates the amplitude of each harmonic, according to equation (A) the
maximum amplitude of each harmonic is the theoretical pk-pk value. Since we have a 4V pk-pk signal
it is the Vmax values in the equation multiplied by 2 as calculated below in Table 2.
Harmonic
Vx(pp)
Vx(pp)
Vx(rms)(V)
number
(V)
theoretical (V)
1
0.8796
2.4629
2.5460
2
0
0.0000
0.0000
3
0.2927
0.8196
0.8488
4
0
0.0000
0.0000
5
0.1753
0.4908
0.5092
6
0
0.0000
0.0000
7
0.125
0.3500
0.3638
Table 2: The Experimental and Theoretical calculated values for pk-pk voltages of different
harmonics
Discussion
The theoretical and experimental values are approximately matching. And since a square wave does
not contain any odd numbered harmonics the zero values obtained for those are theoretically correct.
As for the use of coaxial cables, since we are measuring small ac signals that are part of a composite
signal it is important for noise and distortion effects to be isolated. Since a coaxial cable reduces
electromagnetic interference drastically the reason for using it in this experiment is self-evident.

EXPERIMENT II
Capacitance Measurement
In this section we will use the lock-in technique to measure the capacitance and resistance of a device.
In our case this this will be an approximation of an equivalent circuit of a real capacitor.
Theory
The relationship between the apparent capacitance (C m) which we measure experimentally and the
real capacitance (C) of the device is given by:

{( )

Cm
R 2
= 1+ l + 2 C 2 Rl2
C
R

.( B)

Here is the angular frequency of the SINE OUT voltage from the lock in amplifier and Rl is the load
resistance.
If the series resistance Rl to the sample is small so that Rl << R and CRl << 1, that means the
apparent capacitance (Cm) of the measured device approaches the real capacitance of the device (C),
when you consider the equation (B).
Since every capacitor has some leakage current which changes the phase shift, a parallel connection
of a capacitor and resistor gives a good approximation for measuring the real situation. In such a case
there will be an in phase current component (through the resistor) and an out of phase current
component (through the capacitor). In our case we will be measuring the in phase voltages to measure
the capacitance and resistance of the device.
So the in phase and out of phase current components are given by:

I =

I =

V y Vs
Vy
=
C m=C=
(C)
Rl
1
V s Rl
C

Vx Vs
V R
= R= s l ( D)
Rl R
Vx

Where Vs is the source voltage (SINE OUT voltage), Vx and Vy are the respective in-phase and outphase voltage components across the load resistor Rl. From equations (C) and (D) the capacitance (C)
and resistance (R) of the device can be calculated.

Figure 2: The circuit for measuring the capacitance of a device. The shielded mixing box combines a
DC signal from AUX OUT 1 and an AC signal from SINE OUT. The contact resistance Rs is
ignored in most cases.
Procedure
The experiment was set up as shown in Figure 2 with Rl at 100 and C set to 0.1F. In the setup a
variable resistance box and capacitance box were used for R and C. For the Lock-in amplifier the
settings were set as follows: Harmonic:1, Ref. Source: Internal, SINE OUT(Vs): 0.01 V, AUX OUT: 1,
AUX OUT voltage: 1 V and SINE OUT frequency: 10 kHz.
By varying the values of R from 1k to 9M on a range suitable for log scale, Vy of the lock in
amplifier was measured. Then frequency was set to 1kHz and the above steps were repeated and
readings were taken.
Then in the system 0.1F was replaced with an unknown capacitor and R was set to 100k. Then
SINE OUT frequency was varied from 100Hz to 100 kHz and Vy was measured. Finally the
capacitance was measured using LCR meter.
Observations
Vs at 10kHz
Vy (103
3
R (10 )
V)
1
1.365
2
1.409
3
1.423
4
1.431
5
1.435
6
1.437
7
1.440
8
1.442
9
1.444
10
1.444

Vs at 1kHz
Vy (103
3
R (10 )
V)
1
-0.281
2
-0.273
3
-0.269
4
-0.267
5
-0.266
6
-0.266
7
-0.265
8
-0.264
9
-0.264
10
-0.264

20
1.449
20
-0.263
30
1.451
30
-0.263
40
1.451
40
-0.262
50
1.451
50
-0.262
60
1.451
60
-0.262
70
1.451
70
-0.262
80
1.452
80
-0.262
90
1.452
90
-0.262
100
1.452
100
-0.262
200
1.452
200
-0.262
300
1.452
300
-0.262
400
1.452
400
-0.262
500
1.452
500
-0.262
600
1.452
600
-0.262
700
1.452
700
-0.262
800
1.452
800
-0.262
900
1.452
900
-0.262
1000
1.452
1000
-0.262
2000
1.452
2000
-0.262
3000
1.452
3000
-0.262
4000
1.452
4000
-0.262
5000
1.452
5000
-0.262
6000
1.452
6000
-0.262
7000
1.452
7000
-0.262
8000
1.452
8000
-0.262
9000
1.452
9000
-0.262
9999
1.452
9999
-0.262
Table 3: The Vy values for different loads at two different frequencies
Calculations
For the calculation the following equation was utilized.

Cm =C=

Vy
(C)
V s Rl

Here = 2f where f = 1kHz and 10 kHz respectively. Vs=0.01V and Rl = 100. Therefore the
equation is converted to

Cm =C=

Vy
2 1000 0.01 100

Cm =C=

Vy
( E)
2000

Vs at 10kHz
R
(103)

C(106
F)

0.2172

0.2242

0.2265

0.2278

0.2284

0.2287

0.2292

0.2295

0.2298

Vs at 1kHz
R
(103
)

C(10-6
F)

0.04472
2

0.04344
9

0.04281
3

0.04249
4

0.04233
5

0.04233
5

0.04217
6

0.04201
7

0.04201
7

10

0.04201
7

10

0.2298

20

0.2306

20

0.04185
8

30

0.2309

30

0.04185
8

40

50

60

70

0.2309

0.2309

0.2309

0.2309

80

0.2311

90

0.2311

100

0.2311

200

300

400

0.2311

0.2311

0.2311

40

0.04169
8

50

0.04169
8

60

0.04169
8

70

0.04169
8

80

0.04169
8

90

0.04169
8

100

0.04169
8

200

0.04169
8

300

0.04169
8

400

0.04169
8

500

0.04169
8

500

0.2311

600

0.2311

600

0.04169
8

700

0.2311

700

0.04169
8

800

900

1000

2000

0.2311

0.2311

0.2311

0.2311

3000

0.2311

4000

0.2311

5000

0.2311

6000

7000

8000

0.2311

0.2311

0.2311

9000

0.2311

9999

0.2311

800

0.04169
8

900

0.04169
8

1000

0.04169
8

2000

0.04169
8

3000

0.04169
8

4000

0.04169
8

5000

0.04169
8

6000

0.04169
8

7000

0.04169
8

8000

0.04169
8

9000

0.04169
8

9999

0.04169
8

Table 4: The calculated apparent capacitance for the readings in table 3

Plotting C vs R for both 10kHz and 1kHz frequencies, we obtain the following graphs.

Graph 1:Graph of C vs. R at 10kHz

Parameter
Value
Error
-----------------------------------------------------------A
0.21773
2.08605E-4
B1
0.02406
6.38268E-4
B2
-0.01562
6.28652E-4
B3
0.0043
2.33238E-4
B4
-4.22703E-4 2.85674E-5
-----------------------------------------------------------R-Square(COD) SD
N
P
-----------------------------------------------------------0.99295
2.34437E-4
37
<0.0001

------------------------------------------------------------

Graph 2: Graph of C vs. R at 1kHz

Parameter
-----------------------------------------------------------A
B1
B2
B3
B4
-----------------------------------------------------------R-Square(COD)
-----------------------------------------------------------0.99474
------------------------------------------------------------

Value

Error

-0.04468
0.00511
-0.00317
8.39628E-4
-8.02436E-5

4.10255E-5
1.25526E-4
1.23635E-4
4.58702E-5
5.61825E-6

SD

4.61059E-5

37

<0.0001

Graph 3: Graph of C vs. R

Discussion:

Calculations
f(Hz)
100
200
300
400
500
600
700
800
900
1000
2000
3000

Vy(mV)
-2.887
-1.809
-1.207
-0.854
-0.614
-0.439
-0.299
-0.186
-0.085
0.002
0.618
1.070

C (10-6
F)
-4.59713
-1.44029
-0.64066
-0.33997
-0.19554
-0.11651
-0.06802
-0.03702
-0.01504
0.000318
0.049204
0.056794

4000
5000
6000
7000
8000
9000
10000
20000
30000
40000
50000
60000
70000
80000
90000
10000
0

1.459
1.796
2.086
2.330
2.532
2.694
2.821
2.938
2.459
2.032
1.712
1.474
1.294
1.152
1.040

0.058081
0.057197
0.055361
0.053003
0.050398
0.047665
0.04492
0.023392
0.013052
0.008089
0.005452
0.003912
0.002944
0.002293
0.00184

0.952

0.001516

Table 5: Capacitance vs. Frequency for unknown capacitor

Graph 4: Graph of C vs. f

As shown from the graph the unknown capacitor exhibits the same behavior as the known capacitor
and its value is around 58 nF according to the graph which is conflict with the measured value from

the LCR meter which is 303 nF. The ratio of R l/R is affecting the capacitance in the following manner.
When the ratio is smaller the capacitance reading is more stable.

EXPERIMENT III
Capacitance Measurement
In this section we will use the lock-in technique to measure the capacitance of a diode and its effective
doping concentration.
Theory
The capacitance of the depletion layer of a p-n junction,

C=

Vy
( F )
V s Rl

Also the effective doping concentration of a diode, Neff can be expressed by the following formula.

1
2
=
( V 0V bias ) (G)
2
C 0 q N eff A2

where

=12.0, 0 is the permittivity of the free space, q is the magnitude of the electron

charge, and the area of the p-n junction, A = 0.08mm2.

The equation (2) has the form of y = mx +c where y = 1/C2, x = Vbias and rearranging it in the form
1/C2 = mVbias + c, the slope can be expressed as

m=

2
( H )
0 q N eff A 2

Then from the slope of the graph of 1/C2 vs Vbias, Neff can be calculated.
Procedure:
The diode used for the experiment is 1N4005. The circuit was arranged as shown in the figure 5.
SINE OUT voltage (Vs) was set to 0.004V, frequency to 10 kHz; and Rl was set to 10k.
Vy was measured by varying Vbias (Aux1) from 0.3V TO -10V. C was calculated using the equation (1)
and 1/C2 vs Vbias was plotted. Finally, Neff was calculated using equation (H).

Figure 3: The circuit for measuring the capacitance of a diode. A diode can be considered
as a capacitor and a resistor in parallel. The equivalent circuit is given in expanded view.
Calculations
Vbias
(V)
0.3
0.2
0.1
0.0
-1.0
-1.5
-2.0
-2.5
-3.0
-3.5
-4.0
-4.5
-5.0
-5.5
-6.0

Vy(m
V)
0.016
3
0.045
2
0.042
5
0.037
8
0.023
4
0.021
0
0.019
4
0.018
2
0.017
2
0.016
5
0.015
8
0.015
3
0.014
7
0.014
4
0.013

1/C2 (1022
F-2)
2.37500244
6
0.30886052
2
0.34935053
3
0.44162705
4
1.15241142
5
1.43087165
5
1.67662450
8
1.90500664
2
2.13295835
6
2.31777557
4
2.52769748
4
2.69560596
4
2.92014623
5
3.04308642
3.26595103

-6.5
-7.0
-7.5
-8.0
-8.5
-9.5
-10.0

9
0.013
6
0.013
3
0.013
1
0.012
8
0.012
5
0.012
1
0.011
9

8
3.41162629
8
3.56727005
5
3.67702581
4
3.85140625
4.03849216
4.30991325
7
4.45600169
5

Table 6: 1/C2 vs. Vbias for diode

Graph 4: Graph of 1/C2 vs. Vbias

Graph 5: Graph of 1/C2 vs. Vbias
Parameter
Value
Error
-----------------------------------------------------------A
0.96711 0.14743
B
-0.36437 0.02741
-----------------------------------------------------------R
SD
N
P
------------------------------------------------------------

-0.9478
0.41302 22
<0.0001
-----------------------------------------------------------From equation,

m=

2
0 q N eff A 2
22

m=0.36437 10 F V

Rearranging equation

N eff =

N eff =

2
0 qm A2
2
12

12 8.85 10

19

F m 1.6 10

C ( 0.08 106 m 2 ) 0.36437 1022 F2 V 1

N eff =5.04734 1021 m2

Discussion
The forward bias voltage should be kept less than 0.3V, because at values greater than V bias = 0.3V the
diode is past the barrier voltage limit and carrier concentration is difficult to measure with the increase
in current. How ever since in reverse bias the current is very low if you do not exceed the breakdown
therefore there is no such problem.
EXPERIMENT IV
In this section the I-V characteristics of a diode were observed.
Theory
To measure the behavior of a semiconductor device one of the important characteristics one must
study is its I-V characteristic. Since the diode is a non linear device the curve can impart valuable
information about the diodes properties.
Here, we simply connect the sample and a load resistor in series with a voltage source. In our case the
source will provide a triangular waveform. The voltages across the entire circuit and the load resistor
are then connected to the x and y inputs of the oscilloscope respectively. From the voltage drop across
the load resistor and the known value of the load resistor we can determine the current at a given bias
from

I=

V load
(I )
Rload

The bias voltage,

V bias =V applied V load .(J )

Figure 4: The circuit used to demonstrate I-V characteristics using an oscilloscope

In making this measurement the choice of load resistors is very important. To get accurate
measurements the load resistor should be similar to the sample resistance in the region of interest. In
practice it is often necessary to use several different load resistors to measure the entire range of the IV curve accurately. A second consideration in this method is the speed at which the voltage across the
circuit is varied. If this is done too fast the sample may not be able to respond to the changes and you
will not measure a true steady state I-V. When this occurs you will see two curves appearing on the
oscilloscope, one for each direction of the voltage sweep.

Procedure
The circuit was set up as shown in the figure 4. The 1N4005 diode was used in the circuit. R l was set
to 1 k for the forward bias. The function generator was used as the voltage source and it was set to
the triangular waveform. The I-V characteristics of the diode were observed in the xy mode of the
oscilloscope. The effect on the trace was observed by the input amplitude and frequency.
The AC source was replaced by DC source. By changing the source voltage from 10V to -10V, the
corresponding voltage across the resistor was measured using a voltmeter. The bias voltage across the
diode (Vbias) was calculated using equation (J); and the current through the diode was calculated by
using equation (I). The I-V characteristic curve (I vs V bias) was plotted. Then the 1 k resistor was
replaced by 10 M resistor and the "negative region" of the I-V curve was plotted.
Calculations
Vbias
(V)
0.680
0.680
0.670
0.660
0.657
0.647
0.635

I(103
A)
9.32
8.32
7.33
6.34
5.343
4.353
3.365

0.618
2.382
0.593
1.407
0.572
0.928
0.538
0.462
0.442
0.058
0.000
0
Table 7: I vs. Vbias for positive bias
Vbias
I((106
(V)
A)
-19.2
-1.97
-23.4
-2.44
-27.7
-2.97
-30.1
-3.31
-31.6
-3.56
-32.7
-3.77
-33.5
-3.95
-34.1
-4.11
-34.5
-4.25
-34.8
-4.38
-34.7
-4.47
Table 8: I vs. Vbias for negative bias

Graph 6: Graph of I vs. Vbias

Discussion
Since getting impedance matching with device and load resistor is an integral part in current
measurement, the value of the load resistor should be comparable to the diode resistance. If the value
is too high the resistor will dominate and diode current will not be seen in forward bias. If the value is
too voltage drop across load will be too small to measure.
Additional Comments
In taking the voltage readings while varying frequency, we found that utilizing the Lock in amplifiers
built in frequency sweep function. It was much less time consuming than the manual method.
However one must take into consideration some important factors in the lock in settings. First is to
choose a good time constant so that the reading resolution is reportable. In our case we used 20ms.
Also the sample rate should be comparably high to get a smoother graph. We used 32 Hz. This is a
partial employment of the C-V measurement method utilized in the lab. We were unable to locate a
programmable DC source to utilize the same methodology for I-V measurement.