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EE302 Lab 9 - Common Source Amplifier - v2-1

ECE 302 LAB UT AUSTIN

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0% found this document useful (0 votes)
14 views

EE302 Lab 9 - Common Source Amplifier - v2-1

ECE 302 LAB UT AUSTIN

Uploaded by

sbgthiakos
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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ECE302/302H Lab 9: Common source amplifier

In this lab we will relate MOSFET operation to transfer functions, frequency response and time
and phasor/frequency domain analyses.
We will use a combination of experimental data, LTSPICE, and mathematical analysis (that will
happen in the subsequent lectures and HWs) to understand the following: (i) Operation of a
MOSFET in saturation region and measurement of small signal transconductance; (ii) Small
signal analysis of a Common Source Amp (CS Amp) and measurement of small signal voltage
gain; (iii) Frequency response of a CS amplifier in the range 100 Hz – 10 MHz, including
measurements of voltage gain and phase as functions of frequency supported by LTSPICE
simulations; (iii) A time domain measurement at 200 kHz that will help us relate time and
frequency domain using experimental data combined with later analysis, supported by LTSPICE.
This topic will extend beyond Lab 9 into the lectures/HWs as it is a central part of the course.
Pre-Lab
Students will use LTSPICE to simulate a CS Amp in both time domain and frequency domain.
They will also review calculations of small signal transconductance from current and relating
small signal transconductance to MOSFET parameters.

Fig. 1
Common source amplifier

CS Amplifier: Small signal and high frequency models: In recent lectures, we have studied,
small signal analysis of a CS Amplifier based on a small signal model. The circuit diagram of a
basic CS Amp. is shown in Fig. 1,. We extend the small-signal model to higher frequencies by
including capacitive elements as shown in Fig. 2, and will be discussed in later lectures. In the
high-frequency model, we have a capacitor between gate (G) and source designated Cgs, and a
capacitor between gate and drain (Cgd). We also include a parasitic capacitance of about 700 pF
representing the coaxial cable capacitance (arising from the cable that is used to connect the CS
Amp circuit to the oscilloscope). More detailed high frequency models include a few other
capacitances such as between drain and source. The values of Cgs and Cgd (which are in the 10’s
of pF range) are representative of the large MOSFET we will use in the experiment. This
MOSFET can drive amps of current and is much bigger than the MOSFETs in IC’s, which
typically have fF capacitances and less.
Task 1: LT Spice schematic for AC measurements (this includes the frequency range 100 Hz- 10
MHz):
Please set up an LTSPICE schematic of the circuit shown in Fig. 2. The key elements here are the
dependent current source (G1) and the AC voltage source. The rest of the elements are simply
resistors and capacitors which you bring in from the components library and assign appropriate
values to. C1 = Cgs (gate-source capacitance) and C2 = Cgd (gate-drain capacitance). C3 is the
parasitic cable capacitance (from the coax cable that connects circuit to oscilloscope and is set to
200pF) and C3 is the oscilloscope capacitance (which is of order 10-15 pF). R1 is the output
resistance of the function generator, which you may remember from Lab 7 to be 50 Ohms. RL’
(which is RD parallel r0) is set at 4 k (assuming a ~ 20 k value for r0). RD is 5k.
Fig. 2: High Frequency Model of a Common source amplifier

Dependent current source: Bring in a g source from the components library and align it with
the arrow pointing downward. This is a dependent current source. The + terminal on the side
should be at the gate potential (create a label “G” for gate and also a label “S” for the source).
Please G and S labels as shown in the figure. Enter the value of gm of the current source, which
is of order 10 mS or 0.01. gm is the small-signal transconductance.

Voltage source set-up for AC measurements: Set up an AC simulation as shown. Bring in an


independent voltage source and set it up for AC simulation. Click on “none” under functions;
enter 0 for DC value and 1 for AC amplitude and 0 for AC phase.

To run simulation, select AC analysis and program as shown in photo below:


This will run the simulation from 1 kHz to 10 MHz and have 10 points per decade. You should
see the command below on your SPICE schematic near the voltage source. .ac dec 10 1000
10000000

For Task 1, Please attach LTPICE schematic below:

Task 2: LTSPICE AC simulation results:


Please attach plot of magnitude versus frequency and phase angle versus frequency. Plot
frequency on the x-axis using a log scale. For magnitude plot y-axis use a dB scale and a linear
scale for the phase plot y axis. The plots you extract from LTSPICE for magnitude and phase are
configured appropriately. Voltage gain magnitude in dB = 20*log(voltage gain magnitude).
Task 3: Verification of small signal transconductance value: The voltage gain magnitude at low
frequencies (100 Hz-50 kHz) is constant and is equal to gmR’L. Since RL’ ~ RD = 4K, we can
find gm. Please write down the value of gm extracted from voltage gain_100/4mS. Remember to
convert voltage gain from dB (which is what LTSPICE gives you) to magnitude for calculating
gm. Voltage gain magnitude in dB = 20*log(voltage gain magnitude).

Instructions for Lab 9


1. Set up circuit with CC = 10 microF and RL = oscilloscope input resistance (no need to
add any external load resistor initially).
2. Set VDD = 6 V and select RD = 5 k
3. VIN (from function generator) will have a DC level of 0 V and will have a sine wave of
amplitude of 200 mV.
4. Additional external load resistances (RL) are only connected in later experiments. Please
note that r0 is intrinsic to the MOSFET and is ignored except in the final part of the lab.
5. Adjust the voltage source -VSS until ID = 1 mA (you check this by measuring VD, which
must be 1 V. When VD is 1 V, that means 5 V is dropped across the 5 k resistor RD and
therefore1 mA is flowing through both RD and the MOSFET M1 which are in series).
6. -VSS will be approximately -2.3 V
7. gm will be approx. 8-10 mA/V. You will measure this later.
8. Measure the frequency response from 100 Hz up in the following bands as follows:
a. 100 Hz to 100 kHz (in this range, the voltage gain magnitude is approximately
constant). Measure at 3 frequencies per decade (or measure at 100 Hz, 300 Hz, 1
kHz, 3 kHz, 10 kHz, 30 kHz, 100 kHz). Measure the voltage gain and phase at
these frequencies. The voltage gain is defined as the maximum output voltage as
measured by oscilloscope divided by max input voltage (which must be 200 mV).
b. > 200 kHz (in this range, we expect decreasing voltage gain with increasing
frequency). Measure at 200 kHz, 400 kHz, 600 kHz, 800 kHz, 1 MHz, 1.2 MHz,
1.4MHz, 1.6 MHz, 1.8MHz, and 2 MHz. Also 4 MHz, 6 MHz, 8 MHz. At these
frequencies measure both the voltage gain magnitude and the phase from the
oscilloscope.
To measure phase in the oscilloscope, please follow the following procedure:
Click on the ‘Measurement’ button on the top. Hit ‘Add Measurement’. You can scroll and find
‘Phase’ by rotating the knob on the top. Set the source to ‘2 to 1’ or ‘1 to 2’ (gives you the same
result for both). Add the phase measurement by pressing ‘OK Add Measurement’. Click on the
‘Measurement’ button again to deactivate the Add measurement display. You would see phase
shift Φ at the bottom of your screen.
Refer to earlier lab documents including Lab 7 for detailed instructions on how to use
oscilloscope.
The phase angle starts around 170~180° and decreases to 90° as you increase frequency.

9. The range (100 Hz-100 kHz) will have constant voltage gain magnitude of
approximately gmR’L = 40 (which equals 32 dB).

10. Measure the voltage gain at 1 kHz and make sure it is at least 30. Adjust -VSS if needed
so gain is not less than 30, making sure that the FET is in saturation (measure VD; ensure
VD is positive). Measure phase (this should be close to 180 degrees or radians shifted
from input signal; either leading or lagging – they are the same when the phase shift is
180 degrees)

11. High frequency roll-off will start as expected near 100 kHz. Measure the gain and phase
angle at the frequencies listed above, and in Table I below:
Table I
Frequency (Hz) Vin peak-to-peak Vout peak-to-peak Gain Phase angle
100
300
1k
3k
10k
30k
100k
200k
400k
600k
800k
1M
1.2M
1.4M
1.6M
1.8M
2M
4M
6M
8M

12. Measure gain and phase till voltage gain reduces to below 2 (or till 10 MHz, not sure
which will come first).
Check in with your TA. The graded part of the lab ends with completing this Table. This
completed table should be submitted on Gradescope at the end of the lab.
If students have time and interest, they can do the following time-domain measurement,
FET output resistance measurement and FET parameter extraction. This section will not be
graded.

Time Domain measurement (we will study this time-domain response in lectures towards
the end of part 3 of our course):
13. Measure time domain response with 200 kHz square wave of amplitude 200 mV.
14. For time domain measurement, expand time axis of oscilloscope so that full scale is one
period (200 kHz or 5 microseconds). Measure with cursor, the output at 20 points (time
versus voltage) in increments of 250 ns. ( t = 0, 250 ns, 500 ns, ….5000 ns) or take a
clear photo with your phone camera.

15. What time domain measurement should look like:

100 kHz time domain response measurement. You will do a 200 kHz time domain
response measurement which will be slightly different.

Output resistance r0 measurements:


Set the function generator back to 1 kHz (you can use either a square wave or sine wave of
amplitude 200 mV).
16. Accurately measure the output voltage and voltage gain.
17. Add a load resistor of value 2 kOhms and measure voltage gain accurately (it should
reduce)
18. Change load resistance to 500 Ohms and accurately measure the voltage gain again.

You now have voltage gain measurements at 3 values of RL’ (approx. 4 k, approx. 1.3 k, and
approx. 450 Ohms). As discussed in lecture, the voltage gain at low frequencies is given by
gmRL’ where RL’ consists of 3 resistors in parallel: RD, RL and r0. Two of these (RD and RL) are
accurately known. Therefore, two of your voltage gain measurements to extract gm and r0 (which
is typically > 10 kOhms). You can cross-check your gm and r0 values with the third voltage gain
measurement.
The value of r0 is________________
The value of gm is________________
The intrinsic gain, given by gmr0, is____________________ (this is the highest voltage gain the
CS amp can have).

FET parameter calculations:


The gm of the MOSFET is measured from the voltage gain magnitude, which equals gmRL’.
Now, gm also equals:

𝑊
2𝜇 𝐶
𝑔𝑚 = √ 𝐿 𝑛 𝑜𝑥 𝐼𝐷
𝑊
gm and ID are known from the experiment and we can calculate the value of 2𝜇𝑛𝐶𝑜𝑥 𝐿

𝑊 𝑚𝐴
The value of 2𝜇𝑛𝐶𝑜𝑥 𝐿 𝑖𝑠_________________________ 𝑉2

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