IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 24, NO.

1, JANUARY 2009

277

A Versatile Control Scheme for a Dynamic Voltage

Restorer for Power-Quality Improvement
Pedro Roncero-Snchez, Member, IEEE, Enrique Acha, Senior Member, IEEE,
Jose Enrique Ortega-Calderon, Member, IEEE, Vicente Feliu, Senior Member, IEEE, and
Aurelio Garca-Cerrada, Member, IEEE

AbstractThis paper presents a control system based on a repetitive controller to compensate for key power-quality disturbances,
namely voltage sags, harmonic voltages, and voltage imbalances,
using a dynamic voltage restorer (DVR). The control scheme deals
with all three disturbances simultaneously within a bandwidth. The
control structure is quite simple and yet very robust; it contains
a feedforward term to improve the transient response and a feedback term to enable zero error in steady state. The well-developed
graphical facilities available in PSCAD/EMTDC are used to carry
out all modeling aspects of the repetitive controller and test system.
Simulation results show that the control approach performs very
effectively and yields excellent voltage regulation.
Index TermsDynamic voltage restorer (DVR), harmonic distortion, power quality (PQ), repetitive control, voltage sag.

I. INTRODUCTION

HE importance of power quality (PQ) has risen very considerably over the last two decades due to a marked increase
in the number of equipment which is sensitive to adverse PQ environments, the disturbances introduced by nonlinear loads, and
the proliferation of renewable energy sources, among others. At
least 50% of all PQ disturbances are of the voltage quality type,
where the interest is the study of any deviation of the voltage
waveform from its ideal form [1]. The best well-known disturbances are voltage sags and swells, harmonic and interharmonic
voltages, and, for three-phase systems, voltage imbalances.
A voltage sag is normally caused by short-circuit faults in
the power network [2], [3] or by the starting up of induction
motors of large rating [4]. The ensuing adverse consequences
are a reduction in the energy transfers of electric motors and the
disconnection of sensitive equipment and industrial processes
brought to a standstill. A comprehensive description of voltage
sags can be found in [5].
Manuscript received June 05, 2007; revised May 26, 2008. Current version published December 24, 2008. This work was supported in part by the
Castilla-La Mancha Council under Research Project PBI-06-0150, in part by
the Fellowship Program of Caja Castilla-La Mancha, and in part by the Consejo
Nacional de Ciencia y Tecnologa de Mxico and Instituto Tecnolgico y de
Estudios Superiores de Monterrey, Mxico. Paper no. TPWRD-00330-2007.
P. Roncero-Snchez and V. Feliu are with the Department of Electrical, Electronic, Control Engineering and Communications, E.T.S. Ingenieros Industriales, Universidad de Castilla-La Mancha, Ciudad Real 13071, Spain (e-mail:
Pedro.Roncero@uclm.es).
E. Acha and J. E. Ortega-Calderon are with the Department of Electronics and
Electrical Engineering of the University of Glasgow, Glasgow G12 8LT, U.K.
A. Garca-Cerrada is with the Department of Electronics and Control Engineering, Universidad Pontificia Comillas de Madrid, Madrid 28045, Spain.
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TPWRD.2008.2002967

Harmonics are produced by nonlinear equipment, such as

electric arc furnaces, variable speed drives, large concentrations
of arc discharge lamps, and loads which use power electronics.
Harmonic currents generated by a nonlinear device or created
as a result of existing harmonic voltages will exacerbate copper
and iron losses in electrical equipment. In rotating machinery,
they will produce pulsating torques and overheating [6].
Voltage imbalances are normally brought about by unbalanced loads or unbalanced short-circuit faults, thus producing
overheating in synchronous machines and, in some extreme
cases, leading to load shutdowns and equipment failure.
The DVR is essentially a voltage-source converter connected
in series with the ac network via an interfacing transformer, which
was originally conceived to ameliorate voltage sags [7]. However,
as shown in this paper, its range of applicability can be extended
very considerably when provided with a suitable control scheme.
The basic operating principle behind the DVR is the injection of
an inphase series voltage with the incoming supply to the load,
sufficient enough to reestablish the voltage to its presag state. Its
rate of success in combating voltage sags in actual installations
is well documented [8], this being one of the reasons why it continues to attract a great deal of interest in industry and in academic
circles. Research work has been reported on DVR two-level [9]
and multilevel [10] topologies as well as on control and operation. The latter may be divided into several topics.
1) The configuration, whether two-level or multilevel, relates
to the availability, or otherwise, of energy storage [2], the
output filter [11], and the capacity to cancel out unbalanced
voltages in three-phase four-wire systems [12].
2) The voltage-sag detection. Several techniques have been
used to detect the instant of sag appearance, such as measurement of the peak value of the grid voltage. A comprehensive analysis of these techniques can be found in [13].
3) The control strategy. The DVR may be operated to inject
the series voltage according to several criteria, such as
minimum energy exchange with the grid. The three most
popular strategies to compensate voltage sags are [14]:
1) presag compensation. The injected DVR voltage is
calculated to simply compensate the load voltage to its
presag condition; 2) inphase compensation. The DVR
voltage is always in phase with the grid voltage; and 3)
optimal energy compensation. This strategy minimizes
the energy transfer between the energy storage and the
grid during steady-state operation. Although these are
the best well-known control strategies, many efforts are
being made to develop new ones to enable better DVR
utilization, as amply discussed in [15][18].

0885-8977/$25.00 2008 IEEE

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4) The design of the control law. The controller is normally

designed with some specific aims firmly in mind, such as
the kind of disturbances it should ameliorate, the velocity
of time response, error in steady-state, etc. Most of the
published work on DVR uses a simple proportional-integral (PI) control law implemented in a frame of reference
which rotates with the frequency of the grid voltage. This
basic approach is sufficient to enable voltage sag compensation, to warrant zero tracking error for the fundamental component, and to compensate certain kinds of unbalanced conditions. However, this simple control law is
insufficient when dealing with high-performance applications and more complex controllers are required [19], [20].
The former reference adds resonant control filters to the
existing PI control scheme in order to eliminate harmonic
voltages [21]. The main drawback of this structure is that
one filter is required for each harmonic to be eliminated if
the system is unbalanced, and only half that number if the
system is balanced. The latter reference takes the approach
of adding a feedforward loop to the feedback PI controller
in order to improve the control overall performance, taking
into account the time delay of the sampled system and the
DVR output filter constraints.
This paper focuses on the design of a closed-loop control
law for a two-level DVR, based on the so-called repetitive control, aiming at compensating key voltage-quality disturbances,
namely, voltage sags, harmonic voltages, andvoltage imbalances.
Repetitive control was first introduced in [22] to eliminate periodic disturbances and to track periodic reference signals with
zero tracking error. A detailed analysis of various repetitive control configurations is reported in [23]. The repetitive control was
originally applied to eliminate speed fluctuations in electric motors but it has since been adopted in a wide range of power-electronics applications. In [24], a repetitive controller is applied
to obtain an output voltage with low distortion in a constant
voltage, constant frequency three-phase PWM inverter. In [25],
a repetitive controller is used to achieve zero tracking error in
the output current of a three-phase rectifier in order to improve
its power factor. A more recent example is found in [26], where
a repetitive controller is used in a parallel active filter to cancel
out harmonic currents produced by a nonlinear load.
The repetitive controller presented in this paper has a wider
range of applicability; it is used in a DVR system to ameliorate
voltage sags, harmonic voltages, and voltage imbalances within
a bandwidth. Unlike other schemes, which also have a comparable range of applicability, only one controller is needed to
cancel all three disturbances simultaneously. The control structure contains a grid voltage feedforward term to improve the
system transient response, and a closed-loop control which comprises a feedback of the load voltage with the repetitive controller in order to warrant zero tracking error in steady state.
This paper is organized as follows. The DVR model is presented in Section II. The fundamentals of the control system
and the proposed control scheme are studied in Section III. The
modeling of the repetitive controller using the well-developed
graphical facilities available in PSCAD/EMTDC and simulation
results are presented in Section IV. The main conclusions of the
current investigation are drawn in Section V.

IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 24, NO. 1, JANUARY 2009

Fig. 1. System configuration with a DVR.

Fig. 2. Single-phase equivalent circuit for the DVR.

II. MODEL OF THE DVR-CONNECTION SYSTEM

A typical test system, incorporating a DVR, is depicted in Fig.
1. Various kinds of loads are connected at the point of common
coupling (PCC), including a linear load, a nonlinear load, and a
sensitive load. The series connection of the voltage-source converter (VSC) making up the DVR with the ac system is achieved
by means of a coupling transformer whose primary is connected
in series between the mains and the load. Although a passive LC
filter is normally used to obtain a switching-ripple-free DVR
voltage, in this paper, this filter is not considered in order to
fully assess the harmonic cancelling properties of the repetitive
controller.
Fig. 2 shows the equivalent circuit for the DVR, where is
is the line impedance, is the current
the supply voltage,
supplied by the source, which splits at the PCC into a current
injected into the sensitive load and a current injected into other
is the measured voltage at the PCC,
loads . The voltage
is the voltage representing the DVR, which is modeled as an
ideal voltage source. Also, and are the resistance and inductance of the coupling transformer, respectively, and is the
measured voltage across the sensitive load. The sensitive-load
voltage can be obtained as
(1)

RONCERO-SNCHEZ et al.: VERSATILE CONTROL SCHEME FOR A DVR FOR PQ IMPROVEMENT

279

Fig. 3. Closed-loop control scheme.

III. DESIGN OF THE CONTROL SYSTEM

The substitution of (6) into (3)(5) yields

The aim of the control system is to regulate the load voltage in

the presence of various kinds of disturbances. The control structure proposed in this paper is based on the use of a feedforward
term of the voltage at the PCC to obtain a fast transient response,
and a feedback term of the load voltage to ensure zero error in
steady state. The continuous time of the whole control system
represents the controller. If the
is depicted in Fig. 3 where
switching frequency is high enough, the DVR can be modeled
[20]. This
as a linear amplifier with a pure delay
delay is the sum of one-sample-period plus the time delay of the
inverter due to PWM switching. The former applies in cases of
microprocessor-based implementations [27] and the latter can
be taken to be half the switching period [20]. The transfer funcis equal to
is the reference voltage
tion
for the load,
is the control output, whereas
is the
is the load voltage. The
output voltage of the DVR and
and
stand for the grid voltage and the curinputs
rent through the load, respectively. Both inputs are assumed
to be measurable. The model may be extended with ease to
three-phase applications.
The load voltage is
(2)

(7)

(8)

(9)
In order to calculate the frequency response of (7)(9), the
. It should be noticed that the
variable is substituted by
is always zero whenever
is an
term
(e.g.,
, then
integer multiple of the frequency
). Hence, the frequency response shows that
and
for frequenwith
. Therefore, if the
cies
closed-loop system is stable, the error in steady state is zero for
sinusoidal reference inputs or sinusoidal disturbance inputs of
frequency .
is smaller than the grid-voltage period
Since the delay
, the transfer function
can be chosen
as
(10)

where
(3)

With the substitution of (7)(9) and (10) into the load voltage,
(2) yields

(4)
(5)
Repetitive control is a contemporary control technique that may
be used to cancel out, simultaneously, voltage sags, voltage harmonics, and voltage imbalances, characteristics rarely achieved
with other control techniques, such as PI controllers. As a first
approximation, as described in conventional repetitive-control
can be written as
theory [23], the controller

(11)
Unfortunately, the delay is not exactly known and the closedloop system will not be stable if a controller is used with (6) and
.
(10) designed for an estimated
is proTo tackle this problem, a modified controller
posed as
(12)

(6)
where
is a transfer function chosen so that the closed-loop
is the fundamental frequency
stability is always fulfilled and
at the mains.

is the transfer function of a low-pass filter [23],

where
is the estimated value for the DVR delay, with
, and
is a design parameter which is smaller than the period of the
grid voltage
.

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The transfer functions (3)(5) are

(13)
(14)
(15)
.
with
The characteristic equation of the resulting closed-loop
system is

(16)
in (16) must comply
In order to guarantee stability, the term
with the Nyquist criterion: if the number of unstable poles of the
is equal to zero
, then the
open-loop system
number of counterclokwise encirclements of the point
of the term
must be zero
with
.
Since all of the poles of
are stable, which implies that
, then must be zero to guarantee stability, and a suffican be obtained by making
cient condition for

Fig. 4. Test system implemented in PSCAD/EMTDC.

(17)
which is fulfilled if
(18)
Note that condition (18) is independent of the delay value of
in (12).
the controller
A low-pass filter, which is approximated by a constant time
within its passband, can be designed
delay
being the time delay of the filter. For continuous syswith
tems, Bessel filters can be used because they can be approximated by a constant time delay [28], while for discrete time systems, finite-impulse-response (FIR) filters with a linear phase in
their passband can be used [29]. Therefore, the design parameter
can be chosen to cancel out the filter time delay
;
and under such conditions, the closed-loop-system frequency reand
sponse will satisfy
while the approximation of a constant time delay is valid.
Obviously, the bandwidth of the controller will be limited because the magnitude characteristic of the filter will decrease as
frequency increases.

Fig. 5. Three-phase control scheme using the repetitive controller.

TABLE I
PARAMETERS OF THE TEST SYSTEM

IV. STUDY CASE

The power system depicted in Fig. 1 and the controller shown
in Fig. 3 have been implemented in PSCAD/EMTDC. Figs. 4 and
5 show the test system and the control system, respectively. The
test system is comprised of a 400-V, 50-Hz source which feeds
three different loads: 1) a squirrel-cage induction machine, 2) a
nonlinear load which consists of an uncontrolled three-phase rectifier with an inductive-resistive load, and 3) a three-phase sensitive load which consists of astarmadeup of a resistance connected
in series with an inductance in each phase. A two-level DVR is
connected between the PCC and the sensitive load by means of a

20-kVA coupling transformer with a unity turns ratio and a starconnected secondary winding. The voltage of the dc storage device is 650 V. The main parameters are summarized in Table I.

RONCERO-SNCHEZ et al.: VERSATILE CONTROL SCHEME FOR A DVR FOR PQ IMPROVEMENT

Fig. 6. Nyquist diagram of the term

Q(s)e

0 1).

281

Fig. 7. Three-phase rms voltage. (a) Across the sensitive load. (b) At the PCC.

A. Controller Parameters
In order to design the parameters of the control system correctly, a nominal value for the expected time delay
must
be chosen. As the controller has been implemented by using
the continuous systems provided by PSCAD/EMTDC, the time
delay is only due to PWM switching. In this paper, a sinusoidal PWM scheme has been used to generate the switching
signals for the power converter, which consists of a three-branch
three-phase voltage-source inverter.
A controller has been designed for each phase by using a
coordinate system. The
reference frame
three-phase
is perhaps the most popular alternative to control load voltages
when operating under unbalanced conditions. Nevertheless, it
should be recalled that the repetitive controller also guarantees
zero-tracking error at zero frequency; the controller can be implerotating synchronously
mented by using a reference frame
with the fundamental frequency since the fundamental harmonic
transforms into a dc component in this reference frame.
The fundamental frequency was chosen as being equal to
50 Hz, while the switching frequency was set at 6.45 kHz in
which
order to obtain a frequency-modulation (FM) index
was large enough and an odd integer multiple of 3
(see [30] for more details). Hence, the estimated time delay was
, with
being the switching frechosen to be
quency. The parameter was set at
.
has been designed whose
A second-order Bessel filter
cutoff frequency is 5 kHz. The filter has a linear phase lag in
its passband, which is equivalent to a constant time delay of
551.33 s. The amplitude of the filter begins to decrease at approximately 1 kHz (about 20 times the fundamental frequency).
Fig. 6 shows the Nyquist diagram of the term
where it can be seen that the
number of counterclockwise encirclements of the point
is zero
. Therefore, recalling that the number of
is
, the
unstable poles of the open-loop system
closed-loop system is stable.
B. Simulation Results
The scenario of the simulation is the one depicted in Fig. 4
where the simulation has been carried out as follows: the nonlinear load and the DVR are connected at
0 s. A two-phase
short-circuit fault is applied at the PCC from
0.2 s to

Fig. 8. Line-to-line voltage. (a) At the PCC. (b) Across the sensitive load. Corresponding to the interval (s): 0
0 2.

t< :

0.28 s via a fault resistance of 0.2 . This short circuit causes a

40% voltage sag in the two affected phases with respect to their
0.4 s
nominal values. The induction machine is connected at
with a constant rotor speed of 0.97 p.u. (the slip has a value of
%), while the nonlinear load is disconnected at
0.65 s.
The total simulation time is 0.8 s.
Fig. 7(a) shows the three-phase rms voltage across the sensitive load, while Fig. 7(b) shows the three-phase rms voltage
at the PCC. Initially, the rms value at the PCC is 385 V and
this falls to 270 V when the two-phase short-circuit fault is applied (note that during the time in which this fault is applied,
the three-phase rms value is not correctly calculated since the
fault causes unbalanced voltages which have been measured by
using the three-phase rms voltmeter block available in PSCAD/
0.4 s,
EMTDC). When the induction motor is connected at
the voltage at the PCC decreases to 330 V, causing a voltage sag
of 17.5% with respect to the nominal value. Finally, when the
0.65 s, the voltage at the
nonlinear load is disconnected at
PCC rises to 370 V. A comparison of Fig. 7(a) and (b) graphically shows that despite the many voltage variations at the PCC,
the DVR is able to provide the sensitive load with the necessary
voltage, maintaining an almost constant voltage level of 400 V.
Fig. 8(a) and (b) shows results only for the case in which the
nonlinear load and the sensitive load are connected. Notice that
only 0.08 s are plotted, although this case lasts for 0.2 s. Fig. 8(a)
: the waveform
shows the line-to-line voltage at the PCC

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IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 24, NO. 1, JANUARY 2009

Fig. 9. Detail of the spectrum of the line-to-line voltage. (a) At the PCC.
(b) Across the sensitive load.

Fig. 11. Sensitive-load line-to-line voltages. (a) v . (b) v . (c) v . Corresponding to the interval (s) 0:2
t < 0:28.

Fig. 10. Line-to-line voltages at the PCC. (a) v

t < 0:28.
Corresponding to the interval (s) 0:2

. (b) v

. (c) v

distortion is due to the harmonic currents drawn by the rectifier, while the total current provided to the sensitive load and
the rectifier causes a voltage drop at the PCC. The Fourier analysis of the line-to-line voltage shows that the rms value at the
fundamental frequency is 385 V (96.25% of the nominal value)
12.52%.
and the total harmonic voltage distortion is
Fig. 8(b) shows the line-to-line voltage across the sensitive load,
whereas Fig. 9(a) and (b) shows the harmonic spectrums of the
line-to-line voltage at the PCC and across the sensitive load,
respectively. The control system guarantees that the DVR not
only counteracts the voltage drop but also cancels out the harmonic voltages caused by the nonlinear load. In this case, the
fundamental harmonic has an rms value of 399.63 V, while the
%. Note that
total harmonic voltage distortion is
this harmonic distortion value is due to the high-frequency harmonics associated with the PWM process.
The results obtained when the two-phase short circuit occurs
are plotted in Figs. 1012. Since the fault causes unbalanced
voltages at the PCC, the three line-to-line voltages have been

plotted in Figs. 10 and 11. From

0.2 s to
0.28 s, the
fault is applied and causes an unbalanced voltage sag, while the
nonlinear load continues to cause harmonic voltage distortion.
The fundamental-harmonic rms values of the line-to-line voltV,
V, and
ages at the PCC are
V, where the superscript
indicates the fundamental harmonic. The total harmonic voltage distortions are
%
% and
%.
Fig. 11 shows the three line-to-line voltages across the sensitive
load: a very fast DVR response is obtained owing to the feedforward term of the controller, and the two-phase short-circuit fault
is hardly noticed in the sensitive-load voltage. Furthermore, the
repetitive term of the controller guarantees zero-tracking error
in steady state. Hence, the control system and the DVR are able
to cancel all three different disturbances simultaneously (the
voltage sags, the unbalanced voltages, and the harmonic voltages). The fundamental-harmonic rms values of the line-to-line
V,
voltage across the sensitive load are
V, and
V, whereas the total harmonic
%
%
voltage distortions are
and
%. There is an increase in the total harmonic distortion value with respect to that obtained in the case
of Fig. 8(b), which is due to the fact that the DVR supplies more
voltage to compensate the short-circuit fault as the voltage sag
is more severe and, therefore, the harmonic voltages caused by
the PWM are larger. The control outputs for the three branches
of the DVR voltage-source inverter are plotted in Fig. 12.
Fig. 13(a) and (b) shows the results when the induction motor
0.4 s. Notice that only 0.12 s are plotted, alis connected at
though this case lasts for 0.25 s. In this case, the induction motor
connection causes a balanced voltage sag at the PCC, while
the nonlinear load continues to generate harmonic voltages. Initially, the fundamental-harmonic rms value of the line-to-line
voltage at the PCC decreases to 330 V (82.5% of the nom0.44 s (see Fig. 7 for more details), and the
inal value) at
steady-state value is 365 V (91.25% of the nominal value). As

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283

TABLE II
FUNDAMENTAL HARMONIC RMS VALUE AND VOLTAGE TOTAL HARMONIC
DISTORTION OF THE LINE-TO-LINE VOLTAGE AT THE PCC AND ACROSS
THE SENSITIVE LOAD FOR DIFFERENT INSTANTS

Fig. 12. Control outputs. (a) u . (b) u . (c) u . Corresponding to the interval
t < 0:28.
(s) 0:2

Table II summarizes the most significant information of the

many simulation results.
V. CONCLUSION

Fig. 13. Line-to-line voltage when the induction motor is connected. (a) At the
PC. (b) Across the sensitive load. Corresponding to the interval (s) 0:4 t <
0:65.

shown in Fig. 13, the DVR once again counteracts the voltage
sag and the low-frequency voltage harmonics, thus protecting
the sensitive load from these disturbances. The total harmonic
distortions for the voltages at the PCC and across the sensitive
load are 8.91% and 3.77%, respectively, while the fundamental
harmonic of the line-to-line voltage across the sensitive load has
an rms value of 400.17 V.
0.65 s, the nonlinear load is disconnected from
At
the system and only the motor and the sensitive load remain
connected. The results obtained show that, as expected, the
% and the
voltage at the PCC is sinusoidal
line-to-line voltage has an rms value of 370 V (92.5% of the
nominal value) due to the voltage drop in the line impedance.
The control system and the DVR once again work properly,
thus compensating the voltage drop in the sensitive load. The
fundamental harmonic of the sensitive-load voltage has an rms
value of 399.78 V and the total harmonic distortion is 3.17%.

The use of dynamic voltage restorers in PQ-related applications is increasing. The most popular application has been on
voltage sags amelioration but other voltage-squality phenomena
may also benefit from its use, provided that more robust control
schemes than the basic PI controller become available. A case
in point is the so called repetitive controller proposed in this
paper, which has a fast transient response and ensures zero error
in steady state for any sinusoidal reference input and for any
sinusoidal disturbance whose frequencies are an integer multiple of the fundamental frequency. To achieve this, the controller has been provided with a feedforward term and feedback
term. The design has been carried out by studying the stability
of the closed-loop system including possible modelling errors,
resulting in a controller which possesses very good transient and
steady-state performances for various kinds of disturbances.
A key feature of this control scheme is its simplicity; only
one controller is required to eliminate three PQ disturbances,
namely, voltage sags, harmonic voltages, and voltage imbalances. The controller can be implemented by using either a
stationary reference frame or a rotating reference frame. In
this paper, the highly developed graphical facilities available in
PSCAD/EMTDC have been used very effectively to carry out
all aspects of the system implementation. Comprehensive simulation results using a simple but realistic test system show that
the repetitive controller and the DVR yield excellent voltage
regulation, thus screening a sensitive load point from upstream
PQ disturbances.
REFERENCES
[1] M. H. J. Bollen, What is power quality?, Elect. Power Syst. Res., vol.
66, no. 1, pp. 514, July 2003.

284

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[2] J. G. Nielsen and F. Blaabjerg, A detailed comparison of system

topologies for dynamic voltage restorers, IEEE Trans. Ind. Appl., vol.
41, no. 5, pp. 12721280, Sep./Oct. 2005.
[3] V. K. Ramachandaramurthy, A. Arulampalam, C. Fitzer, C. Zhan, M.
Barnes, and N. Jenkins, Supervisory control of dynamic voltage restorers, Proc. Inst. Elect. Eng., Gen., Transm. Distrib, vol. 151, no. 4,
pp. 509516, Jul. 2004.
[4] P. T. Nguyen and T. K. Saha, Dynamic voltage restorer against
balanced and unbalanced voltage sags: Modelling and simulation, in
Proc. IEEE Power Eng. Soc. General Meeting, Jun. 2004, vol. 1, pp.
639644, IEEE.
[5] M. H. J. Bollen, Understanding Power Quality Problems: Voltage Sags
and Interruptions.. Piscataway, NJ: IEEE Press, 2000.
[6] G. J. Wakileh, Harmonics in rotating machines, Elect. Power Syst.
Res., vol. 66, no. 1, pp. 3137, Jul. 2003.
[7] N. G. Hingorani, Introducing custom power, IEEE Spectr., vol. 32,
no. 6, pp. 4148, Jun. 1995.
[8] A. Burden, Caledonian paper dvrThe utility perspective, Inst.
Elect. Eng., Half Day Colloq. Dynamic Voltage RestorersReplacing
Those Missing Cycles, pp. 2/12/2, Feb. 1998.
[9] L. Xu, E. Acha, and V. G. Agelidis, A new synchronous frame-based
control strategy for a series voltage and harmonic compensator, in
Proc. IEEE 16th Annu. Applied Power Electronics Conf. Expo., Mar.
2001, vol. 2, pp. 12741280.
[10] O. Anaya-Lara, Digital control of a multilevel npc dynamic voltage
restorer for power quality enhancement, Ph.D. dissertation, Dept.
Electron. Elect. Eng., Faculty of Engineering, University of Glasgow,
Glasgow, U.K., Sep. 2003.
[11] C.-J. Huang, S.-J. Huang, and F.-S. Pai, Design of dynamic voltage
restorer with disturbance-filtering enhancement, IEEE Trans. Power
Electron., vol. 18, no. 5, pp. 12021210, Sep. 2003.
[12] H. Ding, S. Shuangyan, D. Xianzhong, and G. Jun, A novel dynamic
voltage restorer and its unbalanced control strategy based on space
vector pwm, Elect. Power Energy Syst., vol. 24, no. 9, pp. 693699,
Nov. 2002.
[13] C. Fitzer, M. Barnes, and P. Green, Voltage sag detection technique
for a dynamic voltage restorer, IEEE Trans. Ind. Appl., vol. 40, no. 1,
pp. 203212, Jan./Feb. 2004.
[14] J. G. Nielsen, F. Blaabjerg, and N. Mohan, Control strategies for dynamic voltage restorer compensating voltage sags with phase jump, in
Proc. IEEE 16th Annu. Conf. Applied Power Electronics Conf. Expo.,
Mar. 2001, vol. 2, pp. 12671273.
[15] D. M. Vilathgamuwa, A. A. D. R. Perera, and S. S. Choi, Voltage sag
compensation with energy optimized dynamic voltage restorer, IEEE
Trans. Power Del., vol. 18, no. 3, pp. 928936, Jul. 2003.
[16] S. S. Choi, B. H. Li, and D. M. Vilathgamuwa, Dynamic voltage
restoration with minimum energy injection, IEEE Trans. Power Syst.,
vol. 15, no. 1, pp. 5157, Feb. 2000.
[17] M. R. Banaei, S. H. Hosseini, S. Khanmohamadi, and G. B. Gharehpetian, Verification of a new energy control strategy for dynamic
voltage restorer by simulation, Simulation Modelling Practice
Theory, vol. 14, no. 2, pp. 112125, Feb. 2006.
[18] I.-Y. Chung, D.-J. Won, S.-Y. Park, S.-I. Moon, and J.-K. Park, The dc
link energy control method in dynamic voltage restorer system, Elect.
Power Energy Syst., vol. 25, no. 7, pp. 525531, Sep. 2003.
[19] M. J. Newman, D. G. Holmes, J. G. Nielsen, and F. Blaabjerg, A
dynamic voltage restorer (dvr) with selective harmonic compensation
at medium voltage level, IEEE Trans. Ind. Appl., vol. 41, no. 6, pp.
17441753, Nov./Dec. 2005.
[20] H. Kim and S.-K. Sul, Compensation voltage control in dynamic
voltage restorers by use of feed forward and state feedback scheme,
IEEE Trans. Power Electron., vol. 20, no. 5, pp. 11691177, Sep.
2005.
[21] J. G. Nielsen, M. Newman, H. Nielsen, and F. Blaabjerg, Control and
testing of a dynamic voltage restorer (dvr) at medium voltage level,
IEEE Trans. Power Electron., vol. 19, no. 3, pp. 806813, May 2004.
[22] T. Inoue and M. Nakano, High accuracy control of a proton synchrotron magnet power supply, Proc. 8th Int. Fed. Automatic Control,
Triennial World Congr., vol. XX, pp. 216221, 1981.
[23] S. Hara, Y. Yamamoto, T. Omata, and M. Nakano, Repetitive control system: A new type servo system for periodic exogenous signals,
IEEE Trans. Autom. Control, vol. 33, no. 7, pp. 659668, Jul. 1988.
[24] K. Zhou and D. Wang, Digital repetitive learning controller for threephase CVCF PWM inverter, IEEE Trans. Ind. Electron., vol. 48, no.
4, pp. 820830, Aug. 2001.
[25] K. Zhou and D. Wang, Digital repetitive controlled three-phase pwm
rectifier, IEEE Trans. Power Electron., vol. 18, no. 1, pp. 309316,
Jan. 2003.

[26] A. Garca-Cerrada, O. Pinzn-Ardila, V. Feliu-Battle, P. Roncero-Snchez, and P. Garca-Gonzlez, Application of a repetitive

controller for a three-phase active power filter, IEEE Trans. Power
Electron., vol. 22, no. 1, pp. 237246, Jan. 2007.
[27] K. J. strm and B. Wittenmark, Computer-Controlled Systems.
Theory and Design, ser. Prentice-Hall Information and System Science., 3rd ed. Upper Saddle River, NJ: Prentice-Hall, 1997.
[28] P. Horowitz and W. Hill, The Art of Electronics, 2nd ed. Cambridge,
U.K.: Cambridge University Press, 1989.
[29] J. G. Proakis and D. K. Manolakis, Digital Signal Processing. Principles, Algorithms and Applications, 4th ed. Upper Saddle River, NJ:
Prentice-Hall, 2006.
[30] N. Mohan, T. Undeland, and W. Robbins, Power Electronics: Converters, Applications and Design, 3rd ed. New York: Wiley, 2003.

Pedro Roncero-Snchez (M07) received the Electrical Engineering degree

from Universidad Pontificia Comillas, Madrid, Spain, in 1998 and the Ph.D.
degree from Universidad de Castilla-La Mancha, Ciudad Real, Spain, in 2004.
He is an Adjunct Professor in the School of Industrial Engineering, Universidad de Castilla-La Mancha. His research interests include control, power electronics, and its applications in electric energy systems as well as dynamic control
of flexible robots.

Enrique Acha (SM02) was born in Mxico. He graduated from Universidad

Michoacana de San Nicols de Hidalgo, Morelia, Michoacn, Mxico, in 1979
and received the Ph.D. degree from the University of Canterbury, Christchurch,
New Zealand, in 1988.
He was a Postdoctoral Fellow at the University of Toronto, Toronto, ON,
Canada, and the University of Durham, Durham, U.K. He is the Professor of
Electrical Power Systems at the University of Glasgow, Glasgow, U.K.
Dr. Acha is an IEEE Power Engineering Society Distinguished Lecturer.

Jose Enrique Ortega-Calderon (M05) was born in Orizaba, Veracruz,

Mexico, in 1962. He received the B.Sc. and M.Sc. degrees in electrical
engineering from Instituto Tecnologico y de Estudios Superiores de Monterrey
(ITESM), Nuevo Leon, Mexico, in 1990 and 2001, respectively, and is currently pursuing the Ph.D. degree in electrical engineering at the University of
Glasgow, Glasgow, U.K.
He was with Telemecanique and Schneider Electric Mexico from 1990 to
1999. In 1999, he held a managing post in the Department of Project Engineering at ITESM and, since 2001, has held a teaching post at ITESM. His research interests include power quality, power electronics, and signal-processing
algorithms for electrical power systems.

Vicente Feliu (SM08) received the M.S. degree (Hons.) in industrial engineering and the Ph.D. degree from the Polytechnical University of Madrid,
Madrid, Spain, in 1979 and 1982, respectively.
He was with the Electrical Engineering Department, Universidad Nacional de
Educacin a Distancia, Madrid, Spain, from 1980 to 1994. He was Full Professor
in 1990 and was Head of the Department from 1991 to 1994. He is with the
School of Industrial Engineering, Universidad de Castilla-La Mancha, Ciudad
Real, Spain, and was a Fulbright Scholar at the Robotics Institute at Carnegie
Mellon University, Pittsburgh, PA, from 1987 to 1989. His research interests
include multivariable and digital control systems, and kinematic and dynamic
control of rigid and flexible robots.
Dr. Feliu is a member of the International Federation of Automatic Control
(IFAC).

Aurelio Garca-Cerrada (M91) received the M.Sc. degree from the Universidad Politcnica de Madrid, Madrid, Spain, in 1986 and the Ph.D. degree from
the University of Birmingham, Birmingham, U.K., in 1991.
Currently, he is a Professor with the Electronics and Control Engineering
Department and a member of the Applied Research Institute (IIT) at the Universidad Pontificia Comillas de Madrid. His research interests include power
systems and power-electronics control and its applications to electric energy
systems.