5-V Low-Drop Fixed Voltage Regulator TLE 4271-2

Features
Output voltage tolerance 2%
Low-drop voltage
Integrated overtemperature protection
Reverse polarity protection
Input voltage up to 42 V P-TO220-7-11
Overvoltage protection up to 65 V ( 400 ms)
Short-circuit proof
Suitable for use in automotive electronics
Wide temperature range
Adjustable reset and watchdog time

Type Ordering Code Package

TLE 4271-2 Q67000-A9446 P-TO220-7-11
P-TO263-7-1
TLE 4271-2 S Q67000-A9448 P-TO220-7-12
TLE 4271-2 G Q67006-A9447 P-TO263-7-1

Functional Description
The TLE 4271-2 is functional and electrical identical to
the TLE 4271.
The device is a 5-V low-drop fixed-voltage regulator.
The maximum input voltage is 42 V (65 V, 400 ms). P-TO220-7-12
Up to an input voltage of 26 V and for an output current
up to 550 mA it regulates the output voltage within a
2 % accuracy. The short circuit protection limits the output current of more than 650 mA.
The IC can be switched off via the inhibit input. An integrated watchdog monitors the
connected controller. The device incorporates overvoltage protection and temperature
protection that disables the circuit at overtemperature.

Data Sheet Rev. 2.4 1 2001-04-04

 TLE 4271-2

P-TO220-7-11 P-TO220-7-12 P-TO263-7-1

1 7

RO D Q
1 7 1 7 INH GND WI
AEP01938

RO D Q RO D Q
INH GND WI INH GND WI
AEP01939 AEP02017

Figure 1 Pin Configuration (top view)

Pin Definitions and Functions

Pin Symbol Function
1 I Input; block to ground directly on the IC with ceramic capacitor.
2 INH Inhibit
3 RO Reset Output; the open collector output is connected to the 5 V output
via an integrated resistor of 30 k.
4 GND Ground
5 D Reset Delay; connect a capacitor to ground for delay time adjustment.
6 WI Watchdog Input
7 Q 5-V Output; block to ground with 22 F capacitor, ESR < 3 .

Data Sheet Rev. 2.4 2 2001-04-04

 TLE 4271-2

Circuit Description
The control amplifier compares a reference voltage, which is kept highly accurate by
resistance adjustment, to a voltage that is proportional to the output voltage and drives
the base of a series transistor via a buffer. Saturation control as a function of the load
current prevents any over-saturation of the power element.
The reset output RO is in high-state if the voltage on the delay capacitor CD is greater or
equal VUD. The delay capacitor CD is charged with the current ID for output voltages
greater than the reset threshold VRT. If the output voltage gets lower than VRT (reset
condition) a fast discharge of the delay capacitor CD sets in and as soon as VD gets lower
than VLD the reset output RO is set to low-level.
The time for the delay capacitor charge from VUD to VLD is the reset delay time tD.
When the voltage on the delay capacitor has reached VUD and reset was set to high, the
watchdog circuit is enabled and discharges CD with the constant current IDWD. If there is
no rising edge observed at the watchdog input, CD will be discharge down to VLDW, then
reset output RO will be set to low and CD will be charged again with the current IDWC until
VD reaches VUD and reset will be set high again.
If the watchdog pulse (rising edge at watchdog input WI) occurs during the discharge
period CD is charged again and the reset output stays high. After VD has reached VUD,
the periodical behavior starts again.
Internal protection circuits protect the IC against:
Overload
Overvoltage
Overtemperature
Reverse polarity

Data Sheet Rev. 2.4 3 2001-04-04

 TLE 4271-2

Temperature Saturation
Control and
Sensor
Protection
Circuit

1 7
Q

Control
Amplifier
Buffer 3
Adjustment Bandgap RO
+
Reference
-
Reset
Generator 5
D

6
Watchdog WI

2 4
INH GND AEB01940

Figure 2 Block Diagram

Data Sheet Rev. 2.4 4 2001-04-04

 TLE 4271-2

Absolute Maximum Ratings

Tj = 40 to 150 C
Parameter Symbol Limit Values Unit Notes
min. max.

Input
Voltage VI 42 42 V
Voltage VI 65 V t 400 ms
Current II mA internally limited

Inhibit
Voltage VINH 42 42 V
Voltage VINH 65 V t 400 ms
Current IINH mA internally limited

Reset Output
Voltage VRO 0.3 42 V
Current IRO mA internally limited

Reset Delay
Voltage VD 0.3 7 V
Current ID 5 5 mA

Watchdog
Voltage VW 0.3 7 V
Current IW 5 5 mA

Output
Voltage VQ 1.0 16 V
Current IQ 5 mA internally limited

Ground
Current IGND 0.5 A

Temperatures
Junction temperature Tj 150 C
Storage temperature Tstg 50 150 C

Data Sheet Rev. 2.4 5 2001-04-04

 TLE 4271-2

Operating Range

Parameter Symbol Limit Values Unit Notes

min. max.
Input voltage VI 6 40 V
Junction temperature Tj 40 150 C

Thermal Resistance
Junction ambient Rthja 65 K/W
70 K/W P-TO263
Junction case Rthjc 3 K/W
Zthjc 2 K/W t < 1 ms

Data Sheet Rev. 2.4 6 2001-04-04

 TLE 4271-2

Characteristics
VI = 13.5 V; 40 C Tj = 125 C; VINH > VU,INH (unless otherwise specified)
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.
Output voltage VQ 4.90 5.00 5.10 V 5 mA IQ 550 mA;
6 V VI 26 V
Output voltage VQ 4.90 5.00 5.10 V 26 V VI 36 V;
IQ 300 mA;
Output current IQmax 650 800 mA VQ = 0 V
limiting
Current Iq 6 A VINH = 0 V; IQ = 0 mA
consumption
Iq = II
Current Iq 800 A VINH = 5 V; IQ = 0 mA
consumption
Iq = II
Current Iq 1 1.5 mA IQ = 5 mA
consumption
Iq = II IQ
Current Iq 55 75 mA IQ = 550 mA
consumption
Iq = II IQ
Current Iq 70 90 mA IQ = 550 mA; VI = 5 V
consumption
Iq = II IQ
Drop voltage Vdr 350 700 mV IQ = 550 mA1)
Load regulation VQ 25 50 mV IQ = 5 to 550 mA;
VI = 6 V
Supply voltage VQ 12 25 mV VI = 6 to 26 V
regulation IQ = 5 mA
Power supply PSRR 54 dB fr = 100 Hz;
Ripple rejection Vr = 0.5 VPP
1)
Drop voltage = VI VQ (measured when the output voltage has dropped 100 mV from the nominal value
obtained at 13.5 V input)

Data Sheet Rev. 2.4 7 2001-04-04

 TLE 4271-2

Characteristics (contd)
VI = 13.5 V; 40 C Tj = 125 C; VINH > VU,INH (unless otherwise specified)
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.

Reset Generator
Switching threshold VRT 4.5 4.65 4.8 V
Reset high voltage VROH 4.5 V
Saturation voltage VRO,SAT 60 mV Rintern = 30 k;
1.0 V VQ 4.5 V
Saturation voltage VRO,SAT 200 400 mV IR = 3 mA1);
VQ = 4.4 V
Reset pull-up R 18 30 46 K internally connected
to Q
Lower reset timing VLD 0.2 0.45 0.8 V VQ < VRT
threshold
Charge current ID 8 14 25 A VD = 1.0 V
Upper timing VUD 1.4 1.8 2.3 V
threshold
Delay time tD 8 13 18 ms CD = 100 nF
Reset reaction time tRR 3 s CD = 100 nF

Overvoltage Protection
Turn-off voltage VI, ov 40 44 46 V

Inhibit
Turn-on voltage VU,INH 1.0 2.0 3.5 V VQ = high (> 4.5 V)
Turn-off voltage VL,INH 0.8 1.3 3.3 V VQ = low (< 0.8 V)
Inhibit current IINH 8 12 25 A VINH = 5 V
1)
Test condition not applicable during delay time for power-on reset.

Data Sheet Rev. 2.4 8 2001-04-04

 TLE 4271-2

Characteristics (contd)
VI = 13.5 V; 40 C Tj = 125 C; VINH > VU,INH (unless otherwise specified)
Parameter Symbol Limit Values Unit Test Condition
min. typ. max.

Watchdog
Upper watchdog VUDW 1.4 1.8 2.3 V
switching threshold
Lower watchdog VLDW 0.2 0.45 0.8 V
switching threshold
Discharge current IDWD 1.5 2.7 3.5 A VD = 1 V
Charge current IDWC 8 14 25 A VD = 1 V
Watchdog period tWD,P 40 55 80 ms CD = 100 nF
Watchdog trigger tWI,tr 30 45 66 ms CD = 100 nF
time see diagram
Watchdog pulse VWI 5 V/s from 20% to 80% VQ
slew rate

Data Sheet Rev. 2.4 9 2001-04-04

 TLE 4271-2

1 7
Q

1000 F 470 nF 22 F
TLE 4271-2

2

3 RO
V VQ
5 6 4
V INH D GND
V RO
VD CD V WI

AES01941

Figure 3 Test Circuit

1 7
Input 5 V-Output
470 nF
Input 2
e.g. KL 15 TLE 4271-2
22 F
Reset 3 5
to MC
4 6 100 nF

Watchdog
Signal
from MC AES01942

Figure 4 Circuit

Data Sheet Rev. 2.4 10 2001-04-04

 TLE 4271-2

Application Description
The IC regulates an input voltage in the range of 6 V < VI < 40 V to VQnom = 5.0 V. Up to
26 V it produces a regulated output current of more than 550 mA. Above 26 V the save-
operating-area protection allows operation up to 36 V with a regulated output current of
more than 300 mA. Overvoltage protection limits operation at 42 V. The overvoltage
protection hysteresis restores operation if the input voltage has dropped below 36 V. The
IC can be switched off via the inhibit input, which causes the quiescent current to drop
below 50 A. A reset signal is generated for an output voltage of VQ < 4.5 V. The
watchdog circuit monitors a connected controller. If there is no positive-going edge at the
watchdog input within a fixed time, the reset output is set to low. The delay for power-on
reset and the maximum permitted watchdog-pulse period can be set externally with a
capacitor.

Design Notes for External Components

An input capacitor CI is necessary for compensation of line influences. The resonant
circuit consisting of lead inductance and input capacitance can be damped by a resistor
of approx. 1 in series with CI. An output capacitor CQ is necessary for the stability of
the regulating circuit. Stability is guaranteed at values of CQ 22 F and an ESR of
< 3 .

Reset Circuitry
If the output voltage decreases below 4.5 V, an external capacitor CD on pin D will be
discharged by the reset generator. If the voltage on this capacitor drops below VDRL, a
reset signal is generated on pin RO, i.e. reset output is set low. If the output voltage rises
above the reset threshold, CD will be charged with constant current. After the power-on-
reset time the voltage on the capacitor reaches VDU and the reset output will be set high
again. The value of the power-on-reset time can be set within a wide range depending
of the capacitance of CD.

Reset Timing
The power-on reset delay time is defined by the charging time of an external capacitor
Cd which can be calculated as follows:

tD = CDV/ID

Definitions: CD = delay capacitor

tD = reset delay time
ID = charge current, typical 14 A
V = VUD, typical 1.8 V
VUD = upper delay timing threshold at CD for reset delay time

Data Sheet Rev. 2.4 11 2001-04-04

 TLE 4271-2

The reset reaction time trr is the time it takes the voltage regulator to set the reset out
LOW after the output voltage has dropped below the reset threshold. It is typically 1 s
for delay capacitor of 47 nF. For other values for Cd the reaction time can be estimated
using the following equation:

tRR 20 s/F Cd

VINH t

VU, INH
VL, INH

< t RR t
VQ

VRT

t RR t
VD
dV D
=
dt C D
VUD
VLD
VD, SAT
t
VRO
tD

VRO, SAT
t

Power on Thermal Voltage Drop Undervoltage Secondary Load Shutdown

Reset Shutdown at Input at Output Spike Bounce
AET01985

Figure 5 Time Response

Data Sheet Rev. 2.4 12 2001-04-04

 TLE 4271-2

Watchdog Timing

V W

VQ

t W, tr t WD, P
VD
VUDW

VLDW
VR t WD, L

(V UDW - VLDW ) (V UDW - VLDW ) ( DWC + DWD ) (V UDW - VLDW )

t W, tr = C D ; t WD, P = C ; t WD, L = CD
DWD DWC
.
DWD
D
DWC
AES03078

Figure 6 Time Response, Watchdog Behavior

Data Sheet Rev. 2.4 13 2001-04-04

 TLE 4271-2

Typical Performance Characteristics

Output Voltage VQ versus Output Voltage VQ versus

Temperature Tj Input Voltage VI (VINH = VI)
AED01928 AED01929
5.2 12
V
VQ V
VQ
5.1 10
VI = 13.5 V
5.0 8

4.9 6
R L = 25

4.8 4

4.7 2

4.6 0
-40 0 40 80 120 C 160 0 2 4 6 8 V 10
Tj V

Data Sheet Rev. 2.4 14 2001-04-04

 TLE 4271-2

Output Current Limit IQ versus Output Current IQ versus

Temperature Tj Input Voltage VI
AED01930 AED01931
1200 1.2
mA IQ A
I Q max
1000 1.0

800 0.8

T j = 125 C
600 0.6 25 C

400 0.4

200 0.2

0 0
-40 0 40 80 120 C 160 0 10 20 30 40 V 50
Tj VI

Current Consumption Iq Current Consumption Iq

versus Output Current IQ versus Output Current IQ
AED03076 AED03077
6 80
mA
q mA q
70
5
60
4
50

3 40

V = 13.5 V
30
2 V = 13.5 V
20
1
10

0 0
0 20 40 60 80 mA 120 0 100 200 300 400 mA 600
Q Q

Data Sheet Rev. 2.4 15 2001-04-04

 TLE 4271-2

Current Consumption Iq Drop Voltage Vdr versus

versus Input Voltage VI Output Current IQ
AED01934 AED02755
120 800
Iq mA mV
V Dr 700
100

600
80
500
R L = 10 T j = 125 C
60 400

300
40
R L = 20 200 T j = 25 C
50
20
100

0 0
0 10 20 30 40 V 50 0 200 400 600 mA 1000
VI
Q

Inhibit Current IINH Output Voltage VQ

versus Inhibit Voltage VINH versus Inhibit Voltage VINH
AED01944 AED01945
12 6
A INH, high V
INH VQ
10 5
V = 13.5 V
INH, on
T j = 25 C
8 4

6 3
V = 13.5 V
T j = 25 C
4 2

2 1
INH, off

0 0
0 1 2 3 4 5 V 6 0 1 2 3 4 5 V 6
V INH V INH

Data Sheet Rev. 2.4 16 2001-04-04

 TLE 4271-2

Inhibit Current Consumptions IINH Inhibit Voltages VINH

versus Temperature T versus Temperature Tj
AED01946 AED01947
14 6
A
INH V INH
V
12
5
INH, high
10
4
8
INH, on 3
6
V INH, on
2
4

2 1
V INH, off
INH, off
0 0
-40 0 40 80 120 160 -40 0 40 80 120 C 160
Tj Tj

Switching Voltage VUD and VLDW

versus Temperature T
AED01948
2.4
V
V = 13.5 V
V
2.0

V UD , V UDW
1.6

1.2

0.8

0.4
V LDW

0
-40 0 40 80 120 C 160
Tj

Data Sheet Rev. 2.4 17 2001-04-04

 TLE 4271-2

Charge Current ID, IDWC and Discharge Watchdog Pulse Time Tw

Current IDWD versus Temperature Tj versus Temperature Tj
AED01949 AED01950
16 80
A I D, I DWC ms
I T W 70
14

12 60

10 50

VI = 13.5 V V = 13.5 V
8 VD = 1 V 40
C D = 100 nF

6 30

4 20
I DWD
2 10

0 0
-40 0 40 80 120 C 160 -40 0 40 80 120 C 160
Tj Tj

Data Sheet Rev. 2.4 18 2001-04-04

 TLE 4271-2

Package Outlines

P-TO220-7-11
(Plastic Transistor Single Outline Package)

10 0.2
A
9.9 0.2 4.4
1)
8.5 1.27 0.1

0...0.3
1)
15.65 0.3
12.95

3.7 -0.15
17 0.3

2.8 0.2

9.25 0.2
0.05

1.6 0.3
8.6 0.3
10.2 0.3

3.7 0.3
C
7x 0.6 0.1 0.5 0.1
0...0.15 2.4
6x 1.27 3.9 0.4
0.25 M A C
8.4 0.4
1)
Typical
Metal surface min. X=7.25, Y=12.3
All metal surfaces tin plated, except area of cut.

GPT09083

Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book Package Information. Dimensions in mm

Data Sheet Rev. 2.4 19 2001-04-04

 TLE 4271-2

P-TO220-7-12
(Plastic Transistor Single Outline Package)

10 0.2
A B
9.9 0.2 4.4
1)
8.5 1.27 0.1

0...0.3
1)
15.65 0.3
12.95

3.7 -0.15
17 0.3

2.8 0.2
0.05

9.25 0.2
2.4
110.5
13 0.5

0...0.15 0.5 0.1

7x 0.6 0.1 2.4
6x 1.27
0.25 M A B C

1)
Typical
Metal surface min. X=7.25, Y=12.3
All metal surfaces tin plated, except area of cut.

GPT09084

Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book Package Information. Dimensions in mm

Data Sheet Rev. 2.4 20 2001-04-04

 TLE 4271-2

P-TO263-7-1
(Plastic Transistor Single Outline Package)

4.4
10 0.2
1.27 0.1
0...0.3
A B
8.5 1)
0.05
10.3

7.551) 2.4
9.25 0.2

0.1
(15)

2.7 0.3
4.7 0.5
0...0.15
7x0.6 0.1 0.5 0.1
6x 1.27
0.25 M A B 8 max.
0.1 B
1)
Typical
Metal surface min. X=7.25, Y=6.9
All metal surfaces tin plated, except area of cut.

GPT09114

Sorts of Packing
Package outlines for tubes, trays etc. are contained in
our Data Book Package Information.
SMD = Surface Mounted Device Dimensions in mm

Data Sheet Rev. 2.4 21 2001-04-04

 TLE 4271-2

Data Sheet Rev. 2.4 22 2001-04-04

 TLE 4271-2

Edition 2001-04-04
Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
D-81541 Mnchen, Germany
Infineon Technologies AG 2001.
All Rights Reserved.

Attention please!
The information herein is given to describe
certain components and shall not be consid-
ered as warranted characteristics.
Terms of delivery and rights to technical
change reserved.
We hereby disclaim any and all warranties,
including but not limited to warranties of non-
infringement, regarding circuits, descriptions
and charts stated herein.
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manufacturer.

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Due to technical requirements components
may contain dangerous substances. For in-
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contact your nearest Infineon Technologies
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Infineon Technologies Components may only
be used in life-support devices or systems
with the express written approval of Infineon
Technologies, if a failure of such components
can reasonably be expected to cause the fail-
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affect the safety or effectiveness of that de-
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man body, or to support and/or maintain and
sustain and/or protect human life. If they fail, it
is reasonable to assume that the health of the
user or other persons may be endangered.

Data Sheet Rev. 2.4 23 2001-04-04

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