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Smart Modem

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A Smart Modem for Robust Wireless This need to retransmit corrupted packets is not particularly

onerous for a low-throughput system—one that sends a burst of


Data Transmission Over ISM Bands data from a remote sensor once every few minutes, for example.
(433 MHz, 868 MHz, and 902 MHz) But it does become a problem for applications such as wireless
audio or video transmission, with their higher data rates,
since the latency introduced by ARQ might be unacceptable.
By Patrick Butler [patrick.butler@analog.com]
It also introduces problems in industrial process-control and
Austin Harney [austin.harney@analog.com]
telemetry systems, which must maintain throughput in a noisy
In the last few years, radio-frequency technology has advanced environment without the need for many retransmissions. Such
by leaps and bounds, resulting in a phenomenal number of new longer associated transmission times also increase the overall
wireless applications. Most of these applications—Bluetooth ® ,1 system power consumption.
WLAN 802.11b, 2 and cordless telephones, for example—are A powerful solution to this dilemma lies in the use of forward
appearing alongside the microwave oven in the license-free UHF error-correction (FEC) techniques, able to detect and correct
band at 2.4 GHz. Because of the heavy traffic in the 2.4-GHz errors over a large enough number of bits to compensate for
band, and its associated co-existence issues, interest has increased partial packet loss and ensure service quality. A low-cost, yet
in the ISM (industrial, scientific, medical) UHF bands—available powerful, processor such as the Blackfin ® 4 ADSP-BF5315 can
at the lower frequencies of 868 MHz and 433 MHz in Europe, be used to implement intensive error- correction techniques
and 902 MHz to 928 MHz in the United States. requiring millions of instructions per second (MIPS)—convolutional
Unlike at 2.4 GHz, however, there is no common global standard coding with bit-scrambling and interleaving, for example—to
for the lower-UHF bands; this means that a manufacturer’s system deliver a data rate of over 100 kbps with a transmission error
would have to be adaptable to each region’s regulations. However, rate of less than 10 –6.
this burden has been eased considerably by the introduction of When used in conjunction with the ADF7020 ISM-band transceiver
flexible ISM-band transceivers, such as the ADF7020,3 which IC, with its typical range of several hundred meters (line of sight),
allow operation from 433 MHz to 960 MHz. this approach provides a robust solution for designers wanting to
Unfortunately, one cannot entirely eliminate the problem of replace their current wire-line solutions without compromising
interference and co-existence by simply switching to these lower- quality of service. Thanks to its 400-MIPS (million instruction-per-
UHF bands. As might be expected, there are plenty of legacy second) and 800-MMACS (million multiply-accumulate-per-second)
systems already operating in these bands. In wireless systems, capabilities, the ADSP-BF531 can also accommodate protocols to
data will be corrupted if an interferer collides with the wanted support various wireless configurations and topologies, including
signal—resulting in an insufficient signal-to-noise ratio (SNR) point-to-point, multi-point, and broadcast, as well as sophisticated
at the receiver. A traditional way of dealing with this problem is to encryption and source coding and decoding algorithms such as
use some sort of error-detection technique, e.g., cyclic redundancy Motion JPEG (MJPEG).
checking (CRC). CRC can detect this corruption to a certain extent Figure 1 is a detailed circuit diagram of a wireless digital modem
and trigger the retransmission of erroneous packets (this is usually built around the ADF7020 ISM - band transceiver and its
called automatic repeat request, ARQ), but at the cost of considerable companion controller, the ADSP-BF531. The two main chips share
delay and loss of performance in real-time applications. the same power supply voltage (2.3 V<VCC<3.6 V), and they are

L5 L4
+VDD
100nF 100nF 100nF
D1 100nF 100nF
C10
XTAL2 100nF
22pF 32kHz 22pF 100nF CP1 CP2
RLNA

XTAL1
RSET

VDD EXT VDD RTC RTXI RTXO CLKIN CLKOUT VDD1 RLNA RSET VDD2 VDD3 VDD4 VDD OSC1 OSC2
L2
VRO BF
VDD INT FILTER
C5 L1
100F 10nF ADSP-BF531 FL0 SLE ADF702x RFIN
400MHz FL1 SDATA ISM
52KB SRAM TRANSCEIVER C6
FL4 SREAD
433/868/915MHz RFIN
FL3 SCLK
CONTROLLER/PERIPHERALS

UART L3
RFSO INT/LOCK
FL5 MUXOUT RFINB
C7
FL6 CE
R12
CPOUT
DROPRI C13 R11 C12
Tx/Rx DATA
DTOPRI C11
SPORT1
RCLKO RxCLK
VCO_IN
SPORT0
CVCO ADC_IN
22nF
SPI EXTERNAL BUS VREG1 VREG2 VREG3 VREG4 GND1 GND2 GND5 GND4 VE

C1 C2 C3 C4
C1, C2, C3, C4 = 100nF X7R
SERIAL XTAL1: 10MHz TO 12MHz
EEPROM OPTIONAL 2.5V < VDD TYPICAL < 3.3V
(BOOT) SDRAM

Figure 1. Circuit diagram of the modem.

Analog Dialogue 39-03, March (2005) http://www.analog.com/analogdialogue 1


directly connected for control operations, using the ADSP-BF531 regulations—but it is also possible to operate on a single channel
flags (digital I/Os) and transmit/receive operations, using one of in the US band if the output power is below –1.5 dBm.
the serial synchronous ports (SPORT0).
The high-resolution fractional-N synthesizer also forms part of a
Data will be transmitted to—or received from—the modem, novel automatic frequency-control (AFC) loop, which compensates
either asynchronously over the UART or synchronously with the for incoming frequency errors and allows lower-tolerance, less-
remaining SPORT. expensive, crystals to be used. The block diagram of the ADF7020
is shown in Figure 2. The PLL loop filter components can be
A Versatile Transceiver determined with the help of the ADIsimPLL9 simulation software,
The ADF7020 is a complete monolithic radio transceiver available on the Analog Devices website.
built using 0.25 - m CMOS technology. It is capable of
operating in the 433 - MHz and 868 - MHz European ISM Forward Error-Correction with the Blackfin Processor
bands (ETSI EN300 220-1 standard),6 and the North American While the use of a really high - performance processor in
902-to-928-MHz band—covered by FCC Part 15 regulations.7 conjunction with a radio is common in digital cellular systems, it
Requiring few external components and offering a high degree might at first glance seem inappropriate for meeting the goal of a
of flexibility, it allows the user to configure the part for specific low-cost digital modem. Implementing FEC operations at several
applications. For example, there is a choice among different hundred kilobits per second, however, requires computationally
modulation schemes, such as FSK, GFSK, ASK, and OOK. The intensive digital signal-processing power comparable to that
user can also trade off between sensitivity and selectivity—a useful provided by the Blackfin ADSP-BF531. While a standard 8051 or
approach for systems that have tough linearity requirements. The ARM-based microcontroller, for example, can adequately handle
maximum data rate for the ADF7020 is 200 kbps; its sister part, the user interface, protocol stack, RF transceiver supervision,
the ADF7025,8 has an even greater data rate: 384 kbps. and power sequencing, it would not have the computation
Like most recent ISM-band transceivers, the ADF7020 utilizes a “horsepower” required for the FEC scheme. In addition to
fractional-N phase-locked-loop (PLL) synthesizer, which allows implementing the control functions, the computing power and
the selection of the channels at 433 MHz, plus any channel real-time capabilities of the ADSP-BF531 allow it to: increase
between 868 MHz and 928 MHz, with a resolution better than the effective channel data rate, reduce communication latency,
1 kHz. This frequency agility allows the ADF7020 to be used in compensate for channel propagation variations to maintain link
frequency-hopping systems—as specified in the US FCC Part 15 quality, and ensure communication security.

RSET CREG(1:4) ADC INPUT MUX OUT

RLNA BIAS LDO(1:4) TEMP TEST MUX


OFFSET SENSOR
CORRECTION

LNA
LPF FSK/ASK DATA
RFIN
BB RSSI MUX 7-BIT ADC DEMODULATOR SYNCHRONIZER
RFINB FILTER
GAIN
LPF
OFFSET
CORRECTION CE
AGC
CONTROL RxCLK
Tx/Rx
CONTROL Tx/Rx DATA
FSK MOD GAUSSIAN - XCLK OUT
CONTROL FILTER MODULATOR
AFC
CONTROL INT/LOCK

DIVIDERS/
PA OUT MUXING DIV P N/N+1
SLE

SERIAL SDATA IN
PORT SDATA OUT
VCO
CP SCLK
PFD
RING CLK
DIV R OSC DIV

VCO IN CP OUT XTAL CLK OUT

Figure 2. Functional block diagram of the ADF7020.

2 Analog Dialogue 39-03, March (2005)


DSP_Tx RF TRANSMITTER

INPUT OR BLOCK
JPEG SOURCE PACKETIZATION CONVOLUTIONAL INTERLEAVING MODULATION
CODING CRC ENCODER + (GFSK)
RATE CONTROL

CHANNEL CODING
NOISE DISTURBANCES
TRANSMISSION
FEEDBACK/QoS CHANNEL

DSP_Rx
DATA
OUTPUT OR DE-PACKETIZATION VITERBI DEMODULATION
JPEG SOURCE BLOCK
CRC DECODER DEINTERLEAVER (GFSK)
DECODING SYNC SYNCHRONIZATION

CHANNEL DECODING RF RECEIVER

Figure 3. Signal-processing functions.

Figure 3 illustrates the various functions to be carried out across T his encoded data is t hen passed on to t he A DF7020
the transmission channel, including processing functions handled transmitter section, which does some additional filtering and
for both transmit (Tx) and receive (Rx) operations. The Blackfin Gaussian frequency-shift-keying (GFSK) modulation. GFSK
processor, when sitting on the transmitter side handles both modulation has the advantage of reducing the occupied spectral
data-rate control and data partitioning, so data is transmitted in bandwidth—a helpful operation when seeking to meet adjacent-
packets at a quasi-constant rate. The data packets are processed channel requirements for the European 868-MHz bands.
for forward error-correction (FEC) before they modulate the
carrier’s frequency. This is achieved by adding redundant bits On the receiver side, the ADF7020’s internal preamble-matching
that the receiver will use to detect and correct errors. The bits circuitry helps to fulfill the critical packet-synchronization
added to the incoming packets will, of course, increase the required task. This hardware function permits the recognition or
bandwidth for a given information bit rate. identification of a 12-, 16 -, 20 -, or 24 -bit-long programmable
synchronization word, or a packet preamble, without the
Among the different applicable methods of FEC, convolutional intervention of the ADSP-BF531 core. Upon a valid preamble
coding, while quite simple to implement, gives good protection match, the circuitry asserts the ADF7020 INT/LOCK pin,
against channel Gaussian noise disturbances and helps meet which signals the beginning of a new packet to the serial port
minimum Hamming-distance criteria. A convolutional encoder (RFS0) and triggers the Viterbi decoder. This unique circuitry
is a finite state-machine comprising an L -stage shift register, is somewhat error-tolerant—in a sense, it even allows a valid
N modulo-2 adders, and a multiplexer to convert the output into match for up to three incorrect bits. This reduces the number
a serial bit stream. The connections between the shifter outputs of packets lost due to preamble misses, as the preamble is not
and the adder inputs determine the polynomial code. Using two encoded and is therefore not protected. To further reduce
specifically applicable instructions, the Blackfin core performs all preamble misses, the receiver uses one of the ADSP-BF531
these operations very efficiently. 32-bit timers as a watchdog that generates the expected pulse
At the other end of the transmission channel, the decoder section on RFS0 if the INT/LOCK signal does not show up after a
implements the Viterbi algorithm (hard-input/hard-output). For few symbols. This use of a hardware mechanism to retrieve
maximum likelihood decoding, the Viterbi decoder compares all packet synchronization markers was chosen in order to save
the possible code sequences to the received code vector. The code a lot of processor MIPS—compared to a full implementation
sequence whose Hamming distance from the received sequence with software analysis and tracking.
is the shortest is the good one. For a code like (1/2, 7, 371, 247)
with a constraint length, K = L + 1 of 7, the decoder can correct Real-World Application—Wireless Video Over ISM
up to six consecutive erroneous bits. Depending upon the system As noted earlier, efficient wireless digital-video transmission
requirements, constraint lengths (K) from 5 to 9 must be supported calls for robustness against channel failures. Video codecs
by the ADSP-BF531 in such wireless applications. are excellent candidates for applications with smart, reliable
However, even a convolutional code with a constraint length of 9 Black f i n processor - based w ireless modems. G iven t he
does not protect against burst noise that might hit the transmitted limitation of the ISM wireless channel bandwidth, a relatively
packets over a longer length of time. The use of a complementary high image/video compression ratio is required in order to
protection technique based on temporal diversity is mandatory. deliver the expected frame rate and quality for a given image
Temporal diversity, i.e., spreading the bits or symbols out over time, size without too much latency. Unfortunately, Motion JPEG
improves the performance of a coded communication system in the and other video codecs require a very low transmission- error
presence of multiple paths, fading, and burst noise. It thus reduces rate, typically 10 –6, because the source-coding process removes
the probability of a consecutive number of bits being corrupted. most of the redundant information. This is particularly true
Scrambling and simple block interleaving functions achieve this with some efficient entropy coders, such as Huffman, where
objective without employing more complex corrective codes (like a single erroneous bit makes the original data impossible
Reed-Solomon). Here again, the ADSP-BF531 is helpful with to decode. A required bit- error rate (BER) less than 10 – 6
two specific vector instructions—one that computes the Viterbi places very stringent requirements on the radio, but it can
trellis butterflies and one that reconstructs data for the path-search be achieved by using a channel coding scheme like the one
(trace-back) operation. described above.

Analog Dialogue 39-03, March (2005) 3


CMOS
VIDEO LCD
SENSOR ENCODE BOARD DECODE BOARD DISPLAY

ADSP-BF531 ADSP-BF531
ADF7020 ADF7020
MJPEG MJPEG
ENCODER ISM ISM ENCODER
+ TRANSCEIVER TRANSCEIVER +
FEC FEC

RANGE FROM
BATTERY CELL FEW TO TENS BATTERY CELL
AUDIO OF METERS AUDIO
CODEC POWER POWER CODEC
MANAGEMENT MANAGEMENT

Figure 4. Video transmission system application.

A very low BER does not ensure that all the data packets will be is shown in Figure 4. The overall bill of materials (BOM) for this
entropy-decoded correctly. To improve the image quality, it is application is in the $75 range; and the 2.5” LCD TFT display
necessary to provide some mechanism to conceal part of an image is the most expensive part.
if too many important bits in a packet are corrupted. For this The application code corresponding to the system block
purpose, every packet is segmented and entropy-coded separately. diagram shown at Figure 4 is available from Arbos Ingénierie
After the detection of an erroneous segment or block, its content is (www.arbos-dsp.com),11 a French DSP third-party partner of
discarded. Depending upon the information lost, the dc and first Analog Devices.
two ac coefficients of the discrete cosine transform (DCT) of the
corresponding image block are estimated from the coefficients of CONCLUSION
the neighboring blocks. The final low-pass 2D 3  3 de-blocking The unique combination of the ADF7020 ISM-band transceiver
filter stage, designed to remove DCT blocking artifacts, helps to and the ADSP-BF531 Blackfin processor exhibits excellent radio-
smooth resulting distortion. link performance at a very attractive cost, with demonstrable
The ADSP-BF531 has more than enough power to handle versatility in various ISM digital wireless transmission systems.
both the MJPEG encoding or decoding and the channel FEC Further improvements to this communications model can
processing. No external memory is required for frame sizes up to be anticipated with future members of the ADF702x RF
QCIF (176 pixels by 144 pixels) with a 4:2:2 video format. Larger transceiver family and new TCP/IP friendly Blackfin DSP
frames are possible at the cost of an external SDRAM, which processors, together with additional channel- and source-coding
can also be used to store compressed video. This very low-cost software modules. b
processor can interface directly to CCIR-656-compatible low-cost
REFERENCES—VALID AS OF MARCH 2005
CMOS image sensors or TFT displays via its parallel peripheral 1
http://www.bluetooth.com
interface (see “Blackfin Processor’s Parallel Peripheral Interface 2
http://grouper.ieee.org/groups/802/11/main.html
Simplifies LCD Connection in Portable Multimedia”).10 Standard 3
http://www.analog.com/en/prod/0,2877,ADF7020,00.html
low-cost, low-power PCM audio codecs can be connected to the 4
http://www.analog.com /processors /processors /blackf in/
available serial port, SPORT1, to support digital transmission
index.html
of speech or audio. Or, the processor can provide speech coding 5
http://www.analog.com/en/prod/0,2877,ADSP-BF531,00.html
and decoding with moderate delay by executing a software codec 6
http://www.linxtechnologies.com/documents/EN300220-
similar to the FR-GSM (13 kbps).
1_2000.pdf
With a raw data rate of 200 kbps it is possible to achieve “baseline” 7
http://www.fcc.gov/oet/info/rules
MJPEG transmission over ISM at a rate of about four QCIF 8
http://www.analog.com/en/prod/0,2877,ADF7025,00.html
9
4:2:2 color-frames per second (fps), while leaving 20 kbps http://www.analog.com/en/content/0,2886,770_850_
for speech. This is acceptable for simple low-cost consumer 16127,00.html
10
appliances, such as video baby monitors, video door phones, or http://www.analog.com/library/analogdialogue/archives/39-01/
wireless home-security cameras. The functional block diagram lcd_drive.html
11
of such a point-to-point video transmission system (baby monitor) http://www.arbos-dsp.com

4 Analog Dialogue 39-03, March (2005)

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