Cpci Ea221 o I de en Us

Operating Instructions Edition 01/2005
Digital I/O module

CPCI-EA221
sicomp
INDUSTRIAL MICROCOMPUTERS
Introduction 1
Description 2
Technical Specifications 3
SICOMP Industrial Microcomputers
Replacement Parts /
Accessories 4
Digital I/O module
CPCI-EA221 A
Appendix
ESD Guidelines B
Operating Instructions
List of
Abbreviations / Acronyms C
01/2005
J31069-D2112-U001-A2-7618
Safety Guidelines
This manual contains notices you have to observe in order to ensure your personal safety, as well as to prevent
damage to property. The notices referring to your personal safety are highlighted in the manual by a safety alert
symbol, notices referring only to property damage have no safety alert symbol. These notices shown below are
graded according to the degree of danger.
Danger
indicates that death or severe personal injury will result if proper precautions are not taken.
Warning
indicates that death or severe personal injury may result if proper precautions are not taken.
Caution
with a safety alert symbol, indicates that minor personal injury can result if proper precautions are not taken.
Caution
without a safety alert symbol, indicates that property damage can result if proper precautions are not taken.
Notice
indicates that an unintended result or situation can occur if the corresponding information is not taken into
account.
If more than one degree of danger is present, the warning notice representing the highest degree of danger will
be used. A notice warning of injury to persons with a safety alert symbol may also include a warning relating to
property damage.
Qualified Personnel
The device/system may only be set up and used in conjunction with this documentation. Commissioning and
operation of a device/system may only be performed by qualified personnel. Within the context of the safety notes
in this documentation qualified persons are defined as persons who are authorized to commission, ground and
label devices, systems and circuits in accordance with established safety practices and standards.
Prescribed Usage
Note the following:
Warning
This device may only be used for the applications described in the catalog or the technical description and only in
connection with devices or components from other manufacturers which have been approved or recommended by
Siemens. Correct, reliable operation of the product requires proper transport, storage, positioning and assembly
as well as careful operation and maintenance.
Trademarks
All names identified by ® are registered trademarks of the Siemens AG. The remaining trademarks in this
publication may be trademarks whose use by third parties for their own purposes could violate the rights of the
owner.
Disclaimer of Liability
We have reviewed the contents of this publication to ensure consistency with the hardware and software
described. Since variance cannot be precluded entirely, we cannot guarantee full consistency. However, the
information in this publication is reviewed regularly and any necessary corrections are included in subsequent
editions.
Siemens AG Order No.: J31069-D2112-U001-A2-7618 Copyright © Siemens AG 2005.

Automation and Drives Edition 09/2005 Technical data subject to change
Postfach 48 48
90437 NÜRNBERG
GERMANY
Table of contents
1 Introduction............................................................................................................................................. 1-1
1.1 Contents of this Documentation................................................................................................. 1-1
1.2 History of changes in this documentation .................................................................................. 1-1
1.3 SICOMP documentation sources............................................................................................... 1-1
1.4 Related SICOMP literature ........................................................................................................ 1-1
2 Description.............................................................................................................................................. 2-1
2.1 Overview of CPCI-EA221 .......................................................................................................... 2-1
2.2 CPCI Bus Settings ..................................................................................................................... 2-2
2.3 Outputs....................................................................................................................................... 2-3
2.3.1 Reaction to Overload (e.g. Short-circuit) ................................................................................... 2-3
2.3.2 Cable Break Detection ............................................................................................................... 2-3
2.4 Inputs ......................................................................................................................................... 2-4
2.5 Counter ...................................................................................................................................... 2-4
2.6 Interfaces ................................................................................................................................... 2-5
2.6.1 Signals of the CPCI Bus ............................................................................................................ 2-5
2.6.2 Front LEDs ................................................................................................................................. 2-5
2.6.3 Signals of the Front Socket........................................................................................................ 2-6
2.7 Register...................................................................................................................................... 2-8
2.7.1 Input/Output Register................................................................................................................. 2-8
2.7.2 Input Mode Register................................................................................................................... 2-9
2.7.3 Configuration Register ............................................................................................................. 2-10
2.7.4 Output buffer 0 ......................................................................................................................... 2-11
2.7.5 Output buffer 1 ......................................................................................................................... 2-11
2.7.6 Interrupt Register ..................................................................................................................... 2-11
2.7.7 Interrupt Mask Register............................................................................................................ 2-13
2.7.8 Counter Register...................................................................................................................... 2-13
2.7.9 Counter Buffer.......................................................................................................................... 2-14
2.7.10 LED Register 0......................................................................................................................... 2-14
2.7.11 LED Register 1......................................................................................................................... 2-15
2.8 Reset Response ...................................................................................................................... 2-15
3 Technical Specifications ......................................................................................................................... 3-1
3.1 Digital Outputs............................................................................................................................ 3-1
3.2 Digital Inputs .............................................................................................................................. 3-2
3.3 System Unit (3.3 V Device)........................................................................................................ 3-2
3.4 Environmental conditions........................................................................................................... 3-3
4 Replacement Parts / Accessories ........................................................................................................... 4-1
4.1 Recommended Accessories ...................................................................................................... 4-1
CPCI-EA221
Operating Instructions, 01/2005, J31069-D2112-U001-A2-7618 iii
Table of contents
A Appendix.................................................................................................................................................A-1
A.1 Related references.....................................................................................................................A-1
B ESD Guidelines ......................................................................................................................................B-1
B.1 ESD protective measures ..........................................................................................................B-1
C List of Abbreviations / Acronyms.............................................................................................................C-1
C.1 List of Abbreviations / Acronyms................................................................................................C-1
Index................................................................................................................................................ Index-1
CPCI-EA221
iv Operating Instructions, 01/2005, J31069-D2112-U001-A2-7618
Introduction 1
1.1 Contents of this Documentation
This documentation describes the functions and the prescribed use of the CPCI-EA221
input/output module from the SICOMP product range of industrial microcomputers.
1.2 History of changes in this documentation
Release Status1) Overview of Changes Release Date

A0 First Edition 10/2001
A1 Change to the test insulation 03/2003
voltage
A2 Reorganization of the 01/2005
documentation
1) Corresponds with the 4th block of the drawing number in the footer
1.3 SICOMP documentation sources

You can download the current release version and further SICOMP documentation from the
Internet. If available, those pages also provide the localized versions.
Go to the start address http://www.siemens.de/sicomp-support, then select the "Technical
Documentation" link.
1.4 Related SICOMP literature

See the SICOMP IMC system manual for more information on installing and handling
SICOMP modules.
See also
Related references (Page A-1)
CPCI-EA221
Operating Instructions, 01/2005, J31069-D2112-U001-A2-7618 1-1
Introduction
1.4 Related SICOMP literature
CPCI-EA221
1-2 Operating Instructions, 01/2005, J31069-D2112-U001-A2-7618
Description 2
2.1 Overview of CPCI-EA221
The CPCI-EA221 is a digital I/O module with 16 optoisolated inputs and outputs.
The modules has the following features:
General:
• Module width 20.16 mm (1 EP)
• 50-pin subminiature D socket connector for I/O
• Ventilation by free convection
Outputs:
• Electrical isolation between system and I/O section 500 V DC
• 16 digital outputs (arranged in 2 groups each with 8 outputs)
• Separated by groups, ground and load power supply have common reference potential
• Output characteristics: 24 V L+ switching, 500 mA per output, max. 4 A per group
• Current limiting, overload and short-circuit protection integrated in the driver device (see
/3/)
• Interrupt generated at short-circuit, overload or cable break
• Readback of output value
Inputs:
• Electrical isolation between system and I/O section 500 V DC
• 16 digital inputs (arranged in 2 groups each with 8 inputs)
• Separated by groups, ground connected to common potential
• 24 V/<10 mA per input
• Input filter (3.3 ms) which can be switched off for each input
• Edge or level triggered interrupt generation for all inputs
CPCI-EA221
Description
2.2 CPCI Bus Settings
Counters:
• Two loadable 16-bit decrementers
• Cyclic counting within a selectable window
• Pulse counter
• Start-stop function via inputs
• Interrupt generated at zero crossing (maskable)
• Counter can be cascaded to 32 bits
2.2 CPCI Bus Settings

The module operates as a target on the CPCI bus with the following properties:
• Target device with 33 MHz bus frequency
• Uses 64 bytes of memory addresses with a base address
• 3.3 V device
• Uses an interrupt line (INTA of the CPCI connector)
• Vendor ID:10EEH
• Device ID: 0300H
• SUB vendor ID: 110AH
• SUB device ID: 4018H
The CPCI bus can use 8/16/32-bit access to the module.
CPCI-EA221
Description
2.3 Outputs
2.3 Outputs
The module is equipped with 16 outputs, organized in two groups with eight outputs each.
The outputs are controlled by means of the I/O register.
The outputs can be controlled with certain inputs. Data can be stored in the output buffers
and are transferred to the outputs when the corresponding input signal is set. Four different
data bytes can be stored in the output buffers for each output group. See the chapters
"Configuration register", "Output buffer 0" and "Output buffer 1".
See also
Configuration Register (Page 2-10)
Output buffer 0 (Page 2-11)
Output buffer 1 (Page 2-11)
2.3.1 Reaction to Overload (e.g. Short-circuit)

The digital outputs of the CPCI-EA221 are current limited. An internal logic generates an
interrupt when the current limit is triggered (e.g. by a short-circuit) or when the output drivers
experience thermal overload. The reaction depends on the configured operating mode:
"Continuous Mode"
The affected outputs are pulsed with a high pulse duty factor until the overload ceases. They
are then reactivated.
"Switch-off Mode"
The affected output group is deactivated. The outputs of the group can only be reactivated
when the interrupt register has been read.
The mode can be specified by programming (see section "Configuration Register").
See also
Interrupt Register (Page 2-11)
2.3.2 Cable Break Detection

A low leakage current < 250 µA is generated on reset outputs. The system outputs an
interrupt when the voltage generated at the load resistance by this current exceeds a certain
threshold value. In order to avoid disruptions caused by interrupts, you should always
terminate unused outputs with resistors ≦ 6 kΩ.
CPCI-EA221
Description
2.4 Inputs
2.4 Inputs
Every input can trigger an interrupt. Using the input mode register, each input can be
individually set to determine which state (high or low level) or which event (rising/falling
edge) at the input results in an interrupt.
The bandwidth of the input signals can be limited for each input by a switchable low-pass
filter.
See also
Input Mode Register (Page 2-9)
2.5 Counter
The two 16-bit counters are deincremtental and can be clocked at the 10 MHz rate or by
external pulses. Individual settings can be made for each counter using the configuration
register.
Functions:
• The two counters can count from a preset value to ZERO.
• When ZERO is reached, the counters can be reloaded with a value from the counter
buffer.
• Both counters can counter input pulses. The polarity of the pulse can be set in the input
module register (see section "Input Mode Register").
• Start-Stop Counter: Counter 0 is started with a pulse at input IN0 and can then be
stopped by another pulse at either input IN0 or input IN1. The polarity of the pulse can be
set in the input module register.
• Counter 1 can be cascaded with counter 0, which makes a 32-bit counter available.
• The counters can trigger an interrupt when ZERO is reached.
See also
Input Mode Register (Page 2-9)
Counter Buffer (Page 2-14)
CPCI-EA221
Description
2.6 Interfaces
2.6 Interfaces
2.6.1 Signals of the CPCI Bus

The signal assignments on the 110-pin, angled socket connector (2-mm raster) conforms to
the CPCI specification /1/).
See also
2.6.2 Front LEDs

The front LEDs can be used to display the states of the inputs and outputs.
LED 1:
LED register 0, bits 0 to 15, can be used to select the output to be displayed with the LED.
An OR logic gate can be used to select more than one output.
LED 2:
The LED indicates an error detected from one of the output drivers (e.g. overload, short-
circuit etc.).
LED 3:
LED register 1, bits 0 to 15, can be used to select the input to be displayed with the LED.
The LED lights up with a HIGH level at the selected input. An OR logic gate can be used to
select more than one input..
LED 4:
LED register 1, bits 16 to 31, can be used to select the input to be displayed with the LED.
The LED lights up with a LOW level at the selected input. An OR logic gate can be used to
select more than one input..
CPCI-EA221
Description
2.6 Interfaces
2.6.3 Signals of the Front Socket

The following table shows the assignments of the 50-pin subminiature D socket:

Figure 2-1 Front socket
Connector Signal Connector Signal Connector Signal

1 IN11 18 - 34 IN15
2 IN10 19 GND3 35 IN14
3 IN9 20 GND3 36 IN13
4 IN8 21 -- 37 IN12
5 IN3 22 - 38 IN7
6 IN2 23 GND2 39 IN6
7 IN1 24 GND2 40 IN5
8 IN0 25 - 41 IN4
9 1) 42 1)
10 OUT11 26 VCC1 43 OUT15

11 OUT10 27 GND1 44 OUT14
12 OUT9 28 GND1 45 OUT13
13 OUT8 29 VCC1 46 OUT12
14 OUT3 30 VCC0 47 OUT7
15 OUT2 31 GND0 48 OUT6
16 OUT1 32 GND0 49 OUT5
17 OUT0 33 VCC0 50 OUT4
1) Thesepins are connected internally with one another in the module. This allows you to
design a circuit to detect if a front connector is plugged in, for example.
OUT0 to OUT15 Digital Outputs

IN0 to IN15 Digital Inputs
VCC0, GND0 Load current supply and reference potential for outputs OUT0 to OUT7
(group 0)
VCC1, GND1 Load current supply and reference potential for outputs OUT8 to OUT15
(group 1)
GND2 Reference potential for inputs IN0 to IN7 (group 2)
GND3 Reference potential for inputs IN8 to IN15 (group 3)
CPCI-EA221
Description
2.6 Interfaces
Notice
The inputs of the load current supplies VCC0/GND0 to VCC1/GND1 are not protected
against reverse polarity!
All load current supply and reference potential connections of the two output groups must
always be connected.
CPCI-EA221
Description
2.7 Register
2.7 Register
The module uses base address register 0 of the PCI configuration space. The base address
(BA) of the module is stored there by the BIOS or operating system (see /2/). Each of the
following registers can be read back.
See also
2.7.1 Input/Output Register
Address Data bit

D31 ... D16 D15 ... D0
BA IN5 ... IN0 OUT15 … OUT0
IN0 to IN15 16 inputs

OUT0 to OUT15 16 outputs
Note
The readback of the outputs supplies the previously output values and not the actual level at
the outputs.
CPCI-EA221
Description
2.7 Register
2.7.2 Input Mode Register
Address Data bit

D31 ...D24 D23 …D16 D15 …D8 D7 …D0
BA + 4H PIN15 PIN8 FL-LVL15 FL-LVL8 PIN7 PIN0 FL-LVL7 FL-LVL0
FL-LVL0 Setting determines if an interrupt is triggered by a change in level or edge

to transition at the input signal.
FL-LVL15 0 edge
1 level
PIN15 Active edge or level of the individual input signals
to 0 falling edge (1 => 0) or LOW level
PIN0 1 rising edge (0 => 1) or LOW level
CPCI-EA221
Description
2.7 Register
2.7.3 Configuration Register
Address Data bit

D31 D30 D29 D28 D27 D26 D25 D24
BA + 8H SW Reset SOM CYC1 CYC0 CM11 CM10 CM01 CM00
Address Data bit

D23 ...D20 D19 ... D16 D15 ... D0
BA + 8H EN_IN1_ - TRIG_ ... TRIG_ FILTER ... FILTER 0
STOP EN3 EN0 15
SW Reset 0 normal operation of the module

1 Software reset of the module (see section "Reset Reaction")
SOM 0 Continuous mode (see section "Reaction to Overload")
1 Switch-off mode (see section "Reaction to Overload")
CYCx 0 Counter 0 or 1 stops at ZERO
(x: 0 for counter 0, 1 Counter 0 or 1 reloads a value from the counter buffer at ZERO
1 for counter 1)
CMx1..CMx0 00 Counter off
(x: 0 for counter 0, 01 AUTO start: Counter decrements at 10MHz rate
1 for counter 1) 10 Counter 0 counts pulses at input IN2
Counter 1 counts pulses at input IN3
11 Counter 0: Start-stop function:
Counter is started by a pulse at IN0 and stopped by a pulse at
IN0 or IN1 (see EN_IN1_STOP)
Counter 1: Cascaded with counter 0
EN_IN1_STOP 0 Counter 0 is stopped by input IN0 in the start-stop function
1 Counter 0 is stopped by input IN1 in the start-stop function
TRIP_EN0 to 3 0 Trigger off
1 See trigger buffer 0 or trigger buffer 1
FILTER0 Activate and deactivate input filter
to 0 Activated filter corresponds to a filter time of approx. 3 ms
FILTER15 1 Filter deactivated
See also
Reaction to Overload (e.g. Short-circuit) (Page 2-3)
Counter Buffer (Page 2-14)
Reset Response (Page 2-15)
CPCI-EA221
Description
2.7 Register
2.7.4 Output buffer 0
Address Data bit

D31 ...D24 D23 D16 D15 ...D8 D7 ...D0
BA + 10H BYTE03 BYTE03 BYTE02 BYTE02 BYTE01 BYTE01 BYTE00 BYTE00
BYTE00 When TRIG_EN0 = '1':

to An active level at IN12 switches BYTE00 to output group 0.
BYTE03 An active level at IN13 switches BYTE01 to output group 0.
When TRIG_EN1 = '1':
An active level at IN14 switches BYTE02 to output group 0.
2.7.5 Output buffer 1
Address Data bit

D31 ...D24 D23 D16 D15 ...D8 D7 ...D0
BA + 14H BYTE13 BYTE13 BYTE12 BYTE12 BYTE11 BYTE11 BYTE10 BYTE10
BYTE10 When TRIG_EN2 = '1':

to An active level at IN4 switches BYTE10 to output group 1.
BYTE13 An active level at IN5 switches BYTE11 to output group 1.
When TRIG_EN3 = '1':
2.7.6 Interrupt Register

Each input can trigger an interrupt on the CPCI-EA221. The interrupt is cleared by the next
access to the interrupt register.
After each time it is cleared, the respective interrupt is triggered again as long the overload
or cable break continues.
CPCI-EA221
Description
2.7 Register
Evaluation of the Interrupts

The status of the interrupts can be determined by reading the interrupt register:
Address Data bit

D31 ...D16 ...D10 D9 D8 D7 ...D4 D3 ...D0
BA + 18H IINT15 IINT0 - CNT1 CNT0 STB13 STB10 STB03 STB00
IINT0 to IINT15
IINT0 to IINT15 Input interrupts

CNT0 Counter 0: Interrupt at reaching ZERO
CNT1 Counter 1: Interrupt at reaching ZERO
Output Group 1
Output Group 1
STB13 Error status of outputs 15 and 14
0 No overload at the outputs of a
group
1 Overload or cable break at at
least one output
Output Group 0
Output Group 0
0 No overload at the outputs of a
group
1 Overload or cable break at at
least one output
CPCI-EA221
Description
2.7 Register
2.7.7 Interrupt Mask Register
Address Data bit

D31 ...D16 ...D10 D9 D8 D7 ...D4 D3 D0
BA + 1CH MIINT MIINT - MCNT MCNT MSTB MSTB MSTB MSTB
15 0 1 0 13 10 03 00
MIINT0 Activation of the Input Interrupts

to 0 Interrupt disabled
MIINT15 1 Interrupt enabled
MCNT0 Activation of the Counter Interrupts
or 0 Interrupt disabled
MCNT1 1 Interrupt enabled
MSTB00 Activation of the Output Interrupts
to 0 Interrupt disabled
MSTB13 1 Interrupt enabled
2.7.8 Counter Register
Address Data bit

D31 ... D16 D15 ... D0
BA + 20H Counter1 … Counter1 Counter0 … Counter0
Counter1 Counter status from counter 1

Counter0 Counter status from counter 0
CPCI-EA221
Description
2.7 Register
2.7.9 Counter Buffer
Address Data bit

D31 ... D16 D15 ... D0
BA + 24H CNTB1 … CNTB1 CNTB0 … CNTB0
CNTB1 Buffer for counter1:

With CYC1 = '1', counter 1 is loaded with the value in CNTB1 when
ZERO is reached.
CNTB0 Buffer for counter0:
With CYC1 = '1', counter 0 is loaded with the value in CNTB0 when
ZERO is reached.
2.7.10 LED Register 0
Address Data bit

D31 ... D16 D15 ... D0
BA + 28H - ... - LED1_OUT15 ... LED1_OUT0
LED1_OUT0 0 Output not assigned

to
LED1_OUT15 1 Status of outputs indicated at LED1
CPCI-EA221
Description
2.8 Reset Response
2.7.11 LED Register 1
Address Data bit

D31 ... D16 D15 ... D0
BA + 2CH LED4_IN15_L … LED4_IN0_L LED3_IN15_H … LED3_IN0_H
LED4_IN0_L LED4 lights up when a low level is at the selected input.

to
LED4_IN15_L
LED3_IN0_H LED3 lights up when a high level is at the selected input.
to
LED3_IN15_H
2.8 Reset Response

The module can be reset by a hardware reset via the CPCI bus or by software.
Software Reset
A software reset is triggered by setting bit 31 in the configuration register (address BA + 8H).
As long as a software reset is active:
• All inputs and outputs are deactivated.
• All interrupts are cleared and disabled.
Status after a Reset

• All registers are cleared ("00000000H");
Exception: Counter register and counter buffer are preloaded with "FFFFFFFFH".
• All outputs are inactive (logic "0").
• All interrupts are inactive (high-resistance).
• The output groups operate in "Continuous" mode.
CPCI-EA221
Description
2.8 Reset Response
CPCI-EA221
Technical Specifications 3
3.1 Digital Outputs
Digital Outputs Typical Maximum

Operating voltage VCC0 and VCC1 +24 V +12 to +30 V
(see section "Recommended Accessories")
Continuous current per output - 500 mA
Total current per group (8 outputs) - 4.0 A
Short-circuit current per output 6.5 A, pulsed with -
in continuous mode VCCx = 30 V tdON = typ. 0.4 ms
tdOFF = typ. 4.6 ms
Output leakage current VCCx = 30 V 250 µA per channel
Power consumption per group at VCC- = 30 V -
(all outputs logic "0") 51 mA
Voltage drop at contact gap log. '1': -
500 mA 0.4 V
1000 mA 0.8 V
2000 mA 1.6 V
Operating delay at IOUT = 1000 mA, ohmic Output level -
(command output to signal transition at output) 75% - 100%
VCCx = 12 V closing operation 30 µs - 150 µs
Opening operation 102 µs - 113 µs
Max. load resistance at -
VCCx = 12V: 17 kΩ
VCCx = 24 V: 8 kΩ
VCCx = 30 V: 6 kΩ
to ensure cable break monitoring.
Isolation according to DIN VDE Test insulation voltage
System unit <-> Power unit 0160 500 VDC
Rated insulation voltage
60 V
CPCI-EA221
Technical Specifications
3.2 Digital Inputs
3.2 Digital Inputs
Digital Inputs Typical Maximum

Input voltage area for:
logic "0" 0V -30 to +5 V
logic "1" 24 V +12 to +30 V
Input current per channel at: -30 V -9 mA
+12 V +3 mA +4 mA
+ 24 V +6.5 mA +7.5 mA
+30 V +8 mA +9 mA
Run time from input transition to
IRQ without input filter:
VIN = 12 V rising edge 20 µs
falling edge 27µs
falling edge 34 µs
falling edge 41 µs
with input filter:
VIN = 12 to 30 V rising edge 3.3 ms
falling edge 2.6 ms
Cut-off frequency at VIN = 24 V -
without input filter: 14 kHz
with input filter: 330 Hz
Isolation according to DIN VDE 0160 Test voltage
System unit <-> Power unit Rated insulation voltage 60 V 500 Veff/50 Hz
3.3 System Unit (3.3 V Device)
System unit (3.3 V device) Typical Maximum

Voltage supply (from CPCI bus) +5 V +/-5 %
+3.3 V +/-5 %
Power consumption -
+5 V: 170 mA
(all outputs on and
+3.3 V: 45 mA
Input log. '1' = max. load)
VIO: 15 mA
CPCI-EA221
3.4 Environmental conditions
Operation Transport and storage

Temperature (free convection) 0 to 55° C -40 to 70° C
Relative humidity (RH) 10 to 90% 10 to 90%
Permitted atmospheric pressure 450 to 1100 hPa
Permitted temperature changes 10° C / 30 min. (without condensation) or 0.5 °C / min.
Vibrations according to IEC 68- 10 to 61 Hz: 0.2 mm amplitude 5 to 8 Hz: 7.5 mm amplitude
2-6 Test FC, 20 cycles in 3 axes
per cycle approx. 11 min.
61 to 500 Hz: 2 g 8 to 500 Hz: 1 g
Shock IEC 68-2-27 Test I/O IEC 68-2-29
3 times per axis 1000 shocks each on 6 levels
2 directions per axis 25 g / 6 ms
total of 18 shocks
15 g / 11 ms
CPCI-EA221
CPCI-EA221
Replacement Parts / Accessories 4
4.1 Recommended Accessories
Software as of RMOS3 PCI V1.0

as of WinNT-IMCEA V1.2
Suppressor circuit If the 24 V power cable exceeds the length of 10 m, the supply voltages must
be fed to module via a line-side overload protection device.
Company Dehn + Söhne GmbH + CO.KG (D-92306 Neumarkt), type AD 24
V- (article no. 919253) or a similar device.
The device should be installed according to the mounting instructions.
CPCI-EA221
Replacement Parts / Accessories
4.1 Recommended Accessories
CPCI-EA221
Appendix A
A.1 Related references
/1/ PICMG 2.0 R3.0
CompactPCI Specification
October 1, 1999
/2/ PCI Specification

Rev. 2.2, dated 18.12.1998
/3/ Data sheet BTS 716 G

Infineon Technologies AG
/4/ SICOMP IMC System Manual

Edition 9/98
CPCI-EA221
Operating Instructions, 01/2005, J31069-D2112-U001-A2-7618 A-1
Appendix
A.1 Related references
CPCI-EA221
A-2 Operating Instructions, 01/2005, J31069-D2112-U001-A2-7618
ESD Guidelines B
B.1 ESD protective measures
Caution
ESD protective measures
When handling modules and components carrying this symbol, always observe the ESD
protection directives (Electrostatically Sensitive Devices/).
• Never touch the boards unless necessary work makes this unavoidable.
• When handling the boards, use a conductive and grounded work surface.
• Wear a grounding bracelet.
• Never touch chip pins, component connections or circuit board conductors when handling
the boards.
• Never allow boards or components to touch chargeable objects (plastics).
• Never place components or boards in the vicinity of cathode ray tube units or television
sets (minimum distance: 10 cm).
• Leave the boards in their special packaging until you are ready to use them. Do not take
the boards out of their packaging or touch them when registering them and so on.
• Boards may only be installed or removed when the power is off.
• This warning sign on Siemens products draws your attention to appropriate protective
measures you need to take.
CPCI-EA221
Operating Instructions, 01/2005, J31069-D2112-U001-A2-7618 B-1
ESD Guidelines
B.1 ESD protective measures
CPCI-EA221
B-2 Operating Instructions, 01/2005, J31069-D2112-U001-A2-7618
List of Abbreviations / Acronyms C
C.1 List of Abbreviations / Acronyms
3.3-V device PCI board which is suitable only for 3.3-V signals
CPCI CompactPCI, industrial version of the PCI bus
IDC Connector
Initiator PCI device which triggers a bus cycle
IRQ Interrupt request (from target to initiator)
Sub-D Connector
Target PCI device which is addressed by a bus cycle
CPCI-EA221
Operating Instructions, 01/2005, J31069-D2112-U001-A2-7618 C-1
List of Abbreviations / Acronyms
C.1 List of Abbreviations / Acronyms
CPCI-EA221
C-2 Operating Instructions, 01/2005, J31069-D2112-U001-A2-7618
Index
LED register 1, 2-15
LEDs, 2-5
3
3.3 V device, 3-2
O
Output buffer 0, 2-11
A Output register 1, 2-11
Outputs, 2-1, 3-1
Ambient conditions, 3-3
Continuous mode, 2-3
Overload, 2-3
Short-circuit, 2-3
C
Switch-off mode, 2-3
Configuration register, 2-10 Overview
Continuous mode, 2-3 Counter, 2-2
Counter, 2-2, 2-4 General, 2-1
Counter buffer, 2-14 Inputs, 2-1
Counter register, 2-13 Outputs, 2-1
CPCI bus, 2-5
R
D References, 1-1
Documentation, 1-1 Register, 2-8
Configuration register, 2-10
Counter buffer, 2-14
F Counter register, 2-13
Input mode register, 2-9
Front socket signals, 2-6
Input/output register, 2-8
Interrupt mask register, 2-13
Interrupt register, 2-11
I
Input mode register, 2-9 LED register 1, 2-15
Input/output register, 2-8 Output buffer 0, 2-11
Inputs, 2-1, 2-4, 3-2 Output register 1, 2-11
Interfaces Reset
CPCI bus, 2-5 after a reset, 2-15
Front socket, 2-6 Software reset, 2-15
LEDs, 2-5
Interrupt
Mask register, 2-13 S
Register, 2-11
Settings, 2-2
Switch-off mode, 2-3
System unit (3.3 V device), 3-2
L
CPCI-EA221
Operating Instructions, 01/2005, J31069-D2112-U001-A2-7618 Index-1
Index
CPCI-EA221
Index-2 Operating Instructions, 01/2005, J31069-D2112-U001-A2-7618
Siemens AG
Automation and Drives

Systems Engineering
Industrial PC
Postfach 2355
90713 Fürth
GERMANY
J31069-D2112-U001-A2-7618 www.siemens.com/sicomp

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Operating Instructions Edition 01/2005

Digital I/O module

Siemens AG Order No.: J31069-D2112-U001-A2-7618 Copyright © Siemens AG 2005.

1.2 History of changes in this documentation

Release Status1) Overview of Changes Release Date

1.3 SICOMP documentation sources

1.4 Related SICOMP literature

2.2 CPCI Bus Settings

2.3.1 Reaction to Overload (e.g. Short-circuit)

2.3.2 Cable Break Detection

2.6.1 Signals of the CPCI Bus

2.6.2 Front LEDs

2.6.3 Signals of the Front Socket

Figure 2-1 Front socket

Connector Signal Connector Signal Connector Signal

10 OUT11 26 VCC1 43 OUT15

OUT0 to OUT15 Digital Outputs

2.7.1 Input/Output Register

Address Data bit

IN0 to IN15 16 inputs

2.7.2 Input Mode Register

Address Data bit

FL-LVL0 Setting determines if an interrupt is triggered by a change in level or edge

2.7.3 Configuration Register

Address Data bit

Address Data bit

SW Reset 0 normal operation of the module

2.7.4 Output buffer 0

Address Data bit

BYTE00 When TRIG_EN0 = '1':

2.7.5 Output buffer 1

Address Data bit

BYTE10 When TRIG_EN2 = '1':

2.7.6 Interrupt Register

Evaluation of the Interrupts

Address Data bit

IINT0 to IINT15 Input interrupts

2.7.7 Interrupt Mask Register

Address Data bit

MIINT0 Activation of the Input Interrupts

2.7.8 Counter Register

Address Data bit

Counter1 Counter status from counter 1

2.7.9 Counter Buffer

Address Data bit

CNTB1 Buffer for counter1:

2.7.10 LED Register 0

Address Data bit

LED1_OUT0 0 Output not assigned

2.7.11 LED Register 1

Address Data bit

LED4_IN0_L LED4 lights up when a low level is at the selected input.

2.8 Reset Response

Status after a Reset

Digital Outputs Typical Maximum

3.2 Digital Inputs

Digital Inputs Typical Maximum

3.3 System Unit (3.3 V Device)

System unit (3.3 V device) Typical Maximum