SSCD Mod 1
SSCD Mod 1
SSCD Mod 1
System Software
Semester : VI Course Code : 15CS63
Outcomes
The students should be able to:
1. Student able to Define System Sotware such as Assembler and Macroprocessor.
2. Student able to Define System Sotware such as Loaders and Linkers
3. Student able to lexical analysis and syntax analysisFamiliaize with source file ,object and
executable file structures and libraries
4. Describe the front and back end phases of compiler and their importance to students
MODULE- 1
Introduction to System Software,
Machine Architecture of SIC and SIC/XE.
Assemblers: Basic assembler functions, machine dependent assembler features,
machine independent assembler features, assembler design options.
Macroprocessors: Basic macro processor functions, ->10 Hours
MACHINE ARCHITECTURE
System Software:
System software consists of a variety of programs that support the operation of a computer.
Application software focuses on an application or problem to be solved.
System softwares are the machine dependent softwares that allows the user to focus on the
application or problem to be solved, without bothering about the details of how the
machine works internally.
Examples: Operating system, compiler, assembler, macroprocessor, loader or linker, debugger, text
editor, database management systems, etc.
We discuss here the SIC machine architecture with respect to its Memory and Registers,
Data Formats, Instruction Formats, Addressing Modes, Instruction Set, Input and Output.
Memory:
There are 215 bytes in the computer memory, that is 32,768 bytes. It uses Little Endian format to
store the numbers, 3 consecutive bytes form a word , each location in memory contains 8-bit bytes.
Registers:
There are five registers, each 24 bits in length. Their mnemonic, number and use are given in the
following table.
PC 8 Program counter
Data Formats:
Integers are stored as 24-bit binary numbers. 2’s complement representation is used for negative
values, characters are stored using their 8-bit ASCII codes.No floating-point hardware on the
standard version of SIC.
Instruction Formats:
All machine instructions on the standard version of SIC have the 24-bit format as shown above.
Addressing Modes:
Direct x= 0 TA = address
Instruction Set
Memory
Registers
Additional B, S, T, and F registers are provided by SIC/XE, in addition to the registers of SIC.
B 3 Base register
Instruction Formats :
The new set of instruction formats fro SIC/XE machine architecture are as follows.
Format 2 (2 bytes): first eight bits for operation code, next four for register 1 and following four for
register 2. The numbers for the registers go according to the numbers indicated at the registers
section (ie, register T is replaced by hex 5, F is replaced by hex 6).
Format 3 (3 bytes): First 6 bits contain operation code, next 6 bits contain flags, last 12 bits contain
displacement for the address of the operand. Operation code uses only 6 bits, thus the second hex
digit will be affected by the values of the first two flags (n and i). The flags, in order, are: n, i, x, b, p,
and e. Its functionality is explained in the next section. The last flag e indicates the instruction format
(0 for 3 and 1 for 4).
Format 4 (4 bytes): same as format 3 with an extra 2 hex digits (8 bits) for addresses that require
more than 12 bits to be represented.
Addressing Modes:
1. Direct (x, b, and p all set to 0): operand address goes as it is. n and i are both set to the same
value, either 0 or 1. While in general that value is 1, if set to 0 for format 3 we can assume that the
rest of the flags (x, b, p, and e) are used as a part of the address of the operand, to make the format
compatible to the SIC format.
2. Relative (either b or p equal to 1 and the other one to 0): the address of the operand should be
added to the current value stored at the B register (if b = 1) or to the value stored at the PC register
(if p = 1)
3. Immediate(i = 1, n = 0): The operand value is already enclosed on the instruction (ie. lies on the
last 12/20 bits of the instruction)
4. Indirect(i = 0, n = 1): The operand value points to an address that holds the address for the
operand value.
5. Indexed (x = 1): value to be added to the value stored at the register x to obtain real address of
the operand. This can be combined with any of the previous modes except immediate.
The various flag bits used in the above formats have the following meanings
Bits x,b,p : Used to calculate the target address using relative, direct, and indexed addressing Modes.
Bits i and n: Says, how to use the target address b and p - both set to 0, disp field from format 3
instruction is taken to be the target address.
For a format 4 bits b and p are normally set to 0, 20 bit address is the target address
i=1, n=0 Immediate addressing, TA: TA is used as the operand value, no memory reference
i=0, n=1 Indirect addressing, ((TA)): The word at the TA is fetched. Value of TA is taken as the address
of the operand value
i=0, n=0 or i=1, n=1 Simple addressing, (TA):TA is taken as the address of the operand value
Two new relative addressing modes are available for use with instructions assembled using format 3.
Instruction Set:
SIC/XE provides all of the instructions that are available on the standard version. In addition we
have, Instructions to load and store the new registers LDB, STB, etc, Floating-point arithmetic
operations, ADDF, SUBF, MULF, DIVF, Register move instruction : RMO, Register-to-register
arithmetic operations, ADDR, SUBR, MULR, DIVR and, Supervisor call instruction : SVC.
There are I/O channels that can be used to perform input and output while the CPU is executing
other instructions. Allows overlap of computing and I/O, resulting in more efficient system
operation. The instructions SIO, TIO, and HIO are used to start, test and halt the operation of I/O
channels.
……..
……..
ONE WORD 1
ALPHA RESW 1
BEETA RESW 1
INCR RESW 1
Example 5: To transfer two hundred bytes of data from input device to memory
LDX ZERO
CLOOP TD INDEV
JEQ CLOOP
RD INDEV
STCH RECORD, X
TIX B200
JLT CLOOP
.
.
INDEV BYTE X ‘F5’
RECORD RESB 200
ZERO WORD 0
B200 WORD 200
Assemblers - 1
A Simple Two-Pass Assembler
Main Functions
• It is a copy function that reads some records from a specified input device and then copies
them to a specified output device
– Reads a record from the input device (code F1)
– Copies the record to the output device (code 05)
– Repeats the above steps until encountering EOF.
– Then writes EOF to the output device
– Then call RSUB to return to the caller
–
Data transfer
– A record is a stream of bytes with a null character (0016) at the end.
– If a record is longer than 4096 bytes, only the first 4096 bytes are copied.
– EOF is indicated by a zero-length record. (I.e., a byte stream with only a null
character.
– Because the speed of the input and output devices may be different, a buffer is used
to temporarily store the record
Subroutine call and return
– On line 10, “STL RETADDR” is called to save the return address that is already stored
in register L.
– Otherwise, after calling RD or WR, this COPY cannot return back to its caller.
Assembler Directives
An Assembler’s Job
Header
Col. 1 H
Text
Col.1 T
End
Col.1 E
DC2079 2C1036
E 001000
NOTE: There is no object code corresponding to addresses 1033-2038. This storage is simply
reserved by the loader for use by the program during execution.
Pass 1
– Assign addresses to all statements in the program
– Save the values (addresses) assigned to all labels (including label and variable
names) for use in Pass 2 (deal with forward references)
– Perform some processing of assembler directives (e.g., BYTE, RESW, these can affect
address assignment)
Pass 2
– Assemble instructions (generate opcode and look up addresses)
– Generate data values defined by BYTE, WORD
– Perform processing of assembler directives not done in Pass 1
– Write the object program and the assembly listing
Content
– The mapping between mnemonic and machine code. Also include the instruction
format, available addressing modes, and length information.
Characteristic
– Static table. The content will never change.
Implementation
– Array or hash table. Because the content will never change, we can optimize its
search speed.
In pass 1, OPTAB is used to look up and validate mnemonics in the source program.
In pass 2, OPTAB is used to translate mnemonics to machine instructions.
end( if START)
else
initialize LOCCTR to 0
begin
begin
begin
if found then
else
(if symbol)
if found then
add 3 to LOCCTR
begin
end
else
End {pass 1}
begin
end
begin
begin
if found then
begin
begin
if found then
begin
else
begin
end
begin
end
end
End {Pass 2}
– Program relocation
– Literals
– Symbol-defining statements
– Expressions
– Program blocks
A SIC/XE Program
• Indirect addressing: op @m
• Immediate addressing: op #c
• Register-to-register instructions
– Can save one byte from using format 3 rather than format 4.
– Fetch a value stored in a register is much faster than fetch it from the
memory.
• Let the assembled program starts at address 0 so that later it can be easily moved to
any place in the physical memory.
PC or Base-Relative Modes
– Base-relative: 0~4095
– PC-relative: -2048~2047
• If the displacement cannot fit into 12 bits, format 4 then needs to be used. (E.g., line
15 and 125)
• The difference between PC and base relative addressing modes is that the assembler
knows the value of PC when it tries to use PC-relative mode to assembles an
– Therefore, the programmer must tell the assembler the value of register B.
– This is done through the use of the BASE directive. (line 13)
– Also, the programmer must load the appropriate value into register B by
himself.
– Another BASE directive can appear later, this will tell the assembler to change
its notion of the current value of B.
– NOBASE can also be used to tell the assembler that no more base-relative
addressing mode should be used.
Relocatable Is Desired
• The program in Fig. 2.1 specifies that it must be loaded at address 1000 for correct
execution. This restriction is too inflexible for the loader.
• If the program is loaded at a different address, say 2000, its memory references will
access wrong data! For example:
• Thus, we want to make programs relocatable so that they can be loaded and execute
correctly at any place in the memory.
If we can use a hardware relocation register (MMU), software relocation can be avoided
here. However, when linking multiple object Programs together, software relocation is still
needed.
• Only those instructions that use absolute (direct) addresses to reference symbols.
• When the assembler generate an address for a symbol, the address to be inserted
into the instruction is relative to the start of the program.
• The assembler also produces a modification record, in which the address and length
of the need-to-be-modified address field are stored.
• The loader, when seeing the record, will then add the beginning address of the
loaded program to the address field stored in the record.