CY8CKIT-059

PSoC® 5LP Prototyping Kit Guide

Doc. #: 001-96498 Rev. *G

Cypress Semiconductor
198 Champion Court
San Jose, CA 95134-1709
www.cypress.com
 Copyrights

Copyrights
© Cypress Semiconductor Corporation, 2015-2018. This document is the property of Cypress Semiconductor Corporation
and its subsidiaries, including Spansion LLC (“Cypress”). This document, including any software or firmware included or refer-
enced in this document (“Software”), is owned by Cypress under the intellectual property laws and treaties of the United
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cifically stated in this paragraph, grant any license under its patents, copyrights, trademarks, or other intellectual property
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tive owners.

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide, Doc. #: 001-96498 Rev. *G 2

 Contents

Safety Information 5

1. Introduction 7
1.1 Kit Contents .................................................................................................................7
1.2 PSoC Creator ..............................................................................................................8
1.2.1 PSoC Creator Code Examples ........................................................................9
1.2.2 Kit Code Examples.........................................................................................10
1.2.3 PSoC Creator Help ........................................................................................10
1.2.4 Component Datasheets .................................................................................11
1.3 Getting Started...........................................................................................................11
1.4 Additional Learning Resources..................................................................................11
1.5 Technical Support......................................................................................................12
1.6 Document Conventions .............................................................................................12

2. Software Installation 13
2.1 Before You Begin.......................................................................................................13
2.2 Install Software ..........................................................................................................13
2.3 Uninstall Software......................................................................................................15

3. Kit Operation 16
3.1 Theory of Operation...................................................................................................16
3.2 KitProg .......................................................................................................................17
3.3 Programming and Debugging the PSoC 5LP Target Device.....................................17
3.3.1 Programming using PSoC Creator.................................................................17
3.3.2 Debugging using PSoC Creator.....................................................................19
3.3.3 Programming using PSoC Programmer.........................................................19
3.4 USB-UART Bridge .....................................................................................................19
3.5 USB-I2C Bridge .........................................................................................................19
3.6 Updating KitProg Firmware........................................................................................19

4. Hardware 20
4.1 Board Details .............................................................................................................20
4.2 Hardware Details .......................................................................................................21
4.2.1 Target Board...................................................................................................21
4.2.2 KitProg Board.................................................................................................22
4.2.3 Power Supply System ....................................................................................23
4.2.4 Board Separation (Snapping).........................................................................24
4.2.5 Header Connections ......................................................................................24
4.2.6 User and Passive Inputs ................................................................................28

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 Contents

5. Code Examples 31
5.1 Using the Kit Code Examples ....................................................................................31
5.2 CE195352_PSoC_5LP_Blinking_LED ......................................................................35
5.3 CE195277_ADC_and_UART ....................................................................................37
5.4 CE195394_HID_Mouse .............................................................................................38

Appendix 39
PSoC 5LP Prototyping Kit Schematics ...............................................................................39
Programming PSoC 5LP Prototyping Kit Using MiniProg3/KitProg ....................................41
Bill of Materials ....................................................................................................................42

Revision History 45

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 Safety Information

Regulatory Compliance
The CY8CKIT-059 PSoC® 5LP Prototyping Kit is intended for use as a development platform for
hardware or software in a laboratory environment. The board is an open system design, which does
not include a shielded enclosure. This may cause interference to other electrical or electronic
devices in close proximity. In a domestic environment, this product may cause radio interference. In
such cases, you may be required to take adequate preventive measures. In addition, this board
should not be used near any medical equipment or RF devices.
Attaching additional wiring to this product or modifying the product operation from the factory default
may affect its performance and cause interference with other apparatus in the immediate vicinity. If
such interference is detected, suitable mitigating measures should be taken.
The PSoC 5LP Prototyping Kit, as shipped from the factory, has been verified to meet with
requirements of CE as a Class A product.

The PSoC 5LP Prototyping Kit contains electrostatic

discharge (ESD) sensitive devices. Electrostatic charges
readily accumulate on the human body and any equipment,
and can discharge without detection. Permanent damage
may occur on devices subjected to high-energy discharges.
Proper ESD precautions are recommended to avoid
performance degradation or loss of functionality. Store
unused PSoC 5LP Prototyping Kit boards in the protective
shipping package.

End-of-Life/Product Recycling
This kit has an end-of life five years from the date of
manufacture mentioned on the back of the box. Contact your
nearest recycler for discarding the kit.

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 Safety Information

General Safety Instructions

ESD Protection
ESD can damage boards and associated components. Cypress recommends that you perform
procedures only at an ESD workstation. If such a workstation is not available, use appropriate ESD
protection by wearing an antistatic wrist strap attached to the chassis ground (any unpainted metal
surface) on your board when handling parts.

Handling Boards
PSoC 5LP Prototyping Kit boards are sensitive to ESD. Hold the board only by its edges. After
removing the board from its box, place it on a grounded, static-free surface. Use a conductive foam
pad if available. Do not slide board over any surface.

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 1. Introduction

Thank you for your interest in the CY8CKIT-059 PSoC 5LP Prototyping Kit. This kit is designed as an
easy-to-use and inexpensive prototyping platform. The PSoC 5LP Prototyping Kit supports the
PSoC 5LP device family, delivering a complete system solution for a wide range of embedded
applications at a very low cost. The PSoC 5LP is the industry’s most integrated SoC with an Arm®
Cortex™-M3 CPU. It combines programmable and reconfigurable high-precision analog and digital
blocks with flexible automatic routing. The unique flexibility of the PSoC 5LP architecture will help
those who want to rapidly develop products using the PSoC 5LP device family.
The PSoC 5LP Prototyping Kit offers an open footprint breakout board to maximize the end-utility of
the PSoC 5LP device. This kit provides a low-cost alternative to device samples while providing a
platform to easily develop and integrate the PSoC 5LP device into your end-system. In addition, the
board includes the following features:
■ Micro-USB connector to enable USB application development
■ Onboard CMOD capacitors to enable CapSense® development
■ Bypass capacitors to ensure the high-quality ADC conversions
■ An LED to provide feedback
■ A push button to provide a simple user input
■ Load capacitors to connect 32-kHz external crystal oscillator
■ 3.3-V to 5.5-V operation
The PSoC 5LP prototyping kit also integrates the Cypress KitProg that enables onboard
programming, debugging, and bridging functionality, such as USB-UART and USB-I2C. The KitProg
is used to program and debug the target PSoC 5LP device (see Figure 1-1). The prototyping kit
allows you to separate the KitProg board from the PSoC 5LP target board.

1.1 Kit Contents

This kit contains only the PSoC 5LP Prototyping Kit board.
Figure 1-1. CY8CKIT-059 PSoC 5LP Prototyping Kit

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 Introduction

1.2 PSoC Creator

PSoC Creator™ is a state-of-the-art, easy-to-use integrated design environment (IDE). It introduces
revolutionary hardware and software co-design, powered by a library of pre-verified and pre-
characterized PSoC Components. With PSoC Creator, you can:
1. Drag and drop Components to build your hardware system design in the main design workspace
2. Codesign your application firmware with the PSoC hardware
3. Configure Components using configuration tools
4. Explore the library of 100+ Components
5. Review Component datasheets
Figure 1-2. PSoC Creator Features

PSoC Creator also enables you to tap into an entire tool ecosystem with integrated compiler chains
and production programming programmers for PSoC devices.
For more information, visit www.cypress.com/psoccreator.

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 Introduction

1.2.1 PSoC Creator Code Examples

PSoC Creator includes a large number of code examples. These examples are available from the
PSoC Creator Start Page, as Figure 1-3 on page 9 shows.
Code examples can speed up your design process by starting you off with a complete design,
instead of a blank page. They also show how PSoC Creator Components can be used for various
applications. Code examples and documentation are included, as shown in Figure 1-4 on page 10.
In the Find Example Project dialog shown in Figure 1-4, you have several options:
■ Filter for examples based on architecture or device family, that is, PSoC 3, PSoC 4, or
PSoC 5LP; project name; or keyword.
■ Select from the menu of examples offered based on the Filter Options.
■ Review the example project’s description (on the Documentation tab).
■ Review the code from the Sample Code tab. You can copy the code from this window and paste
to your project, which can help speed up code development.
■ Create a new project (and a new workspace if needed) based on the selection. This can speed
up your design process by starting you off with a complete, basic design. You can then adapt that
design to your application.
Figure 1-3. Code Examples in PSoC Creator

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 Introduction

Figure 1-4. Code Example Projects with Sample Code

1.2.2 Kit Code Examples

This kit includes a number of code examples, which can be used to quickly evaluate the functionality
of this kit. These examples are described in the Code Examples chapter on page 31.

1.2.3 PSoC Creator Help

Visit the PSoC Creator home page to download the latest version of PSoC Creator. Then, launch
PSoC Creator and navigate to the following items:
■ Quick Start Guide: Choose Help > Documentation > Quick Start Guide. This guide gives you
the basics for developing PSoC Creator projects.
■ Simple Component example projects: Choose File > Open > Example projects. These
example projects demonstrate how to configure and use PSoC Creator Components.
■ Starter designs: Choose File > New > Project > PSoC 5LP Starter Designs. These starter
designs demonstrate the unique features of PSoC 5LP.
■ System Reference Guide: Choose Help > System Reference > System Reference Guide.
This guide lists and describes the system functions provided by PSoC Creator.
■ Component datasheets: Right-click a Component and select Open Datasheet, as shown in
Figure 1-5. Visit the PSoC 5LP Component Datasheets page for a list of all PSoC 5LP Compo-
nent datasheets.
■ Document Manager: PSoC Creator provides a document manager to help you to easily find and
review document resources. To open the document manager, choose the menu item Help >
Document Manager.

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 Introduction

1.2.4 Component Datasheets

Right-click a Component and select Open Datasheet (see Figure 1-5).
Figure 1-5. Opening Component Datasheet

1.3 Getting Started

This guide will help you get acquainted with the PSoC 5LP Prototyping Kit:
■ The Software Installation chapter on page 13 describes the installation of the kit software. This
includes installation of PSoC Creator IDE for development and debugging the applications, and
PSoC Programmer for programming hex files.
■ The Kit Operation chapter on page 16 describes the major features of the PSoC 5LP Pioneer Kit
and functionalities such as programming, debugging, and the USB-UART and USB-I2C bridges.
■ The Hardware chapter on page 20 details the hardware content of the kit and the hardware
operation.
■ The Code Examples chapter on page 31 describes multiple PSoC 5LP code examples that will
help you understand how to create your own PSoC 5LP projects.
■ The Appendix on page 39 provides schematics, details about programming the kit using
MiniProg3, and the bill of materials (BOM).

1.4 Additional Learning Resources

Cypress provides a wealth of information at www.cypress.com to help you to select the right PSoC
device for your design, and to help you to quickly and effectively integrate the device into your
design. For a comprehensive list of resources, see KBA86521, How to Design with PSoC 3, PSoC 4,
and PSoC 5LP. The following is an abbreviated list for PSoC 5LP:
■ Overview: PSoC Portfolio, PSoC Roadmap
■ Product Selectors: PSoC 1, PSoC 3, PSoC 4, or PSoC 5LP. In addition, PSoC Creator includes a
device selection tool.
■ Datasheets: Describe and provide electrical specifications for the PSoC 5LP device family
■ CapSense Design Guide: Learn how to design capacitive touch-sensing applications with the
PSoC 5LP family of devices.
■ Application Notes and Code Examples: Cover a broad range of topics, from basic to advanced
level. Many of the application notes include code examples. Visit the PSoC 3/4/5 Code Examples

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 Introduction

webpage for a list of all available PSoC Creator code examples. For accessing code examples
from within PSoC Creator - see PSoC Creator Code Examples.
■ Technical Reference Manuals (TRM): Provide detailed descriptions of the architecture and
registers in each PSoC 5LP device family.
■ Development Kits:
❐ CY8CKIT-050 PSoC 5LP Development Kit enables you to evaluate, develop, and prototype
high-precision analog, low-power, and low-voltage applications designed using the PSoC 5LP
device family.
❐ CY8CKIT-001 is a common development platform for all PSoC family devices.
❐ PSoC 5LP Expansion Boards are the expansion modules designed to implement a target
application.
■ The MiniProg3 device provides an interface for flash programming and debug.
■ Knowledge Base Articles (KBA): Provide design and application tips from experts on using the
device.
■ PSoC Creator Training: Visit the link www.cypress.com/go/creatorstart/creatortraining for a
comprehensive list of video trainings on PSoC Creator.
■ Learning From Peers: Visit www.cypress.com/forums to meet enthusiastic PSoC developers
discussing the next generation embedded systems on Cypress Developer Community Forums.

1.5 Technical Support

If you have any questions, our technical support team is happy to assist you. You can create a
support request on the Cypress Technical Support page.
If you are in the United States, you can talk to our technical support team by calling our toll-free
number: +1-800-541-4736. Select option 3 at the prompt.
You can also use the following support resources if you need quick assistance.
■ Self-help.
■ Local Sales Office Locations.

1.6 Document Conventions

Table 1-1. Document Conventions for Guides
Convention Usage
Courier New Displays file locations, user entered text, and source code:
C:\...cd\icc\
Italics Displays file names and reference documentation:
Read about the sourcefile.hex file in the PSoC Creator User Guide.
[Bracketed, Bold] Displays keyboard commands in procedures:
[Enter] or [Ctrl] [C]
File > Open Represents menu paths:
File > Open > New Project
Bold Displays commands, menu paths, and icon names in procedures:
Click the File icon and then click Open.
Times New Roman Displays an equation:
2+2=4
Text in gray boxes Describes Cautions or unique functionality of the product.

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 2. Software Installation

This chapter describes the steps to install the software tools and packages on a PC for using the
PSoC 5LP Prototyping Kit. This includes the IDE on which the projects will be built and used for
programming.

2.1 Before You Begin

All Cypress software installations require administrator privileges, but these are not required to run
the software after it is installed. Close any other Cypress software that is currently running before
installing the kit software.
Note: By default, the kit contents are installed in the C:\Program Files\Cypress folder, for a
32-bit machine and C:\Program Files (x86)\Cypress, for a 64-bit machine. This directory will
contain the kit code examples. To open these code examples, it is recommended to use the
procedure described in the Code Examples chapter on page 31. This procedure will create an
editable copy of the code example in a path that you chose so that the original installed code
examples will not be modified.

2.2 Install Software

Follow these steps to install the PSoC 5LP Prototyping Kit software:
1. Download the PSoC 5LP Prototyping Kit software from www.cypress.com/CY8CKIT-059. The kit
software is available in three formats for download.
a. CY8CKIT-059 Kit Setup: This installation package contains the files related to the kit including
PSoC Creator, PSoC Programmer, and PDL. However, it does not include the Windows
Installer or Microsoft .NET framework packages. If these packages are not on your computer,
the installer will direct you to download and install them from the Internet.
b. CY8CKIT-059 Kit Only: This executable file installs only the kit contents, which include kit
code examples, hardware files, and user documents. This package can be used if all the
software prerequisites (listed in step 5) are installed on your PC.
c. CY8CKIT-059 DVD ISO: This file is a complete package, stored in a DVD-ROM image format,
that you can use to create a DVD or extract using an ISO extraction program such as WinZip
or WinRAR. The file can also be mounted like a virtual CD/DVD using virtual drive programs
such as Virtual CloneDrive and MagicISO. This file includes all the required software, utilities,
drivers, hardware files, and user documents.
2. If you have downloaded the ISO file, mount it in a virtual drive. Extract the ISO contents if you do
not have a virtual drive to mount. Double-click cyautorun.exe in the root directory of the extracted
content or mounted ISO if "Autorun from CD/DVD" is not enabled on the PC. The installation
window will appear automatically. Note: If you are using the "Kit Setup" or "Kit Only" file, then go
to step 4 for installation.

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 Software Installation

3. Click Install CY8CKIT-059 Kit to start the kit installation, as shown in Figure 2-1.
Figure 2-1. Kit Installer Screen

4. Select the directory in which you want to install the PSoC 5LP Prototyping Kit-related files.
Choose the directory and click Next.
5. When you click Next, the PSoC 5LP Prototyping Kit installer automatically installs the required
software, if it is not present on your computer. Following is the required software:
a. PSoC Creator 4.2: This software is available for download separately from the kit at
www.cypress.com/psoccreator. PSoC Creator 4.2 installer automatically installs the following
additional software:
– PSoC Programmer 3.27.1
– Peripheral Driver Library 3.0.1.
6. Choose the Typical/Custom/Complete installation type in the Product Installation Overview
window, as shown in Figure 2-2. Click Next after you select the installation type.

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 Software Installation

Figure 2-2. Product Installation Overview

7. Read the License agreement and select 'I accept the terms in the license agreement' to continue
with installation. Click Next.
8. When the installation begins, a list of packages appears on the installation page. A green check
mark appears next to each package after successful installation.
9. Enter your contact information or select the Continue Without Contact Information check box.
Click Finish to complete the PSoC 5LP Prototyping Kit installation.
10.After the installation is complete, the kit contents are available at the following location:
<Install_Directory>\CY8CKIT-059
Default location:
Windows OS (64-bit):
C:\Program Files (x86)\Cypress\CY8CKIT-059
Windows OS (32-bit):
C:\Program Files\Cypress\CY8CKIT-059
Note: For Windows 7/8/8.1/10 users, the installed files and the folder are read-only. To use the
installed code examples, follow the steps outlined in the Code Examples chapter on page 31. These
steps will create an editable copy of the example in a path that you choose, so the original installed
example is not modified.

2.3 Uninstall Software

The software can be uninstalled using one of the following methods:
1. Go to Start > All Programs > Cypress > Cypress Update Manager and select the Uninstall
button.
2. Go to Start > Control Panel > Programs and Features for Windows 7 or Add/Remove
Programs for Windows XP; select the Uninstall/Change button.

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 3. Kit Operation

This chapter introduces you to the different features of the PSoC 5LP Prototyping Kit. This primarily
includes the programming/debugging functionality, KitProg USB-UART and USB-I2C bridges, and
the method to update the KitProg firmware.

3.1 Theory of Operation

Figure 3-1 shows the block diagram for the PSoC 5LP Prototyping Kit.
Figure 3-1. Block Diagram of PSoC 5LP Prototyping Kit

The PSoC 5LP Prototyping Kit is simplistic in design and focuses on providing you with complete
access to develop applications using the PSoC 5LP device family. This kit supports the following
features:
■ KitProg: It is an onboard programmer/debugger, which enables programming and debugging the
target PSoC 5LP device. It can also act as a USB-UART and UART-I2C bridge.
When used as a standalone module, it can be used to program devices of the PSoC 3, PSoC 4,
or PSoC 5LP families through the SWD interface. For more details on the KitProg functionality,
refer to the KitProg User Guide in the kit installation directory:
<Install_Directory>\CY8CKIT-
059\<version>\Documentation\KitProg_User_Guide.pdf
■ Expansion Headers: The PSoC 5LP Prototyping Kit brings all I/Os of the device to the two
expansion headers, allowing you to have maximum access to the capabilities of the PSoC 5LP
device.
■ Micro-USB Connector: The onboard micro-USB connector provides access to the USB block of
the PSoC 5LP device. This connector enables you to develop USB applications.
■ User LED: The onboard LED can be used to display outputs from the PSoC 5LP device. This
includes modulating the brightness of the LED to notify different states of the device.

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 Kit Operation

■ Push Button (SW): This kit has a push button, which can be used to provide input to the
PSoC 5LP.
Note: The switch connects the PSoC 5LP pin to ground when pressed. Therefore, you need to
configure the PSoC 5LP pin as resistive pull-up to detect the switch press.
■ Reset Button: This button is used for the following purposes:
❐ Reset the PSoC 5LP device: When pressed, it connects the XRES line of the PSoC 5LP to
ground and resets the PSoC 5LP device.
❐ Bootload the KitProg: When pressed while connecting the kit’s PCB USB connector to the
USB port of the PC, this button puts the KitProg into the bootloader mode. For more details on
the KitProg functionality, refer to the KitProg User Guide.
Note: When the two boards are separated, you can mount the SW2 button on the target board to
reset the PSoC 5LP device using a switch.

3.2 KitProg
The KitProg is a multi-functional system, which includes a programmer, debugger, USB-I2C bridge,
and a USB-UART bridge. The Cypress PSoC 5LP device is used to implement KitProg functionality.
The KitProg is integrated in most PSoC development kits. For more details on the KitProg
functionality, refer to the KitProg User Guide in the kit installation directory:
<Install_Directory>\CY8CKIT-059\<version>\Documentation\
KitProg_User_Guide.pdf.

3.3 Programming and Debugging the PSoC 5LP Target Device

The target PSoC 5LP device can be programmed and debugged using the KitProg. Before
programming the device, ensure that PSoC Creator and PSoC Programmer software are installed
on the PC. See Install Software on page 13 for more information.

3.3.1 Programming using PSoC Creator

1. Connect the kit to the computer through the PCB USB connector, J10, as shown in Figure 3-2.
The kit will enumerate as a composite device, if you are plugging in the PSoC 5LP Prototyping Kit
to your PC for the first time.
Figure 3-2. Connecting the PSoC 5LP Prototyping Kit to a Computer

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 Kit Operation

2. Open the desired project in PSoC Creator by selecting File > Open > Project/Workspace. This
provides the option to browse to and open a previously saved project. If you want to open one of
the code examples provided with the kit, follow the instructions in the Code Examples chapter on
page 31.
3. Select the option Build > Build Project or press [Shift] [F6] to build the project as shown in
Figure 3-3.
Figure 3-3. Build a Code Example

4. If there are no errors during build, program the firmware into the kit by choosing Debug >
Program or press [Ctrl] [F5], as shown in Figure 3-4. This programs the target PSoC 5LP device
on the PSoC 5LP Prototyping Kit, and the kit is ready to use.
Figure 3-4. Programming Device From PSoC Creator

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 Kit Operation

3.3.2 Debugging using PSoC Creator

To debug the project using PSoC Creator, follow steps 1 to 3 from Programming using PSoC Creator
on page 17 followed by:

1. Click the Debug icon or press [F5]. Alternatively, you can use the option Debug > Debug.
2. When the PSoC Creator opens in Debug mode, use the buttons on the toolbar to debug your
application.
For more details on using the debug features, refer to section 3.2 of the KitProg User Guide.

3.3.3 Programming using PSoC Programmer

PSoC Programmer (3.27.1 or later) can be used to program existing .hex files into the PSoC 5LP
Prototyping Kit. Refer to section 3.3 of the KitProg User Guide for a detailed explanation on how to
program using PSoC Programmer.

3.4 USB-UART Bridge

The KitProg on the PSoC 5LP Pioneer Kit can act as a USB-UART bridge. The UART lines between
the KitProg and the target are hardwired on the board, through the snappable area, with UART_RX
assigned to P12_6 and UART_TX assigned to P12_7 on PSoC 5LP (target). For more details on the
KitProg USB-UART functionality, refer to the KitProg User Guide.

3.5 USB-I2C Bridge

The KitProg can function as a USB-I2C bridge and communicate with the Bridge Control Panel
(BCP) software utility. The I2C lines on the PSoC 5LP (target) device are P12_1 (SDA) and P12_0
(SCL), which are hardwired on the board to the I2C lines of the KitProg. The USB-I2C supports I2C
speeds of 50 kHz, 100 kHz, 400 kHz, and 1 MHz. For more details on the KitProg USB-I2C
functionality, refer to the KitProg User Guide.

3.6 Updating KitProg Firmware

The KitProg firmware normally does not require any update. You can use the PSoC Programmer
software to update the firmware. Refer to the KitProg Use Guide for a detailed explanation on how to
update the KitProg firmware.

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide, Doc. #: 001-96498 Rev. *G 19

 4. Hardware

4.1 Board Details

The PSoC 5LP Prototyping Kit consists of the following blocks:
■ PSoC 5LP device
■ PSoC 5LP header ports J1 and J2
■ Micro-USB connector, J6
■ PSoC 5LP program/debug JTAG header, J5
■ KitProg (PSoC 5LP) device
■ KitProg ports J8 and J9 (GPIO)
■ SWD connection J3 and J7
■ PCB USB connector
■ One amber LED (Power)
■ One green LED (Status)
■ One blue LED (User)
■ User push button and reset button
■ External reference capacitors (ADC Bypass)
■ CapSense capacitor (CMOD)
■ Programming connector, J3
■ Perforated ‘snappable’ board design
Figure 4-1. PSoC 5LP Prototyping Kit Pin Details

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide, Doc. #: 001-96498 Rev. *G 20

 Hardware

4.2 Hardware Details

4.2.1 Target Board
The target board uses the PSoC 5LP family device. PSoC 5LP is the industry's most integrated
programmable SoC, integrating high-precision and programmable analog and digital peripherals,
and an Arm® Cortex™-M3 CPU. The PSoC 5LP features a high-precision analog-to-digital converter
(ADC), programmable amplifiers, flexible digital subsystem, unmatched parallel co-processing digital
filter block (DFB), high-throughput peripherals such as DMA, CAN, and USB, and standard
communication and timing peripherals. The programmable analog and digital subsystems allow
flexibility and in-field tuning of the design. For more information, refer to the PSoC 5LP family
datasheet in the PSoC 5LP web page.
Figure 4-2. Schematic of PSoC 5LP (Target)

P_VCCD
VDDIO2

VDDIO0
P15_5
P15_4
VDDD
VSSD
P2_5

P2_4
P2_3
P2_2
P2_1
P2_0

P0_7
P0_6
P0_5
P0_4
U2
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
EPAD

VDDD
VSSD
VCCD
P2_5
VDDIO2
P2_4
P2_3
P2_2
P2_1
P2_0
P15_5
P15_4

P0_7
P0_6
P0_5
P0_4
VDDIO0
P2_6 1 51 P0_3
P2_7 2 P2_6 P0_3 50 P0_2
P12_4 3 P2_7 P0_2 49 P0_1
P12_5 4 P12_4 I2C0_SCL, SIO P0_1 48 P0_0
5 P12_5 I2C0_SDA, SIO P0_0 47 P12_3
6 VSSB SIO_P12_3 46 P12_2
7 IND SIO_P12_2 45 VSSD
8 VBOOST CY8C5888LTI-LP097 QFN68 VSSD 44 VDDA
VSSD 9 VBAT VDDA 43 VSSA
PROG_RESET XRES 10 VSSD VSSA 42 VCCA
PROG_SWDIO P1_0 11 XRES VCCA 41 P15_3
PROG_SWDCLK P1_1 12 P1_0 P15_3 40 P15_2
P1_2 13 P1_1 P15_2 39 P12_1
P_SWO P1_3 14 P1_2 SIO, I2C1_SDA P12_1 38 P12_0
P_TDI P1_4 15 P1_3 SIO, I2C1_SCL P12_0 37 P3_7
P1_5 16 P1_4 P3_7 36 P3_6
P1_5 P3_6
P12_6_SIO
P12_7_SIO

VDDIO1 17 35 VDDIO3
P15_7 DM
P15_6 DP

VDDIO1 VDDIO3
P15_0
P15_1
VDDD

VCCD
VSSD
P1_6
P1_7

P3_0
P3_1
P3_2
P3_3
P3_4
P3_5
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
P_VCCD
P12_6
P12_7

P15_0
P15_1
P1_6
P1_7

P3_0
P3_1
P3_2
P3_3
P3_4
P3_5
DM_P
VDDD
VSSD
DP_P

DP R16 22E
DM R17 22E
0603

0603

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 Hardware

4.2.2 KitProg Board

PSoC 5LP on the KitProg board is used to program and debug the target PSoC 5LP device. The
KitProg PSoC 5LP connects to the USB port of the PC through the PCB USB connector and to the
SWD interface of the target PSoC 5LP device.
Figure 4-3. Schematic of PSoC 5LP (KitProg)

KP_VDDIO2

KP_VDDIO0
KP_VCCD

KP_P0_5
KP_P0_4
VDDD
VSSD
U1
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
EPAD
P2_5
VDDIO2
P2_4
P2_3
P2_2
P2_1
P2_0
P15_5
P15_4
VDDD
VSSD
VCCD
P0_7
P0_6
P0_5
P0_4
VDDIO0
KP_P2_6 1 51 KP_P0_3
KP_P2_7 2 P2_6 P0_3 50 KP_P0_2
KP_P12_4 3 P2_7 P0_2 49 KP_P0_1
KP_P12_5 4 P12_4 I2C0_SCL, SIO P0_1 48 KP_P0_0
5 P12_5 I2C0_SDA, SIO P0_0 47 KP_P12_3
6 VSSB SIO_P12_3 46 KP_P12_2
7 IND SIO_P12_2 45 VSSD
8 VBOOST CY8C5868LTI-LP039 QFN68 VSSD 44 VDDA
VSSD 9 VBAT VDDA 43
KP_XRES 10 VSSD VSSA 42 VCCA
11 XRES VCCA 41
12 P1_0 P15_3 40
13 P1_1 P15_2 39 KP_P12_1
14 P1_2 SIO, I2C1_SDA P12_1 38 KP_P12_0
15 P1_3 SIO, I2C1_SCL P12_0 37
16 P1_4 P3_7 36 KP_P3_6
P1_5 P3_6
P12_6_SIO
P12_7_SIO

KP_VDDIO1 17 35 KP_VDDIO3
P15_7 DM
P15_6 DP

VDDIO1 VDDIO3
P15_0
P15_1
VDDD

VCCD
VSSD
P1_6
P1_7

P3_0
P3_1
P3_2
P3_3
P3_4
P3_5
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

P3
KP_P12_6
KP_P12_7

KP_DM_P
KP_DP_P

pin
KP_P1_6
KP_P1_7

KP_VCCD

KP_P3_0
KP_P3_1

KP_P3_4
KP_P3_5
VDDD
VSSD

5(MSB) 4

P3.3 P3.2

VTARG VBUS
22E R4
22E R6

Floating GND
0603

0603

Place Near PSoC 5LP

GND read as binary "1
floating pin is read
R2
R3
KP_DM
KP_DP

15K
15K
KP_P1_6
d
KP_P1_7
KP_XRES

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 Hardware

4.2.3 Power Supply System

The power supply system on this board is dependent on the source of the power. For most
applications, you can use the 5-V supply from the USB connection to power the system. You can
also connect an external power supply to the board for low-voltage applications. The kit supports the
following connections:
■ 5 V from the KitProg USB
■ 5 V from the PSoC 5LP target USB (this will not power the KitProg section of the board)
■ 3.3 V to 5.5 V from a regulated supply connected to VDD (this will not power the KitProg section
of the board)
Note: To use an external power supply, while KitProg is connected to the PCB USB, remove diode,
D1, from the board. This ensures that VTARG supply from KitProg is not supplied to the target
device. KitProg measures the target voltage and adjusts the logic levels on the programming pins
accordingly.
This prototyping kit does not have an onboard ESD protection circuitry. Therefore, the power source
for the PSoC 5LP Prototyping Kit must be of a high quality to ensure that the board is protected from
any over-current conditions and swapped-power connections.

4.2.3.1 Measure PSoC 5LP Current Consumption

You can measure the current consumption of the PSoC 5LP device by using one of these methods:
Method 1:
1. Separate the KitProg board by 'snapping' the perforated edge between the two boards.
2. Power the remaining prototyping board via any of the VDD or VTARG terminals.
3. Place an ammeter in series with the VDD or VTARG connection to measure the current
consumption.
Method 2:
1. Remove the resistor R20 and install a 2-pin jumper in the supplied holes of J4.
2. Connect an ammeter across the 2-pin jumper to measure the current to the PSoC 5LP device.
This method can be used either with USB power or with power supplied to one of the VTARG pins
but not when supplying to one of the VDD pins.

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 Hardware

4.2.4 Board Separation (Snapping)

The PSoC 5LP Prototyping Kit consists of both a PSoC 5LP and a KitProg board. To separate the
two boards for testing or development, break the two boards apart at the built-in perforated edge.
The easiest method of separating the two boards is to place the kit on the edge of a table, where the
edge of the table is directly below the perforated edge and the smaller KitProg board is off the table
edge. Press gently on the KitProg board and snap the two boards apart. If any material is removed
from the edge of the boards, use sheers to clean up the edge of the kit.
Figure 4-4. PSoC 5LP Prototyping Kit Broken into Two Parts

4.2.5 Header Connections

The PSoC 5LP Prototyping Kit supports a number of unpopulated headers on both the KitProg and
the target PSoC 5LP boards.

4.2.5.1 Functionality of the J1 and J2 Headers (Target Board)

The target board contains two dual-inline headers (J1 and J2). These headers are both 1×26-pin
headers and include all of the I/O available on the PSoC 5LP device. These headers support all of
the available ports, GND, VDD, and connections to passive elements and user-input devices.
The J1 and J2 headers support 100-mil spacing, so you can solder connectors to connect the target
board to any development breadboard.
Figure 4-5. J1 and J2 Headers

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 Hardware

Table 4-1. J1 Header Pin Details Table 4-2. J2 Header Pin Details
PSoC 5LP Prototyping Kit GPIO Header (J1) PSoC 5LP Prototyping Kit GPIO Header (J2)
Pin Signal Description Pin Signal Description
J1_01 P2.0 GPIO J2_01 VDD Power
J1_02 P2.1 GPIO/LED J2_02 GND Ground
J1_03 P2.2 GPIO/SW J2_03 RESET Reset
J1_04 P2.3 GPIO J2_04 P0.7 GPIO
J1_05 P2.4 GPIO J2_05 P0.6 GPIO
J1_06 P2.5 GPIO J2_06 P0.5 GPIO
J1_07 P2.6 GPIO J2_07 P0.4 GPIO/BYPASS CAP
J1_08 P2.7 GPIO J2_08 P0.3 GPIO/BYPASS CAP
J1_09 P12.7 GPIO/UART_TX J2_09 P0.2 GPIO/BYPASS CAP
J1_10 P12.6 GPIO/UART_RX J2_10 P0.1 GPIO
J1_11 P12.5 GPIO J2_11 P0.0 GPIO
J1_12 P12.4 GPIO J2_12 P15.5 GPIO
J1_13 P12.3 GPIO J2_13 P15.4 GPIO/CMOD
J1_14 P12.2 GPIO J2_14 P15.3 GPIO/XTAL_IN
J1_15 P12.1 GPIO/I2C_SDA J2_15 P15.2 GPIO/XTAL_OUT
J1_16 P12.0 GPIO/I2C_SCL J2_16 P15.1 GPIO
J1_17 P1.0 GPIO J2_17 P15.0 GPIO
J1_18 P1.1 GPIO J2_18 P3.7 GPIO
J1_19 P1.2 GPIO J2_19 P3.6 GPIO
J1_20 P1.3 GPIO J2_20 P3.5 GPIO
J1_21 P1.4 GPIO J2_21 P3.4 GPIO
J1_22 P1.5 GPIO J2_22 P3.3 GPIO
J1_23 P1.6 GPIO J2_23 P3.2 GPIO/BYPASS CAP
J1_24 P1.7 GPIO J2_24 P3.1 GPIO
J1_25 GND Ground J2_25 P3.0 GPIO
J1_26 VDDIO Power J2_26 GND Ground

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 Hardware

4.2.5.2 Functionality of J7 and J3 Headers (PSoC 5LP to KitProg)

The KitProg and target boards each contain a 1x5-pin header. These headers provide a physical
connection between the two devices. Specifically, the connection includes the SWD interface,
required to program/debug the target PSoC 5LP device, power, ground, and reset.
Figure 4-6. J7 and J3 Headers

Table 4-3. Pin Details of J7 Header Table 4-4. Pin Details of J3 Header
PSoC 5LP to KitProg Header (J7) PSoC 5LP (Target) Program and Debug Header (J3)
Pin Signal Description Pin Signal Description
J7_01 VTARG Power J3_01 VTARG Power
J7_02 GND Ground J3_02 GND Ground
J7_03 P12.4 RESET J3_03 XRES RESET
J7_04 P12.3 SWDCLK J3_04 P1.1 SWDCLK
J7_05 P12.2 SWDIO J3_05 P1.0 SWDIO

When the boards are separated, the KitProg board can be used to program any other PSoC 3,
PSoC 4, or PSoC 5LP family of devices via J7.

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide, Doc. #: 001-96498 Rev. *G 26

 Hardware

4.2.5.3 Functionality of J8 and J9 Headers (KitProg)

The KitProg board contains two dual-inline headers (J8 and J9). These headers are both 1x7-pin-
headers, used to pull out several pins of PSoC 5LP to support advanced features like a low-speed
oscilloscope and a low-speed digital logic analyzer. This header also contains the KitProg bridge
pins that can be used when the two boards are separated.
The J8 and J9 headers support 100-mil spacing, so you can solder connectors to connect the
KitProg board to any development breadboard.
Figure 4-7. J8 and J9 Headers

Table 4-5. Pin Details of J9 Table 4-6. Pin Details of J8

KitProg GPIO Header (J9) KitProg GPIO Header (J8)
Pin Signal Description Pin Signal Description
J9_01 VBUS Power J8_01 GND Ground
J9_02 GND Ground J8_02 P3.0 GPIO
J9_03 P12.5 GPIO J8_03 P3.4 GPIO
J9_04 P12.0 GPIO/I2C_SCL J8_04 P3.5 GPIO
J9_05 P12.1 GPIO/I2C_SDA J8_05 P3.6 GPIO
J9_06 P12.6 GPIO/UART_RX J8_06 P0.0 GPIO
J9_07 P12.7 GPIO/UART_TX J8_07 P0.1 GPIO

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 Hardware

4.2.6 User and Passive Inputs

4.2.6.1 Push Button
The target PSoC 5LP board contains a single push button connected to the P2.2 pin on the
PSoC 5LP device. This button can be used for general user inputs or to control different states in an
application.
Figure 4-8. Push Button on the Board

SW1
P2_2 1A 2A
1B 2B

Switch
USER PUSH BUTTON
 

4.2.6.2 Reset/Boot Button

The KitProg board contains a push button connected to the XRES pin on the target PSoC 5LP
device and P12_4 of the KitProg device. This button serves two functions:
■ Reset the PSoC 5LP device: When this button is pressed, XRES line of the PSoC 5LP is
connected to ground, which, in turn, resets the target device.
■ Bootload the KitProg: When this button is pressed while plugging the KitProg into the USB port of
the PC, the KitProg enters the bootloader mode. In this mode, bootloadable applications can be
downloaded on the KitProg device.
Figure 4-9. Reset/Boot Button

Reset Button
The target board also provides a footprint for a through-hole switch, which can be used to reset the
device when the two boards are separated.
Figure 4-10. Reset (RST) Button

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 Hardware

4.2.6.3 LEDs
The PSoC 5LP Prototyping Kit contains three LEDs:
■ Amber LED: Indicates that the board is powered from the PCB USB connector. This LED will not
light when the board is powered from the micro-USB connector or from VDD or VTARG directly.
■ Green LED: Indicates the KitProg status, connected to P3.1 of the KitProg PSoC 5LP device. For
more details on the KitProg status LED, refer to the KitProg User Guide.
■ Blue LED: This is the user LED, connected to P2.1 of the target PSoC 5LP device.
Figure 4-11. Power LED

Figure 4-12. Status LED

Figure 4-13. User LED

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide, Doc. #: 001-96498 Rev. *G 29

 Hardware

4.2.6.4 System Capacitors

The PSoC 5LP Prototyping Kit has seven capacitors, which are used when ADC operation at high
frequencies, CapSense, or external 32-kHz crystal oscillator is required in the application.
■ Four ADC bypass capacitors: Required for proper ADC sampling at high frequencies:
❐ C9 and C12 – For two SAR ADCs
❐ C7 and C13 – For Delta Sigma ADC
■ A CapSense capacitor (CMOD): Required for proper CapSense functionality.
■ Two biasing capacitors: Required for interfacing an external 32-kHz crystal oscillator. These
capacitors are added in the Rev *A version of the PSoC 5LP Prototyping Kit.
Note: The crystal oscillator is not placed on the board, it can be soldered on pins P15_2 and P15_3.
Figure 4-14. System Capacitors Circuit Diagram

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide, Doc. #: 001-96498 Rev. *G 30

 5. Code Examples

This chapter explains the code examples provided along with the PSoC 5LP Prototyping Kit. To
access these code examples, download and install the CY8CKIT-059 PSoC 5LP Prototyping Kit
setup file from the kit webpage: www.cypress.com/CY8CKIT-059. After installation, the code
examples will be available from Start > Kits > CY8CKIT-059 on the PSoC Creator Start Page.

5.1 Using the Kit Code Examples

Follow these steps to open and use the code examples.
1. Launch PSoC Creator from the Windows Start menu (Start > All Programs > Cypress > PSoC
Creator<version> > PSoC Creator <version>).
2. On the Start page, click CY8CKIT-059 under Start > Kits. A list of code examples appears, as
shown in Figure 5-1.
3. Click on the desired code example and save it at a desired location. For the remaining steps,
CE195277_ADC_and_UART.cywrk is used as reference.
Figure 5-1. Open Code Example from PSoC Creator

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide, Doc. #: 001-96498 Rev. *G 31

 Code Examples

4. Build the code example by choosing Build > Build <Project Name>, as shown in Figure 5-2. A
.hex file is generated after the build process.
Figure 5-2. Open Code Example from PSoC Creator

5. Connect the PSoC 5LP Prototyping Kit to the PC using the KitProg PCB USB port, J10 as
described in Figure 3-2 on page 17 to program the kit with this code example.
6. Choose Debug > Program in PSoC Creator as shown in Figure 5-3.
Figure 5-3. Program Device in PSoC Creator

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide, Doc. #: 001-96498 Rev. *G 32

 Code Examples

7. PSoC Creator opens the programming window if the device is not yet acquired. Select KitProg
and click the Port Acquire button, as shown in Figure 5-4.
Figure 5-4. Port Acquire

8. After the device is acquired, it is shown in a tree structure below the KitProg. Click the Connect
button and then OK to exit the window and start programming, as shown in Figure 5-5.
Figure 5-5. Connect Device From PSoC Creator and Program

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide, Doc. #: 001-96498 Rev. *G 33

 Code Examples

9. From the workspace explorer in PSoC Creator, open the CE195277_ADC_and_UART.pdf as

shown in Figure 5-6.
Figure 5-6. Project Datasheet - CE195277_ADC_and_UART.pdf

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide, Doc. #: 001-96498 Rev. *G 34

 Code Examples

5.2 CE195352_PSoC_5LP_Blinking_LED
This code example demonstrates the use of a fixed-function PWM. The PWM is set up to output a
50-percent duty cycle digital signal with a period of 1 second. This signal can be used to drive an
LED for visual testing of the PWM output. A switch is routed into the kill input of the PWM. When the
switch is pressed the PWM output is shut off.
Figure 5-7. TopDesign for CE195352_PSoC_5LP_Blinking_LED

For a detailed description, refer to the CE195352_PSoC_5LP_Blinking_LED.pdf from PSoC Creator.

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide, Doc. #: 001-96498 Rev. *G 35

 Code Examples

Figure 5-8. Project Datasheet - CE195352_PSoC_5LP_Blinking_LED.pdf

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 Code Examples

5.3 CE195277_ADC_and_UART
This code example implements a simple data collection system using the DelSig ADC and the UART
component. The ADC continuously samples an analog input. The resulting samples can be sent to a
PC over a UART connection a single sample at a time or continuously. Emulated data, which is just
an incrementing number, can also be sent over the UART connection to test the communication. The
USB-UART Bridge in the KitProg is used to create an RS-232 connection to a terminal program on a
PC. The terminal program is used to send commands to get the ADC sample data and read the
resulting responses.
Figure 5-9. TopDesign CE195277_ADC_and_UART

For detailed operation, refer to the CE195277_ADC_and_UART.pdf from PSoC Creator.

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide, Doc. #: 001-96498 Rev. *G 37

 Code Examples

5.4 CE195394_HID_Mouse
This code example demonstrates the use of the USBFS component to implement a HID mouse.
Using the standard HID mouse descriptor, the PSoC enumerates as a mouse on the PC. Once the
enumeration is complete the PSoC sends data about the relative movement of the mouse to the PC.
A single button is also implemented in the project to emulate the left button, or button 1, on a
standard mouse. You can hold down the button on the kit and watch the cursor highlight text or
select items on a desktop while it draws the box.
Figure 5-10. CE195394_HID_Mouse

For detailed operation, refer to the CE195394_HID_Mouse.pdf from PSoC Creator.

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide, Doc. #: 001-96498 Rev. *G 38

 A. Appendix

A.1 PSoC 5LP Prototyping Kit Schematics

J1
1 P2_0
PSoC 5LP Target Device
1 2 P2_1 J2 VDD
2 3 P2_2 1
3 4 P2_3 VDDIO 1 2
4 5 P2_4 2 3 XRES
5 6 P2_5 VDDIO0 3 4 P0_7
6 4

P_VCCD
7 P2_6 VDDIO1 5 P0_6

VDDIO2

VDDIO0
7 8 P2_7 VDDIO2 5 6 P0_5

P15_5
P15_4
VDDD
VSSD
P2_5

P2_4
P2_3
P2_2
P2_1
P2_0

P0_7
P0_6
P0_5
P0_4
8 9 P12_7 provide silk VDDIO3 6 7 P0_4 P3_2,P0_2, P0_3 and P0_4
9
UART TX 7
10 P12_6 UART RX for UART pins 8 P0_3 these pins
10 C32 C20 C18 C35 8 have bypass CAP
11 P12_5 9 P0_2
11 12 P12_4 U2
69 9 10 P0_1 connected
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
0402 0402 0402 0402
12 0.1 uF 0.1 uF 0.1 uF 0.1 uF 10
13 P12_3 11 P0_0
13 14 P12_2 11 12 P15_5
EPAD
P2_5
VDDIO2
P2_4
P2_3
P2_2
P2_1
P2_0
P15_5
P15_4
VDDD
VSSD
VCCD
P0_7
P0_6
P0_5
P0_4
VDDIO0
14 15 P12_1 I2C_SDA provide silk 12 13 P15_4
15 16 P12_0 I2C_SCL for I2C pins 13 14 P15_3
16 17 P1_0 P2_6 1 51 P0_3 14 15 P15_2
17 18 P1_1 P2_7 2 P2_6 P0_3 50 P0_2 15 16 P15_1
18 19 P1_2 P12_4 3 P2_7 P0_2 49 P0_1 16 17 P15_0
19 20 P1_3 P12_5 4 P12_4 I2C0_SCL, SIO P0_1 48 P0_0 17 18 P3_7
20 21 P1_4 5 P12_5 I2C0_SDA, SIO P0_0 47 P12_3 18 19 P3_6
21 22 P1_5 6 VSSB SIO_P12_3 46 P12_2 19 20 P3_5
22 23 P1_6 7 IND SIO_P12_2 45 VSSD 20 21 P3_4
23 24 P1_7 8 VBOOST CY8C5888LTI-LP097 QFN68 VSSD 44 VDDA P0_4 21 22 P3_3
24 25 VSSD 9 VBAT VDDA 43 VSSA P0_3 22 23 P3_2
25 26 VDDIO PROG_RESET XRES 10 VSSD VSSA 42 VCCA P0_2 23 24 P3_1
26 XRES VCCA C9 24
PROG_SWDIO P1_0 11 41 P15_3 P3_2 25 P3_0
HDR 1x26 PROG_SWDCLK P1_1 12 P1_0 P15_3 40 P15_2 0603
SAR0 EXTREF 25 26
P1_1 P15_2 1.0 uF 26
No Load P1_2 13 39 P12_1
P1_2 SIO, I2C1_SDA P12_1 HDR 1x26
P_SWO P1_3 14 38 P12_0 C13
P_TDI P1_4 15 P1_3 SIO, I2C1_SCL P12_0 37 P3_7 No Load
PSoC 5LP I/O Header P1_4 P3_7 0603 1.0 uF EXTREF0
P1_5 16 36 P3_6
P1_5 P3_6
P12_6_SIO
P12_7_SIO

VDDIO1 17 35 VDDIO3 C12

P15_7 DM

PSoC 5LP I/O Header

P15_6 DP

VDDIO1 VDDIO3
SAR1 EXTREF
P15_0
P15_1
VDDD

VCCD
VSSD

0603
1.0 uF
P1_6
P1_7

P3_0
P3_1
P3_2
P3_3
P3_4
P3_5

C7
0603
EXTREF1 LED1
VDD 1.0 uF 820 ohm
R18
VDD P2_1 2 1
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

VDDA 0805
VDDD SAR Bypass Capacitors
P_VCCD
P12_6
P12_7

P15_0
P15_1

USER LED User LED BLUE

P1_6
P1_7

P3_0
P3_1
P3_2
P3_3
P3_4
P3_5
DM_P
VDDD
VSSD
DP_P

C22 C26 C21 C23

C36 C34
0402 0603 0603 0402 SW1
0.1 uF 1.0 uF 0603 0402 0.1 uF
1.0 uF 0.1 uF 1.0 uF P2_2 1A 2A
DP R16 22E
R5 1B 2B
DM R17 22E
0603

P15_4
0603
CMOD Switch
0603

C4
VCCA ZERO
USER PUSH BUTTON
VTARG
P_VCCD 2200 pF
P_VCCD
VTARG
C37 J5
C31
PROG_SWDIO
0603 1.0 uF 1 2 R19
0603 C29 PROG_SWDCLK
TVS DIODE

1.0 uF 3 4 4.7K
0.1 uF P_SWO SW2
TVS1

0402
C33 5 6 P_TDI No Load XRES 1 2
7 8 PROG_RESET
0402
0.1 uF 9 10 XRES SW PUSHBUTTON
50MIL KEYED SMD No Load
No Load C17
0.1 uF
0402
PSoC 5LP Program/Debug Header No Load

J6
USB Connector P5LP_VDD VDD
F1 D2 VTARG P15_2 VTARG
USB Micro-B P5LP_VDD
VTARG SOD123
J3 1 Y1 R11
VBUS R20 ZERO
1 2 DM 2 1
1 DM C27
2 3 DP PTC Resettable Fuse ZERO
2 DP 0.1 uF
3 PROG_RESET 4 0402 32.768 KHz
3 ID P15_3
4 5
S1
S2
S3
S4

4 PROG_SWDCLK GND No Load

1
2
5 PROG_SWDIO TP1 TP2 TP3
5 C42 P5LP_VDD
BLACK BLACK BLACK C41 J4 VDDIO

1
2
22 pF
6
7
8
9

HDR 1x5 I2C_SCL 22 pF 0402

100K R12 0402 R15 ZERO

No Load I2C_SDA No Load HEADER 1X 2
No Load No Load No Load
0603

UART RX R22 ZERO P12_7 UART TX 0402

0603

UART TX R23 ZERO P12_6 UART RX

CYPRESS SEMICONDUCTOR © 2015
0402

This signals will be coming from Kitprog from Breakable area C19 0.01 uF
Title
PCA:  121-60210-01
PCB:  600-60243-01 CY8CKIT-059 PSoC 5LP Prototyping Kit
FAB DRW: 610-60235-01 Size Document Number Rev
ASSY DRW: 620-60243-01 B 630-60242-01 06
SCH: 630-60242-01 Date: Tuesday, June 16, 2015 Sheet 2 of 3

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide, Doc. #: 001-96498 Rev. *G 39

 Kitprog on-board Programmer / Debugger 820 ohm
LED3
R21
KP_VDD KP_P3_1 2 1
0805

KP_VDDIO0 Status LED Green

KP_VDDIO1
KP_VDDIO2 KP_VDD
VBUS Status LED
VBUS

KP_VDDIO2
KP_VDDIO3

KP_VDDIO0
LED2

KP_VCCD

KP_P0_5
KP_P0_4
C11 C1 C3 C14 R8 560 ohm
R10 2 1

VDDD
VSSD
0805
0402 0402 0402 0402 0.1 uF
0.1 uF 0.1 uF 0.1 uF ZERO
VBUS
VTARG POWER LED Amber
D1
U1 Power LED

69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
KP_VDD SOD123

EPAD
P2_5
VDDIO2
P2_4
P2_3
P2_2
P2_1
P2_0
P15_5
P15_4
VDDD
VSSD
VCCD
P0_7
P0_6
P0_5
P0_4
VDDIO0
VDDD
C24 C5
KP_P2_6 1 51 KP_P0_3
0603 0402 KP_P2_7 2 P2_6 P0_3 50 KP_P0_2 SW3
1.0 uF 0.1 uF P2_7 P0_2
KP_P12_4 3 49 KP_P0_1 PROG_RESET 1A 2A
KP_P12_5 4 P12_4 I2C0_SCL, SIO P0_1 48 KP_P0_0 1B 2B
5 P12_5 I2C0_SDA, SIO P0_0 47 KP_P12_3
6 VSSB SIO_P12_3 46 KP_P12_2 Switch
IND SIO_P12_2 KP_P0_4
VDDD 7 45 VSSD
VBOOST VSSD KP_P0_3
8 CY8C5868LTI-LP039 QFN68 44 VDDA
VBAT VDDA KP_P0_2
VSSD 9 43
C25 C6 KP_XRES 10 VSSD VSSA 42 VCCA
XRES VCCA C15 C16 C8 0603
SAR Bypass
11 41 Capacitor
1.0 uF
0603 0402
0.1 uF 12 P1_0 P15_3 40 0603 0603
P1_1 P15_2 1.0 uF 1.0 uF 1.0 uF VTARG
13 39 KP_P12_1
14 P1_2 SIO, I2C1_SDA P12_1 38 KP_P12_0
15 P1_3 SIO, I2C1_SCL P12_0 37
16 P1_4 P3_7 36 KP_P3_6 KP_P2_6
VDDA P1_5 P3_6

P12_6_SIO
P12_7_SIO
KP_VDDIO1 17 35 KP_VDDIO3

P15_7 DM
P15_6 DP
C39 VDDIO1 VDDIO3 KP_P2_7
C38

P15_0
P15_1
VDDD

VCCD
VSSD
R9 R7

P1_6
P1_7

P3_0
P3_1
P3_2
P3_3
P3_4
P3_5
0402 0603 2.2K 2.2K
0.1 uF 1.0 uF

18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34

4
P3_3, P3_2, P0_7, P0_6, P0_5, P0_4

KP_P12_6
KP_P12_7

KP_DM_P
KP_DP_P
pins are reserved for HW REV ID

KP_P1_6
KP_P1_7

KP_VCCD
U3

KP_P3_0
KP_P3_1

KP_P3_4
KP_P3_5
NTZD3152P

VDDD
VSSD
VCCA 5(MSB) 4 3 2 1 0(LSB)

3
C30 P3.3 P3.2 P0.7 P0.6 P0.5 P0.4
1.0 uF KP_P12_1 I2C_SDA
0603

KP_VDD VTARG VBUS

22E R4
22E R6
Floating GND Floating Floating GND Floating KP_P12_0 I2C_SCL

0603

0603
Place Near PSoC 5LP
GND read as binary "1"
floating pin is read as binary "0" KP_P12_7 UART TX
KP_VCCD R2
R3
KP_DM
R1 15K
KP_DP KP_P12_6
4.7K 15K UART RX
KP_P1_6
C10 C28 0603 No Load
KP_P1_7
0402 KP_XRES I2C & UART Connection
0.1 uF 1.0 uF

C2 R14 R13
30K 30K
0402
0.1 uF
VBUS
No Load J9 J8
1 KP_P3_0 1
KP_P12_5 2 KP_P3_4 2
I2C_SCL 3 KP_P3_5 3
I2C_SDA 4 KP_P3_6 4
UART RX 5 KP_P0_0 5
UART TX 6 KP_P0_1 6
VBUS 7 7
VTARG
HDR 1x7 HDR 1x7
J7 No Load No Load
F2 1
1 2 KitProg I/O Headers
2 3 KP_P12_4
3 PROG_RESET
J10 PTC Resettable Fuse 4 KP_P12_3
4 PROG_SWDCLK
1 5 KP_P12_2 PROG_SWDIO
VBUS 2 KP_DM C40 5
DM 3 KP_DP 0.1 uF HDR 1x5
DP 4
0402
No Load
CYPRESS SEMICONDUCTOR © 2015
GND PCA:  121-60210-01 Title
USB FINGER PCB:  600-60243-01 CY8CKIT-059 PSoC 5LP Prototyping Kit
Target PSoC Program/Debug Header FAB DRW: 610-60235-01
Size Document Number Rev
USB Finger Connector ASSY DRW: 620-60243-01
SCH: 630-60242-01 B 630-60242-01 06

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide, Doc. #: 001-96498 Rev. *G 40

A.2 Programming PSoC 5LP Prototyping Kit Using MiniProg3/KitProg
The target board has a provision to program the PSoC 5LP device using MiniProg3 or an external
KitProg via the 5-pin SWD header or the 10-pin JTAG header. To do this, connect wires or a 5-pin
100-mil spaced header to J3 or a 10-pin JTAG header to J5 on the target board. The PSoC 5LP
Prototyping Kit supports both power cycle and reset programming modes.
Figure A-1. Connecting CY8CKIT-059 to MiniProg3

Note: CY8CKIT-002 MiniProg3 is not part of the PSoC 5LP Prototyping Kit contents and can be
purchased from the Cypress Online Store.

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide, Doc. #: 001-96498 Rev. *G 41

A.3 Bill of Materials
Item Qty Reference Value Description Mfr Name Mfr Part Number
PCB,
108.89mm × 24.13mm,
Cypress
1 1 N/A N/A High Tg, ENIG finish, 2 layer, 600-60178-01
Semiconductor
Color = BLACK,
Silk = WHITE
C1, C3, C5,
C6, C10, C11,
C14, C18,
C20, C22,
CAP .1UF 16V CERAMIC
2 19 C23, C27, 0.1 uF AVX Corporation 0402YG104ZAT2A
Y5V 0402
C29, C32,
C33, C34,
C35, C39,
C40
CAP CER 2200PF 50V 5%
3 1 C4 2200 pF Murata Electronics GRM2165C1H222JA01D
NP0 0805
C7, C8, C9,
C12, C13,
C15, C16,
C21, C24, CAP CERAMIC 1.0UF 25V
4 17 1.0 uF Taiyo Yuden TMK107BJ105KA-T
C25, C26, X5R 0603 10%
C28, C30,
C31, C36,
C37, C38
CAP 10000PF 16V
5 1 C19 0.01 uF TDK Corporation C1005X7R1C103K050BA
CERAMIC 0402 SMD
CAP CER 22PF 50V 2%
6 2 C41, C42 22 pF TDK Corporation C1005C0G1H220G050BA
C0G 0402
DIODE, SCHOTTKY, 20V, Fairchild
7 2 D1, D2 MBR0520L MBR0520L
0.5A, 400mW, SOD-123 Semiconductor
PTC
FUSE, PTC Resettable,
8 2 F1, F2 Resettable Bel Fuse Inc 0ZCH0050FF2G
0.50A, 16V, 1210, SMD
Fuse
CONN RCPT STD MICRO
9 1 J6 USB Micro-B FCI 10103594-0001LF
USB TYPE B
User LED LED, BLUE, CLEAR, 0805,
10 1 LED1 Lite-On Inc LTST-C170TBKT
BLUE SMD
POWER LED LED 595NM AMB DIFF Avago Technologies
11 1 LED2 HSMA-C170
Amber 0805 SMD US Inc.
Chicago Miniature/
Status LED LED GREEN CLEAR 0805 Visual
12 1 LED3 CMD17-21VGC/TR8
Green SMD Communications
Company-VCC
RES SMD 15K OHM 5%
13 2 R2, R3 15K Panasonic - ECG ERJ-2GEJ153X
1/10W 0402
R4, R6, R16, RES, 22 OHM, 1%,
14 4 22E Panasonic - ECG ERJ-2RKF22R0X
R17 100PPM, 1/16W, 0402

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide, Doc. #: 001-96498 Rev. *G 42

Item Qty Reference Value Description Mfr Name Mfr Part Number
RES SMD 0.0 OHM
15 3 R5, R22, R23 ZERO Panasonic - ECG ERJ-3GEY0R00V
JUMPER 06O3 1/10W
RES 2.2K OHM 1/10W 5%
16 2 R7, R9 2.2K Panasonic - ECG ERJ-3GEYJ222V
0603 SMD
RES, 560 OHM, 5%,
17 1 R10 560 ohm Panasonic - ECG ERJ-3GEYJ561V
200PPM, 1/10W, 0603, SMD
RES 100K OHM 1/10W 5%
18 1 R12 100K Panasonic - ECG ERJ-2GEJ104X
0402 SMD
RES SMD 30K OHM 5%
19 2 R13, R14 30K Panasonic - ECG ERJ-2GEJ303X
1/10W 0402
R8, R11, R15, RES SMD 0.0 OHM
20 4 ZERO Panasonic - ECG ERJ-6GEY0R00V
R20 JUMPER 1/8W 0805
RES, 820 OHM, 5%, 1/10W,
21 2 R18, R21 820 ohm Panasonic - ECG ERJ-3GEYJ821V
0603
SW, TACTILE SWITCH,
22 2 SW1, SW3 Switch C&K Components KMR221GLFS
SPST-NO, 0.05A, 32V
DIODE, TVS, 5V, 350W,
23 1 TVS1 TVS DIODE Semtech SD05.TCT
SOD-323
CY8C5868LTI
PSoC 5LP CYC58LP, 67 Cypress
24 1 U1 -LP039 CY8C5868LTI-LP039
MHz Semiconductor
QFN68
CY8C5888LTI
PSoC 5LP CYC58LP, 80 Cypress
25 1 U2 -LP097 CY8C5888LTI-LP097
MHz Semiconductor
QFN68
FET DUAL P-CH 20V
26 1 U3 NTZD3152P ON Semiconductor NTZD3152PT1G
430mA SOT-563
No Load Components
CAP .1UF 16V CERAMIC
1 2 C2, C17 0.1 uF AVX Corporation 0402YG104ZAT2A
Y5V 0402
CONN HDR BRKWAY
2 2 J1, J2 HDR 1x26 26POS VERT TE Connectivity 2-104427-4
2.54mm,15AU, TH
CONN HEADER 5POS .100
3 2 J3, J7 HDR 1x5 Molex 22-23-2051
VERT TIN
CONN HEADR BRKWAY
4 1 J4 HDR 1x2 TE Connectivity 9-146280-0-02
.100 02POS STR
CONN, HEADER, MALE,
50MIL
5 1 J5 1.27mm, 10POS, GOLD, Samtec Inc FTSH-105-01-L-DV-K
KEYED SMD
SMD
CONN HEADER FEMALE Sullins Connector
6 2 J8, J9 HDR 1x7 PPPC071LFBN-RC
7POS .1" GOLD Solutions
RES SMD 4.7K OHM 5% 1/
7 2 R1, R19 4.7K Panasonic - ECG ERJ-2GEJ472X
10W 0402
SW PUSH- SWITCH TACTILE SPST-
8 1 SW2 C&K Components PTS635SL50 LFS
BUTTON NO 0.05A 12V

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide, Doc. #: 001-96498 Rev. *G 43

Item Qty Reference Value Description Mfr Name Mfr Part Number
TP1, TP2, TP, TEST POINT, 0.040"D, Keystone
9 3 BLACK 5000
TP3 BLACK, TH Electronics
CRYSTAL 32.768KHZ Citizen Finetech
10 1 Y1 BLACK CFS308-32.768KDZF-UB
12.5PF THRU Miyota
Label
LBL, PCA Label, Vendor
Code, Datecode, Serial Cypress
38 1 N/A
Number 121-60210-01 REV Semiconductor
01 (YYWWVVXXXXX)
LBL, PCBA Anti-Static Warn- Cypress
39 1 N/A
ing, 10mm × 10mm Semiconductor

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide, Doc. #: 001-96498 Rev. *G 44

 Revision History

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide Revision History

Document Title: CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide
Document Number: 001-96498
Origin of
Revision ECN Issue Date Description of Change
Change
** 4668422 02/23/2015 PMAD New kit guide
Updated Introduction chapter on page 7:
Updated description.
Updated “PSoC Creator” on page 8:
Updated “PSoC Creator Code Examples” on page 9:
Updated description.
Added “Kit Code Examples” on page 10.
Updated Software Installation chapter on page 13:
Updated “Before You Begin” on page 13:
Updated description.
Updated “Install Software” on page 13:
Updated description.
Updated Kit Operation chapter on page 16:
Updated “Theory of Operation” on page 16:
Updated description.
Updated Figure 3-1.
Updated “KitProg” on page 17:
Updated description.
*A 4710488 04/02/2015 PMAD
Removed “KitProg USB Connection”.
Updated “Programming and Debugging the PSoC 5LP Target Device” on page 17:
Updated “Programming using PSoC Creator” on page 17:
Updated description.
Updated “Programming using PSoC Programmer” on page 19:
Updated description.
Updated “USB-UART Bridge” on page 19:
Updated description.
Removed table “Specifications Supported by USB-UART Bridge”.
Updated “USB-I2C Bridge” on page 19:
Updated description.
Removed figure “KitProg USB-I2C Connected in Bridge Control Panel”.
Updated “Updating KitProg Firmware” on page 19:
Updated description.
Removed figure “KitProg Firmware Update Warning”.
Removed figure “Upgrade Firmware Message in PSoC Programmer”.
Removed figure “Firmware Updated in PSoC Programmer”.

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide, Doc. #: 001-96498 Rev. *G 45

 Index

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide Revision History (continued)

Document Title: CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide
Document Number: 001-96498
Origin of
Revision ECN Issue Date Description of Change
Change
Updated Hardware chapter on page 20:
Updated “Board Details” on page 20:
Updated Figure 4-1.
Updated “Hardware Details” on page 21:
Updated “Power Supply System” on page 23:
Updated description.
Updated “Header Connections” on page 24:
Updated “Functionality of the J1 and J2 Headers (Target Board)” on page 24:
Updated Table 4-2.
Updated “User and Passive Inputs” on page 28:
Updated “Push Button” on page 28:
Updated Figure 4-8.
Removed figure “Push Button Schematic”.
Updated Figure 4-14.
Updated “LEDs” on page 29:
Updated description.
Updated “System Capacitors” on page 30:
*A (cont.) 4710488 04/02/2015 PMAD
Updated description.
Updated Figure 4-14.
Updated Code Examples chapter on page 31:
Updated “CE195352_Blinking_LED” on page 35:
Updated Figure 5-7.
Updated “CE195277_ADC_and_UART” on page 37:
Updated description.
Updated Figure 5-9.
Updated “CE195394_HID_Mouse” on page 38:
Updated description.
Updated Figure 5-10.
Updated Appendix chapter on page 39:
Updated “Programming PSoC 5LP Prototyping Kit Using MiniProg3/KitProg” on page 41:
Updated Figure A-1.
Updated “Bill of Materials” on page 42:
Added Item 10 under “No Load Components”.
Added “Label” and added corresponding items under the same.
Updated Hardware chapter on page 20:
Updated “Hardware Details” on page 21:
Updated “Header Connections” on page 24:
*B 4866765 07/30/2015 VRNK Updated “Functionality of the J1 and J2 Headers (Target Board)” on page 24:
Updated Table 4-2:
Added “/BYPASS CAP” in the “Description” column corresponding to pins P0.4 and P3.2.
Remove “/BYPASS CAP” in the “Description” column corresponding to pin P3.3.
Updated Appendix chapter on page 39:
*C 4891134 08/20/2015 SHIB Updated “Bill of Materials” on page 42:
Updated Item 10 under “No Load Components”.
*D 5740232 05/17/2017 AESATMP8 Updated logo and Copyright.

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide, Doc. #: 001-96498 Rev. *G 46

 Index

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide Revision History (continued)

Document Title: CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide
Document Number: 001-96498
Origin of
Revision ECN Issue Date Description of Change
Change
Updated Introduction chapter on page 7:
Updated “PSoC Creator” on page 8:
Updated “PSoC Creator Code Examples” on page 9:
Updated Figure 1-3.
Updated “Getting Started” on page 11:
Updated description.
Updated “Additional Learning Resources” on page 11:
Updated hyperlinks.
Updated Software Installation chapter on page 13:
Updated “Install Software” on page 13:
Updated description.
Updated Figure 2-1, and Figure 2-2.
Updated Kit Operation chapter on page 16:
Updated “Theory of Operation” on page 16:
Updated description.
Updated “Programming and Debugging the PSoC 5LP Target Device” on page 17:
Updated “Debugging using PSoC Creator” on page 19:
Updated description.
Updated Hardware chapter on page 20:
Updated “Hardware Details” on page 21:
Updated “Header Connections” on page 24:
Updated “Functionality of J7 and J3 Headers (PSoC 5LP to KitProg)” on page 26:
*E 6041084 01/22/2018 SAGA / GRSK
Updated Table 4-3, and Table 4-4.
Updated “Functionality of J8 and J9 Headers (KitProg)” on page 27:
Updated Table 4-5, and Table 4-6.
Updated Code Examples chapter on page 31:
Updated “Using the Kit Code Examples” on page 31:
Updated description.
Updated Figure 5-1, Figure 5-2, Figure 5-3, Figure 5-4, and Figure 5-6.
Updated “CE195352_Blinking_LED” on page 35:
Updated description.
Updated Figure 5-8.
Updated “CE195277_ADC_and_UART” on page 37:
Updated description.
Updated Figure 5-9.
Updated “CE195394_HID_Mouse” on page 38:
Updated description.
Updated Figure 5-10.
Updated Appendix chapter on page 39:
Updated “PSoC 5LP Prototyping Kit Schematics” on page 39:
Updated all figures.
Updated “Bill of Materials” on page 42:
Updated entire table.
Completing Sunset Review.
Updated Software Installation chapter on page 13:
Updated “Install Software” on page 13:
Updated description.
*F 6077263 02/21/2018 SAGA Updated Kit Operation chapter on page 16:
Updated “Programming and Debugging the PSoC 5LP Target Device” on page 17:
Updated “Programming using PSoC Programmer” on page 19:
Updated description.

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide, Doc. #: 001-96498 Rev. *G 47

 Index

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide Revision History (continued)

Document Title: CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide
Document Number: 001-96498
Origin of
Revision ECN Issue Date Description of Change
Change
Updated the code example title in Section 5.2.
*G 6095702 03/12/2018 SAGA
Updated Figure 5.1 and Figure 5-8.

CY8CKIT-059 PSoC® 5LP Prototyping Kit Guide, Doc. #: 001-96498 Rev. *G 48