74LS193 PDF
74LS193 PDF
74LS193 PDF
June 1989
54LS193/DM54LS193/DM74LS193
Synchronous 4-Bit Up/Down Binary
Counters with Dual Clock
General Description
This circuit is a synchronous up/down 4-bit binary counter. These counters were designed to be cascaded without the
Synchronous operation is provided by having all flip-flops need for external circuitry. Both borrow and carry outputs
clocked simultaneously, so that the outputs change togeth- are available to cascade both the up and down counting
er when so instructed by the steering logic. This mode of functions. The borrow output produces a pulse equal in
operation eliminates the output counting spikes normally as- width to the count down input when the counter underflows.
sociated with asynchronous (ripple-clock) counters. Similarly, the carry output produces a pulse equal in width to
The outputs of the four master-slave flip-flops are triggered the count down input when an overflow condition exists.
by a low-to-high level transition of either count (clock) input. The counters can then be easily cascaded by feeding the
The direction of counting is determined by which count input borrow and carry outputs to the count down and count up
is pulsed while the other count input is held high. inputs respectively of the succeeding counter.
The counter is fully programmable; that is, each output may
be preset to either level by entering the desired data at the Features
inputs while the load input is low. The output will change Y Fully independent clear input
independently of the count pulses. This feature allows the Y Synchronous operation
counters to be used as modulo-N dividers by simply modify- Y Cascading circuitry provided internally
ing the count length with the preset inputs. Y Individual preset each flip-flop
A clear input has been provided which, when taken to a high Y Alternate Military/Aerospace device (54LS193) is avail-
level, forces all outputs to the low level; independent of the able. Contact a National Semiconductor Sales Office/
count and load inputs. The clear, count, and load inputs are Distributor for specifications.
buffered to lower the drive requirements of clock drivers,
etc., required for long words.
Connection Diagram
Dual-In-Line Package
TL/F/6406 – 1
Order Number 54LS193DMQB, 54LS193FMQB, 54LS193LMQB,
DM54LS193J, DM54LS193W, DM74LS193M or DM74LS193N
See NS Package Number E20A, J16A, M16A, N16E or W16A
Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Typ
Symbol Parameter Conditions Min Max Units
(Note 3)
VI Input Clamp Voltage VCC e Min, II e b18 mA b 1.5 V
VOH High Level Output VCC e Min, IOH e Max DM54 2.5 3.4
V
Voltage VIL e Max, VIH e Min
DM74 2.7 3.4
VOL Low Level Output VCC e Min, IOL e Max DM54 0.25 0.4
Voltage VIL e Max, VIH e Min
DM74 0.35 0.5 V
IOL e 4 mA, VCC e Min DM74 0.25 0.4
II Input Current @ Max VCC e Max, VI e 7V
0.1 mA
Input Voltage
IIH High Level Input Current VCC e Max, VI e 2.7V 20 mA
IIL Low Level Input Current VCC e Max, VI e 0.4V b 0.4 mA
IOS Short Circuit VCC e Max DM54 b 20 b 100
mA
Output Current (Note 4) DM74 b 20 b 100
2
Switching Characteristics at VCC e 5V and TA e 25§ C (See Section 1 for Test Waveforms and Output Load)
RL e 2 kX
From (Input)
Symbol Parameter To (Output) CL e 15 pF CL e 50 pF Units
3
Logic Diagram
TL/F/6406 – 2
4
Timing Diagrams
Typical Clear, Load, and Count Sequences
TL/F/6406 – 3
Note A: Clear overrides load, data, and count inputs.
Note B: When counting up, count-down input must be high; when counting down, count-up input must be high.
5
Physical Dimensions inches (millimeters)
6
Physical Dimensions inches (millimeters) (Continued)
7
54LS193/DM54LS193/DM74LS193 Synchronous 4-Bit Up/Down Counters with Dual Clock
Physical Dimensions inches (millimeters) (Continued)
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant support device or system whose failure to perform can
into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life
failure to perform, when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can effectiveness.
be reasonably expected to result in a significant injury
to the user.
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.