Ecad Vlsi Syllabus
Ecad Vlsi Syllabus
Ecad Vlsi Syllabus
Course Objectives: this course present the design and implementation of digital circuits at different
levels of designing.
List of Experiments
Design and implementation of the following CMOS digital/analog circuits using Cadence / Mentor
Graphics / Synopsys /Equivalent CAD tools. The design shall include Gate-level design, Transistor-level
design, Hierarchical design, Verilog HDL/VHDL design, Logic synthesis, Simulation and verification,
Scaling of CMOS Inverter for different technologies, study of secondary effects ( temperature, power
supply and process corners), Circuit optimization with respect to area, performance and/or power,
Layout, Extraction of parasitics and back annotation, modifications in circuit parameters and layout
consumption, DC/transient analysis, Verification of layouts (DRC, LVS)
E-CAD programs:
Programming can be done using any complier. Download the programs onto FPGA/CPLD boards and
perform logical verification physically on board apart from verification by simulation with any of the
front end tools.
VLSI programs:
Introduction to layout design rules. Layout, physical verification, placement & route for
complex design, static timing analysis, IR drop analysis and crosstalk analysis of the
following:
1. Basic logic gates
2. CMOS inverter
3. CMOS NOR/ NAND gates
4. CMOS XOR and MUX gates
5. Static / Dynamic logic circuit (register cell)
6. Latch
7. Pass transistor
8. Layout of any combinational circuit (complex CMOS logic gate).
9. Analog Circuit simulation (AC analysis) – CS & CD amplifier
Note: Any SIX of the above experiments from each part are to be conducted (Total 12)
Course Outcomes:
Design any digital circuits and different levels.
Implement any type of digital systems.