HD74LS42

BCD-to-Decimal Decoder
REJ03D0409–0300
Rev.3.00
Jul.22.2005

This monolithic decimal decoder consists of eight inverters and ten four-input NAND gates. The inverters are
connected in pairs to make BCD input data available for decoding by NAND gates. Full decoding of valid input logic
ensures that all outputs remain off for all invalid input conditions.

Features
• Ordering Information

Package Code Package Taping Abbreviation

Part Name Package Type
(Previous Code) Abbreviation (Quantity)
PRDP0016AE-B
HD74LS42P DILP-16 pin P —
(DP-16FV)
PRSP0016DH-B
HD74LS42FPEL SOP-16 pin (JEITA) FP EL (2,000 pcs/reel)
(FP-16DAV)
PRSP0016DG-A
HD74LS42RPEL SOP-16 pin (JEDEC) RP EL (2,500 pcs/reel)
(FP-16DNV)
Note: Please consult the sales office for the above package availability.

Pin Arrangement

0Y 1 16 VCC
0
1Y 2 1 A 15 A

3 2 14
2Y B
3 B Inputs
Outputs 3Y 4 4 13 C
5
4Y 5 C 12 D
6
5Y 6 7 11 9Y
8 D
6Y 7 10 8Y Outputs
9
GND 8 9 7Y

(Top view)

Rev.3.00, Jul.22.2005, page 1 of 6

HD74LS42

Function Table
BCD input Decimal output
No.
D C B A 0 1 2 3 4 5 6 7 8 9
0 L L L L L H H H H H H H H H
1 L L L H H L H H H H H H H H
2 L L H L H H L H H H H H H H
3 L L H H H H H L H H H H H H
4 L H L L H H H H L H H H H H
5 L H L H H H H H H L H H H H
6 L H H L H H H H H H L H H H
7 L H H H H H H H H H H L H H
8 H L L L H H H H H H H H L H
9 H L L H H H H H H H H H H L
H L H L H H H H H H H H H H
H L H H H H H H H H H H H H
H H L L H H H H H H H H H H
Invalid
H H L H H H H H H H H H H H
H H H L H H H H H H H H H H
H H H H H H H H H H H H H H
H; high level, L; low level

Block Diagram

A 0Y
A

A 1Y

2Y

B 3Y
B
Inputs
B 4Y
Outputs
C 5Y
C
C 6Y

D 7Y
D

D 8Y

9Y

Absolute Maximum Ratings

Item Symbol Ratings Unit
Supply voltage VCC 7 V
Input voltage VIN 7 V
Power dissipation PT 400 mW
Storage temperature Tstg –65 to +150 °C
Note: Voltage value, unless otherwise noted, are with respect to network ground terminal.

Rev.3.00, Jul.22.2005, page 2 of 6

HD74LS42

Recommended Operating Conditions

Item Symbol Min Typ Max Unit
Supply voltage VCC 4.75 5.00 5.25 V
IOH — — –400 µA
Output current
IOL — — 8 mA
Operating temperature Topr –20 25 75 °C

Electrical Characteristics
(Ta = –20 to +75 °C)
Item Symbol min. typ.* max. Unit Condition
VIH 2.0 — — V
Input voltage
VIL — — 0.8 V
VCC = 4.75 V, VIH = 2 V, VIL = 0.8 V,
VOH 2.7 — — V
IOH = –400 µA
Output voltage
— — 0.5 IOL = 8 mA VCC = 4.75 V, VIH = 2 V,
VOL V
— — 0.4 IOL = 4 mA VIL = 0.8 V
IIH — — 20 µA VCC = 5.25 V, VI = 2.7 V
Input current IIL — — –0.4 mA VCC = 5.25 V, VI = 0.4 V
II — — 0.1 mA VCC = 5.25 V, VI = 7 V
Short-circuit output
IOS –20 — –100 mA VCC = 5.25 V
current
Supply current ICC** — 7 13 mA VCC = 5.25 V
Input clamp voltage VIK — — –1.5 V VCC = 4.75 V, IIN = –18 mA
Notes: * VCC = 5 V, Ta = 25°C
** VCC is measured with all outputs and all inputs grounded.

Switching Characteristics
(VCC = 5 V, Ta = 25°C)
Item Symbol min. typ. max. Unit Condition
2 Stage — 15 25
tPLH ns
3 Stage — 20 30
Propagation delay time CL = 15 pF, RL = 2 kΩ
2 Stage — 15 25
tPHL ns
3 Stage — 20 30

Rev.3.00, Jul.22.2005, page 3 of 6

HD74LS42

Testing Method
Test Circuit

VCC

4.5V 0 RL
1 Output

See Function Table

A 2
Input 3
B 4
P.G.
Zout = 50Ω 5
C
6 CL
D 7
8
9

Notes: 1. All diodes are 1S2074(H).

2. CL includes probe and jig capacitance.

Waveform

tTLH tTHL

3V
90% 90%
Input 1.3 V 1.3 V
10% 10%
0V
tPLH tPHL

VOH
In phase output 1.3 V 1.3 V
VOL
tPHL tPLH

VOH
Out of phase output 1.3 V 1.3 V
VOL
Note: Input pulse: tTLH ≤ 15 ns, tTHL ≤ 6 ns, PRR = 1 MHz, duty cycle 50%.

Rev.3.00, Jul.22.2005, page 4 of 6

HD74LS42

Package Dimensions
JEITA Package Code RENESAS Code Previous Code MASS[Typ.]
P-DIP16-6.3x19.2-2.54 PRDP0016AE-B DP-16FV 1.05g

16 9

E
1 8
0.89 b3

Reference Dimension in Millimeters

Symbol
Min Nom Max

A
A1
e 1 7.62
D 19.2 20.32
E 6.3 7.4
L

A 5.06
A1 0.51
b p 0.40 0.48 0.56
e bp θ c
b 3 1.30

e1 c 0.19 0.25 0.31

θ 0° 15°
e 2.29 2.54 2.79
Z 1.12
( Ni/Pd/Au plating ) L 2.54

JEITA Package Code RENESAS Code Previous Code MASS[Typ.]

P-SOP16-5.5x10.06-1.27 PRSP0016DH-B FP-16DAV 0.24g

NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
*1
D DO NOT INCLUDE MOLD FLASH.
F 2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
16 9

bp
HE
E

c
*2

Index mark
Reference Dimension in Millimeters
Symbol
Min Nom Max
Terminal cross section D 10.06 10.5
( Ni/Pd/Au plating ) E 5.50
1 8 A2
e *3
Z bp A1 0.00 0.10 0.20
x M
A 2.20
L1 bp 0.34 0.40 0.46
b1
c 0.15 0.20 0.25
c 1
A

θ 0° 8°
HE 7.50 7.80 8.00
θ e 1.27
y
A1

L x 0.12
y 0.15
Detail F Z 0.80
L 0.50 0.70 0.90
L 1 1.15

Rev.3.00, Jul.22.2005, page 5 of 6

HD74LS42

JEITA Package Code RENESAS Code Previous Code MASS[Typ.]

P-SOP16-3.95x9.9-1.27 PRSP0016DG-A FP-16DNV 0.15g

*1
NOTE)
D F 1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
16 9 INCLUDE TRIM OFFSET.

bp

HE
E
Index mark

*2

c
Reference Dimension in Millimeters
Symbol
Min Nom Max
Terminal cross section D 9.90 10.30

( Ni/Pd/Au plating ) E 3.95

A2
1 8
A1 0.10 0.14 0.25
e *3
Z bp A 1.75
x M
L1 bp 0.34 0.40 0.46
b1
c 0.15 0.20 0.25
c 1

θ 0° 8°
A

HE 5.80 6.10 6.20

θ e 1.27

A1
L x 0.25
y y 0.15
Detail F Z 0.635
L 0.40 0.60 1.27
L 1 1.08

Rev.3.00, Jul.22.2005, page 6 of 6

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