ELECTRONICS CIRCUITS II AND SIMULATION LAB

LIST OF EXPERIMENTS

CYCLE I

1. SERIES AND SHUNT FEED BACK AMPLIFIERS

2. DESIGN OF WEIN BRIDGE OSCILLATOR

3. DESIGN OF TRANSISTOR RC PHASE SHIFT OSCILLATOR

4. DESIGN OF LC – HARTLEY AND COLPITTS OSCILLATOR

5. CLASS C TUNED AMPLIFIER

6. INTEGRATORS AND DIFFERENTIATORS

7. CLIPPERS AND CLAMPERS

8. DESIGN OF MONOSTABLE MULTIVIBRATOR

9. DESIGN OF ASTABLE MULTIVIBRATOR

10. DESIGN OF BISTABLE MULTIVIBRATOR

CYCLE II - SIMULATION USING PSPICE

1. DIFFERENTIATE AMPLIFIER

2. ACTIVE FILTER : BUTTERWORTH II ORDER LPF

3. ASTABLE,MONOSTABLE AND BISTABLE MULTIVIBRATOR –

TRANSISTOR BIAS

4. D / A and A/D CONVERTER ( SUCCESSIVE APPROXIMATION )

5. ANALOG MULTIPLIER

6. CMOS INVERTOR , NAND AND NOR

 1. FEED BACK AMPLIFIER

AIM:
To design and test the current series and voltage shunt
Feedback Amplifier and to calculate the following parameters with
and without feedback.
1. Mid band gain.
2. Bandwidth and cutoff frequencies.
3. input and output impedance.

APPARATUS REQUIRED:

S.NO ITEM RANGE Q.TY

1 TRANSISTOR BC 107 1
2 RESISTOR 1
3 CAPACITOR

4 CRO (0-30 )MHz 1

5 RPS (0-30) V 1
6 FUNCTION (0 – 1 )MHZ 1
GENERATOR

CURRENT SERIES FEEDBACK

DESIGN: (Without Feedback ):

Given data : Vcc = 15V , β = 0.9, fL = 1kHz, Ic=1mA.

Stability factor = [2-10], Rs = 680,
Av = 50dB , IE = 1.2mA .
Gain formula is given by
Av = -hfe RLeff / Z i
Assume, VCE = Vcc / 2
RLeff = Rc RL
re = 26mV / IE
hie = β re where re is internal resistance of the
transistor.
hie = hfe re
VE = Vcc / 10
On applying KVL to output loop,
 Vcc = IcRc + VCE + IERE
VE = IERE
Rc = ?
Since IB is very small when compared with IC
Ic approximately equal to IE
RE = VE / IE = ?
VB = VBE + VE
VB = VCC . RB2 / RB1 + RB2
S = 1+ (RB /RE )
RB = ?
RB = RB1 RB2
Find
Input Impedance , Zi = ( RB hie )
Coupling and bypass capacitors can be thus found out.
Input coupling capacitor is given by , Xci = Z i / 10
Xci = 1/ 2fCi
Ci = ?
output coupling capacitor is given by ,
Xco=(Rc RL) / 10
Xc0 = 1/ 2fCo
Co = ?
By-pass capacitor is given by ,XCE = 1/ 2fCE
CE = ?
Design ( With feedback ) :
Remove the emitter capacitance ( CE )
β = -1 / RE
Gm = - hfe/ [(hie + RE ) RB]
 D = 1+ β Gm
Gmf = Gm / D
Zif = Z iD
Zof = ZoD
CIRCUIT DIAGRAM: WITHOUT FEEDBACK:
+VCC

R1 Rc Co
Cin
B

BC107
E RL
CRO Vo
CE
Vin R2 RE
F = 1 KHz

WITH FEEDBACK:

+VCC

RB1 Rc Co

Cin
BC107
B
RL CRO

Vin RB2
RE
Voltage shunt DESIGN: (Without Feedback ):

Given data : Vcc = 15V , fL = 1kHz, Ic=1mA.

Stability factor = [2-10], Rs = 680,
Av =40 dB .
Gain formula is given by
Av = -hfe RLeff / Z i
Assume, VCE = Vcc / 2
RLeff = R c   RL
re = 26mV / IE
hie = β re where re is internal resistance of the
transistor.
hie = hfe re
VE = Vcc / 10
On applying KVL to output loop,
Vcc = IcRc + VCE + IERE
VE = IERE
Rc = ?
Since IB is very small when compared with Ic
Ic approximately equal to IE
RE = VE / IE = ?
VB = VBE + VE
VB = VCC . RB2 / RB1 + RB2
S = 1+ RB / RE
RB =?
RB = RB1 RB2
Find
Input Impedance, Zi = (RB  hie )
 Coupling and bypass capacitors can be thus found out.
Input coupling capacitor is given by , Xci = Z i / 10
Xci = 1/ 2f Ci
Ci = ?
output coupling capacitor is given by ,
X co=(Rc | | RL) / 10
Xc0 = 1/ 2f Co
Co =?
By-pass capacitor is given by, XCE = 1/ 2f CE
CE =?
Design ( With feedback ) :
Connect the feedback resistance (Rf) and feedback
capacitor (Cf) as shown in the figure.
Xcf = Rf / 10
Cf = Rf / 2πf x 10
Assume, Rf = 68 K
β = -1 / Rf
Trans – resistance Rm = - hfe (RB| | Rf ) (Rc | | Rf ) / (RB| | Rf ) + hie
D = 1+ β Rm
Avf = Rmf / Rs Rmf = Rm / D
Zif = Zi / D
Zof = Zo / D
CIRCUIT DIAGRAM: Voltage shunt feedback
WITHOUT FEEDBACK:

+VCC

R1 Rc Co
Cin
B

BC107
E RL
CRO Vo
CE
Vin R2 RE
F = 1 KHz

WITH FEEDBACK:
+VCC

RB1 RF Rc Co

RS Cin
BC107
B
RL CRO

Vin RB2
RE
 MODEL GRAPH(WITH & WITHOUT FEEDBACK)

Without feedback
3 dB
GAIN
(db) 3dB With feedback

f3 f1 f2 f4 f(Hz)

f2 – f1 = Bandwidth of without feedback circuit

f4 – f3 = Bandwidth of with feedback circuit
THEORY:
An amplifier whose function fraction of output is fed
back to the input is called feed back amplifier. Depending
upon whether the input is in phase or out of phase with the
feed back signal, they are classified in to positive feed back
and negative feed back. If the feed back signal is in phase
with the input, then the wave will have positive gain. Then
the amplifier is said to have a positive feed back.
If the feed back signal is out of phase with the input
,then the wave will have a negative gain. The amplifier is
said to have a negative feed back. The values of voltage
gain and bandwidth without feed back.

PROCEDURE:

The connections are made as shown in the circuit. The

amplifier is checked for its correct operation .Set the input
voltage to a fixed value. Keeping the input voltage Vary the
input frequency from 0Hz to 1MHz and note down the
corresponding output voltage. plot the graph : gain (dB) vs
frequency .Find the input and output impedances. Calculate
the bandwidth from the graph. Remove RE and follow the
same procedure.
OBSERVATION:
WITH OUT FEEDBACK
Vin = ------------ Volts
S.NO FREQUNCY O/P
voltage Gain
Vo
Av=20 log Vo/Vi

WITH FEEDBACK
S.NO FREQUNCY O/P
voltage Av=20 log Vo/Vi

RESULT:

Theoritical Practical
With F/B Without With F/B Without
F/B F/B
Input Impedance
Output
impedance
Bandwidth
Transconductance
(gm)

2. WEIN BRIDGE OSCILLATOR

 Aim : To Design and construct a Wein – Bridge Oscillator for a
given cut-off frequency .

APPARATUS REQUIRED:

S.NO ITEM RANGE Q.TY

1 TRANSISTOR BC107 2
2 RESISTOR
3 CAPACITOR

4 CRO - 1
5 RPS DUAL(0-30) V 1

CIRCUIT DIAGRAM:
R1 RC! CC2
R3 Rc2

+ -

Cc
R2
R4 RE2
CE

DRB
R

GND

MODEL GRAPH:

Design
 Given : Vcc = 12V , fo = 2 KHz, Ic1= Ic2 = 1mA.; Stability
factor = [0-10],
fL = 100Hz
When the bridge is balanced,
fo = 1/ 2πRC
Assume, C = 0.1μF
Find, fo = ?
Given data : Vcc = 15V , fL = 50Hz, Ic1= Ic2 = 1mA.; AvT = 3 ;
Av1 =2; Av2 = 1;
Stability factor = [10]
Gain formula is given by
Av = -hfe RLeff / Zi
RLeff = R c2   RL
hfe2 = 200 (from multimeter )
re2 = 26mV / IE2 = 26
hie2 = hfe2 re 2 = 200 x 26 = 5.2kW
From dc bias analysis , on applying KVL to the outer loop, we get
Vcc = Ic2Rc2 + VCE2+VE2
VcE2 = Vcc/2 ; VE2 = Vcc / 10 ; Ic2 = 1mA
Rc2 = ?
Since IB is very small when compared with Ic
Ic approximately equal to IE
Av2 = -hfe2 RLeff / Zi2
Find RL|| Rc2 from above equation
Since Rc2 is known , Calculate RL.
VE2 = IE2RE2
Calculate RE2
S = 1+ RB2 / RE2
 RB 2 =?
RB 2 =R3 || R4
VB2 = VCC . R4 / R3 + R4
VB2 = VBE2 + VE2
R3 =?
Find R4
Zi2 = (RB2  hie2 )
Zi2 = ?
Rleff1 = Zi2 Rc1
Find Rleff1 from the gain formula given above
Av1 = -hfe1 RLeff 1/ Zi1
RLeff1 = ?
On applying KVL to the first stage, we get
Vcc = Ic1 Rc1 + VCE1 +VE1
VCE1 = VCC / 2 ; VE1 = VCC / 10
Rc1 = ?
Find Ic1 approximately equal to IE1
R6 = RE1=?
S = 1+ RB1 / RE1
RB 1 =?
RB 1 =R1 || R2
VB1 = VCC . R2 / R1 + R2
VB1 = VBE2 +VE2
Find R1 = ?
Therefore find R2 = ?
Zi1 = (RB1  hie1 )
R5 = RL – R6
Coupling and bypass capacitors can be thus found out.
Input coupling capacitor is given by , Xci = Z i / 10
Xci = 1/ 2f Ci
Ci = ?
output coupling capacitor is given by ,
X co=(Rc2 | | RL2) / 10
Xc0 = 1/ 2f Co
Co =?
By-pass capacitor is given by, XCE = RE2 / 10
XCE 1/ 2f CE2
CE =?

THEORY:

In wein bridge oscillator, wein bridge circuit is connected

between the amplifier input terminals and output terminals. The
bridge has a series rc network in one arm and parallel network in
the adjoining arm. In the remaining 2 arms of the bridge resistors
R1and Rf are connected . To maintain oscillations total phase
shift around the circuit must be zero and loop gain unity. First
condition occurs only when the bridge is balanced . Assuming
that the resistors and capacitors are equal in value, the resonant
frequency of balanced bridge is given by

Fo = 0.159 RC

PROCEDURE:
 1. The circuit is constructed as per the given circuit
diagram.
2. Switch on the power supply and observe the output on
the CRO( sine wave)
3. Note down the practical frequency and compare it with
the theoretical frequency.

RESULT :

Theoritical Practical
Frequency f = 1 / 2  RC

3. TRANSISTOR PHASE SHIFT OSCILLATOR

AIM:
 To design and construct the transistor Phase shift oscillator.
APPARATUS REQUIRED:

S.NO ITEM RANGE Q.TY

1 TRANSISTOR BC 107 1
2 RESISTOR
3 CAPACITOR
4 CRO ( 0 – 30 ) MHz 1
5 RPS (0-30) V 1
6 FUNCTION (0-1 )MHz 1
GENERATOR

CIRCUIT DIAGRAM:

MODEL GRAPH:

DESIGN:
 Given : Vcc = 12V , fo = 1 KHz,C = 0.01µF; IE = 5mA.;
Stability factor = 10
f = 1/ 2πRC Find R
R1 = (Ri – R)
R >> Rc
Βeta = -1 / 29
Amplifier Design :
Gain formula is given by
Av = -hfe RLeff / hie ( Av = 29, design given )
Assume, VCE = Vcc / 2
RLeff = R c   RL
re = 26mV / IE
hie = β re where re is internal resistance of the
transistor.
hie = hfe re
VE = Vcc / 10
On applying KVL to output loop,
Vcc = IcRc + VCE + IERE
VE = IERE
Rc = ?
Since IB is very small when compared with Ic
Ic approximately equal to IE
RE = VE / IE = ?
VB = VBE + VE
VB = VCC . RB2 / RB1 + RB2
S = 1+ RB / RE
RB =?
RB = RB1 RB2
 Find RB1 & RB2
Input Impedance, Zi = (RB  hie )
Coupling and bypass capacitors can be thus found out.
Input coupling capacitor is given by , Xci = Z i / 10
Xci = 1/ 2f Ci
Ci = ?
output coupling capacitor is given by ,
Xc0 = 1/ 2f Co
Co =?
By-pass capacitor is given by, XCE = 1/ 2f CE
CE =?
THEORY:
The Transistor Phase Shift Oscillator produces a sine wave
of desired designed frequency. The RC combination will give a
60 phase shift totally three combination will give a 180 phase
shift. . The BC107 is in the common emitter configuration.
Therefore that will give a 180 phase shift totally a 360 phase
shift output is produced. The capacitor value is designed in order
to get the desired output frequency. Initially the C and R are
connected as a feedback with respect to input and output and this
will maintain constant sine wave output. CRO is connected at the
output.
PROCEDURE:
1. The circuit is constructed as per the given circuit diagram.
2. Switch on the power supply and observe the output on the
CRO( sine wave)
3. Note down the practical frequency and compare it with the
theoretical frequency.
RESULT :
Theoritical Practical
Frequency f = 1 / 2  RC 6RC

4. LC OSCILLATOR – HARTLEY and COLPITT OSCILLATOR

AIM :
To Design and construct the given Oscillator at the given
operating frequency.
APPARATUS REQUIRED:
S.NO ITEM RANGE Q.TY
1 TRANSISTOR BC 107 1
2 RESISTOR 1

3 CAPACITOR
4 CRO (0 – 30)MHZ 1
5 RPS (0-30) V 1

6 FUNCTION (0- 1 ) MHz 1

GENERATOR
7 DlB, DRB 1
CIRCUIT DIAGRAM :
+VCC

RB1 Rc Co
C
Cin B
BC107
E
RL
CRO
RB2
RE CE

+ L1 - - L2 +

CIRCUIT DIAGRAM:
 +VCC

RB1 RC
0 .01F
Cin C
B
BC107
RL
E
CRO
RE CE
RB2

C1 C2

MODEL GRAPH:

Design of Feedback Network ( Hartely Oscillator ) :

Given : L1 = 1mH ; f = 800kHz; Vcc = 12V ; Av =50 ; fL = 1Khz
Av = 1 / β = -L1 / L2
F = 1/2π√(L1 + L2)C; C=?
Design of Feedback Network ( Colpitt Oscillator ) :
 Given : C1 = 0.1μF;f =800kHz; Vcc = 12V ; Av = 50 ; S = 10
IE = 5mA; fi = 1kHz
Av = Av = 1 / β = C2 / C1
f = 1/2π√(C1 + C2) / LC1C2
L=?
Amplifier Design :
Gain formula is given by
Av = -hfe RLeff / hie ( Av = 29, design given )
Assume, VCE = Vcc / 2
RLeff = R c   RL
re = 26mV / IE
hie = β re where re is internal resistance of the
transistor.
hie = hfe re
VE = Vcc / 10
On applying KVL to output loop,
Vcc = IcRc + VCE + IERE
VE = IERE
Rc = ?;RL = ?
Since IB is very small when compared with Ic
Ic approximately equal to IE
RE = VE / IE = ?
VB = VBE + VE
VB = VCC . RB2 / RB1 + RB2
S = 1+ RB / RE
RB =?
RB = RB1 RB2
Find RB1 & RB2
 Input Impedance, Zi = (RB  hie )
Coupling and bypass capacitors can be thus found out.
Input coupling capacitor is given by , Xci = Z i / 10
Xci = 1/ 2f Ci
Ci = ?
output coupling capacitor is given by ,
Xc0 = (Rc ‫׀׀‬RL) / 10
Xc0 = 1/ 2f Co
Co =?
By-pass capacitor is given by, XCE = RE / 10
XCE = 1/ 2f CE
CE =?
THEORY:
LC oscillator consisting of a tank circuit for generating
sine wave of required frequency. Rectifying Barkhausen
criteria A for a circuit containing reactance A must be
positive and greater than or equal to unity.
PROCEDURE :
1. The circuit connection is made as per the circuit
diagram.
2. Switch on the power supply and observe the output
on the CRO(sine wave ).
3. Note down the practical frequency and compare it
with the theoretical frequency.
THEORETICAL FREQUENCY FOR HARTLEY OSCILLATOR:

THEORETICAL FREQUENCY FOR COLPITT OSCILLATOR:

fc = 1/2π√(C1 + C2) / LC1C2

PRACTICAL :
Observed Values:
Time Period =
Frequency =

RESULT :
Thus the LC oscillator is designed for the given
frequency and the output response is verified.

Theoritical Practical
Frequency Hartley Colpitt Hartley Colpitt

5. CLASS C SINGLE TUNED AMPLIFIER

AIM:
 To study the operation of class c tuned amplifier.
APPARATUS REQUIRED:
S.NO ITEM RANGE Q.TY
1 TRANSISTOR BC 107 1
2 RESISTOR 4.2K, 500, 197K, 2.2K, 1
3 CAPACITOR 0.1f 2
0.001f, 100f 1
4 CRO - 1
5 RPS (0-30) V 1
6 FUNCTION - 1
GENERATOR

+VCC = 10 V

CIRCUIT DIAGRAM:
10F
10K

47K

47F C
B 100K
CRO
BC107

Vin = 1 V 120K 2.2k +

F = 1 KHz 100F
-

MODEL GRAPH:
THEORY:
The amplifier is said to be class c amplifier if the Q Point and the
input signal are selected such that the output signal is obtained
for less than a half cycle, for a full input cycle Due to such a
selection of the Q point, transistor remains active for less than a
half cycle .Hence only that much Part is reproduced at the output
for remaining cycle of the input cycle the transistor remains cut
off and no signal is produced at the output .the total
Angle during which current flows is less than 180 ..This angle is
called the conduction angle, Qc

PROCEDURE:
1.The connections are given as per the circuit diagram.
2. Connect the CRO in the output and trace the waveform.
3.calculate the practical frequency and compare with the
theoretical Frequency
4.plot the waveform obtained and calculate the bandwidth

RESULT:
Thus a class c single tuned amplifier was designed and its
bandwidth is Calculated.

6. INTEGRATOR USING OP-AMP

AIM:
To study the output waveform of integrator using op-amp.

APPARATUS REQUIRED:
APPARATUS NAME RANGE QUANTITY
AUDIO OSCILLATOR 1
CRO 1
RESISTORS 1K,10K 1
CAPACITOR 0.1F 1
OP-AMP IC741 1
BREADBOARD
RPS

THEORY:
A simple low pas RC circuit can also work as an integrator when
time constant is very large. This requires very large values of R and
C.The components R and C cannot be made infinitely large because of
practical limitations. However in the op-amp integrator by MILLER’s
theorem, the effective input capacitance becomes C f (1-Av), where Av is
the gain of the op-amp. The gain A v is the infinite for an ideal op-amp, so
the effective time constant of the opamp integrator becomes very large
which results perfect integration.

PROCEDURE:

1.Connections are given as per the circuit diagram.

2.The resistance Rcomp is also connected to the (+) input terminal
to minimize the effect of the input bias circuit.
3.It is noted that the gain of the integrator decreases with
increasing frequency.
4.Thus the integrator circuit does not have any high frequency
problem.
CIRCUIT DIAGRAM: 0.1F

10k
+Vcc=12V

2 7
-

3 IC741

+ CR
4 O

-Vee=-12V

1k

MODEL GRAPH:
Vi

t (msec)

Vo t(msec)

RESULT:- Thus the integrator using op-amp is studied.

7.CLIPPER & CLAMPER CIRCUITS
AIM : To observe the clipping waveform in different clipping
configurations.

APPARATUS REQUIRED :

S.NO ITEM RANGE Q.TY

1 DIODE IN4001 1
2 RESISTOR 1K 1
10 K 1

3 CAPACITOR 0.1µF 1

4 FUNCTION (0-1) MHz 1

GENERATOR
5 CRO - 1

CLIPPER CIRCUIT DIAGRAM :

 1KOHM

IN4001
Vout
1KHz
5V 2V

1KOHM

IN4001
Vout
1KHz
5V 2V

Procedure :
1. Connections are given as per the circuit .
2. Set input signal voltage (5v,1kHz ) using function
generator.
3. Observe the output waveform using CRO.
4. Sketch the observed waveform on the graph sheet.

CLAMPING CIRCUITS

Aim:
To study the clamping circuits
(a). Positive clamper circuit (b) Negative clamper circuit
APPARATUS REQUIRED :

S.NO ITEM RANGE Q.TY

1 DIODE IN4001 1
2 RESISTOR 1K 1
10 K 1

3 CAPACITOR 0.1µF 1

4 FUNCTION (0-1) MHz 1

GENERATOR
5 CRO - 1

DESIGN :

Given f = 1kHz
T = 1 / f = 1x 10- 3 Sec RC
Assuming, C = 0.1µF
R = 10 K

Circuit Diagram : Positive clamper

C =0.1µF

I/P IN4001 10K o/p Vo

Negative clamper

C = 0.1µF

I/P IN4001 10K o/p Vo

Procedure :
1.Connections are given as per the circuit .
2. Set input signal voltage (5v,1kHz ) using function
generator.
3. Observe the output waveform using CRO.
4. Sketch the observed waveform on the graph sheet.

Result :
Thus the waveforms are observed and traced .for clipper
and clamper circuits .
 8. MONOSTABLE MULTI VIBRATOR
AIM:
To Design the monostable multivibrator and plot the
waveform.

APPARATUS REQUIRED:

S.NO ITEM RANGE Q.TY

1 IC NE555 1
2 RESISTOR 9K 1

3 CAPACITOR 0.01F 1
0.1F 1
4 RPS (0-30) V 1
5 CRO - 1

THEORY:
A monostable multivibrator has one stable state
and a quasistable state. When it is triggered by an
external agency it switches from the stable state to
quasistable state and returns back to stable state. The
time during which it states in quasistable state is
determined from the time constant RC. When it is
triggered by a continuous pulse it generates a square
wave. Monostable multi vibrator can be realized by a pair
of regeneratively coupled active devices, resistance
devices and op-amps.
DESIGN :
Given Vcc = 12V ; VBB = - 2 V; Ic = 2 mA; VCE(sat) = 0.2 V ; h FE =
200 ;
f = 1kHz.
RC = VCC – VCE(sat) / IC = 12 – 0.2 / 2x 10 –3 = 5. 9 K
IB 2(min) = Ic2 / hfe = 2mA / 200 = 10 A
Select IB 2 > IB 1(min) (say 25 A )
Then R = VCC – VBE(sat) / I B 2 = 12 – 0.7 / 25 x 10 -6 = 452 K
T = 0.69 RC
1x10-3 = 0.69 x 452 x 10 3
C
C = 3.2 nF
VB1 = VBB R1 / R1 + R2 + VCE(sat) R2 / R1+R2
Since Q1 is off state, VB1 less than equal to 0.
Then VBB R1 / R1 + R2 = VCE(sat) R2 / R1+R2
VBB R1 = VCE(sat) R2
2R1 = 0.2R2
Assume R1 = 10 K. Then R2 = 100 K
C1 = 25pF( Commutative capacitor )
procedure :
1. Connect the circuit as per circuit diagram.
2. Switch on the regulated power supply and observe the
output waveform at
the collector of Q1 and Q2 and plot it.
3. Trigger the monostable multivibrator with a pulse and
observe the change in waveform.
 4. Plot the waveform and observe the changes before and
after triggering the input to the circuit.
CIRCUIT DIAGRAM :

+ VCC = +12v

5.9K 452k 5.9k

10k
3.2nf

22pf
C C
B B B
Vo1 BC107 BC107 V O2

E 100k E
-VBB

PROCEDURE:
The connections are made as per the diagram.
The value of R is chosen as 9k. The DCB is set to the
designed value. The power supply is switched on and set
to +5V.
The output of the pulse generator is set to the desired
frequency. Here the frequency of triggering should be
greater than width of ON period (i.e.) T >W. The output is
observed using CRO and the result is compared with the
theoretical value. The experiment can be repeated for
different values of C and the results are tabulated.
OBSERVATION

C (uf) Theoritical(T=1.095 RC(ms))) Practical

T(ms)

RESULT: Thus the monostable multivibrator using IC555 is

designed and its output waveform is traced.
 9.ASTABLE MULTIVIBRATOR
AIM :
To design a astable multivibrator and study the
waveform.
APPARATUS REQUIRED :

S.NO ITEM RANGE Q.TY

1 TRANSISTOR BC107 2
2 RESISTOR 980K 2
4.9K 2

3 CAPACITOR 0.74nF 2

4 RPS (0-30) V 1
5 CRO - 1

THEORY :

Astable multivibrator has no stable state, but has two

quasi – stable states. The circuit oscillates between the
states (Q1 ON , Q2 OFF) and (Q2 ON , Q! OFF). The output
at the collector of each transistor is a square wave.
Therefore this circuit is applied as a square wave
generator. Refer to the fig each transistor has a bias
resistance RB and each base is capacitor coupled to the
collector of other transistor. When Q1 is ON and Q2 is
OFF, C1 is charged to ( Vcc – VBE1) positive on the right
side. For Q2 ON and Q! OFF, C2 is charged to (Vcc – VBE2)
positive on the left side.
CIRCUIT DIAGRAM : + VCC = +10v

4.9K 980K 980K 4.9K

0.74nF 0.74nF

C C
B B
Vo1 BC107 BC107 V O2

E E

Design
Given Vcc = 10V ; Ic = 2 mA; h FE = 200 ; f = 1 kHz
R  h FE Rc
RC = VCC – VC2(sat) / IC = 10 – 0.2 / 2x 10 –3 =4. 9 K
R  200 x 4.9 x 103 = 980 K
T = 1.38 RC
1 x 10-3 = 1.38 x 980 x 103 x C
C =0.74 nF
Waveforms :

PROCEDURE :
1. The connections are given as per the circuit
diagram.
2. Switch on the power supply.
3. Observe the waveform both at bases andcollectors
of Q1 and Q2.
4. Connect the CRO in the output of Q1 and Q2 and
trace the square waveform.
RESULT :
 Thus the square wave forms are generated using
astable multivibrator.

10.BISTABLE MUITIVIBRATOR

AIM:
To design a bistable multivibrator and study the output
waveform.

Apparatus Required:

S.NO ITEM RANGE Q.TY

1 TRANSISTOR BC 107 1
2 RESISTOR 4.7K 2
22K 2

3 CAPACITOR 0.022f 2
10f 2
100Pf 2
4 CRO - 1
5 RPS (0-30) V 1
6 FUNCTION - 1
GENERATOR

THEORY:
The bistable multivibrator is a switching circuit with a
two stable state either Q1 is on and Q2 is off (or)Q2 is on and Q1
is off. The circuit is completely symmetrical. load resistors RC 1
and RC2 all equal and potential
Divider (R1,R2)and (R1 andR2 ) from identical bias Network at the
transistor bases. Each transistor is biased from the collector of
the other
Device when either transistor is ON and the other transistor is
biased OFF.C1andC2 operate as speed up capacitors or memory
capacitors.
Design :
Given Vcc = 12V ; VBB = -12v; Ic = 2mA; VC(sat) = 0.2 V
VBE(sat) = 0.7V
Assume Q1 is cut-off Vc1 = VCC(+12V)
Q2 is in saturation (ON) Vc2 = Vc(sat) (0.2 V)
Using superposition principle,
VB1 = VBB[ R1 / R1 + R2 ] + Vc2[ R2 / R1+R2 ] << 0 .7
Let us consider VB1 = -1V
Then -1 = [-12R1/R1+R2 ] + [ 0.2R2 / R1+R2 ]
Assume R1 = 10K such that it ensures a loop gain in excess of unity
during the transition between states. The inequality
R1 < hfe Rc
R2 = 91.67 K
Test for conditions : Q1 = cut-off (Vc1 = 12V )
Q2 = Saturation / (ON) (VC2 = 0.2V)
Minimum base current, IB (min) must be less than the base current (IB)
i.e.,
IB (min) < IB
Calculate hfe from multimeter (say = 200)
IB 2(min) = Ic2 / hfe
Ic2 = Ic – I3
Ic2 = ( 2 – 0.12 )mA = 1.88 mA
IB 2(min) = 1.88mA / 200 = 9.4 A
IB 2 = I 1 – I2
IB 2 = (0.71 – 0.14 )mA = 0.57 mA
 Since IB 2 > IB 2(min) ,Q2 is ON
C1 = 25 pF ( Commutative capacitor )
IC = VCC – Vc2 / RC
RC = VCC – Vc2 / IC = 12 – 0.2 / 2x 10 –3 = 5.9 K
I3 = Vc2 - VBB / R1 + R2 = 0.2 + 12 / ( 10 + 91.6 )K = 0.12mA
I1 = Vc1 - VBE / RC + R1 = 12 – 0.7 / ( 5.9 + 10 ) K = 0.71mA
I2 = VBE - VBB / R2 = 0.7 + 12 / 91.6K = 0.14 mA
Procedure :
1. Connect the cir cuit as per circuit diagram.
2. Switch on the regulated power supply and observe the output
waveform at the collector of Q1 and Q2.
3. Sketch the waveform.
4. Apply a threshold voltage and observe the change of states of Q1
and Q2.
5. Sketch the waveform.

CIRCUIT DIAGRAM :
+ Vcc = +12 V

5.9K 5.9K
I1 I3
10 K 10K
 50pF 50pF

C C CR
CR B B O
O BC107
22 BC107
91.67k E
10 E I4 I2 91.67k 10mF

TRIGGER
TRIGGER IP
-VBB

OBSERVATION :

VOLTAGE Time Period Frequency Amplitude

VC1

Vc2

RESULT:

Thus the bistable multivibrator is designed and the

square waveforms are generated at the output.

CYCLE II
SIMULATION LAB

1. Differential Amplifier
 Aim : Calculate the dc voltage gain , the input resistanceand the
output resistance of a differential amplifier with a transistor
current source.
Specifications: The input voltage is 0.1v. The model parameters
of the bipolar transistors are BF = 50,RB = 70, RC = 40.

Circuit Diagram :

R 2 R 3
10K 10K

V2
Q 1A 12v
R 1 Q 1A

R 7
1 .5 k R 6
20K
1 .5 K

V1 R 4 R 5 0
150 K 150K
0
0

Q 1A V3
12v

Q 1A Q 1A

Program :

Vcc 11 0 12v
VEE 0 10 12v
VIN 1 0 DC 0.25v
RC1 11 3 10k
RC2 11 5 10k
RE1 4 12 150
RE2 7 12 150
RS1 1 2 1.5k
RS2 6 0 1.5k
Rx 11 8 20k

Q1 3 2 4 QN
Q2 5 6 7 QN
Q3 12 8 9 QN
Q4 9 9 10 QN
Q5 8 9 10 QN

. TF V (3,5) VIN
END
The results of the transfer – function analysis by the .TF
commands are given below

ACTIVE LOW BUTTER FILTER

 R 1
0
1k 0 .5 8 6 R F
VC C
0
12VD C

7
3 5
+ O S2

V+
1K R 2 1K R 3 6
O U T
2 1
- O S1

V-
uA741
1 V A C 0 V D C V IN VEE

4
C 1 C 2 0
12VD C
1n 1n
0
0

PROGRAM:

LOW PASS FILTER

VCC 6 0 DC 12V
VEE 0 7 DC 12V
VIN 1 0 AC 1V
R1 4 0 1K
R2 1 2 1K
R3 2 3 1K
RF 4 5 0.586K
C2 2 5 0.079 UF
C3 3 0 0.079UF
X1 4 3 6 7 5 UA 741
.LIB NOB .LIB
.AC DEC 10HZ 100HZ 1MEGHZ
.PROBE
.END

PROGRAM FOR FREE RUNNING MULTIVIBRATOR

VCC 6 0 DC 12V
VEE 0 7 DC 12V
R1 1 0 100K
R2 2 3 100K
R3 2 3 10K
C1 3 0 0.1 UF IC = -5V
XA1 1 3 6 7 2 UA741
.LIB EVAL .LIB
.TRANS 10US 4MS UIC
.PROBE
.END

100K R 2

VC C 0
U 2 7 12V
3 5
+ O S2
V+

100K R 1 6
O U T
2 1
- O S1
V-

AD 741
4

VEE VO T
0
-1 2 V

10K R 3

0 .1 U F C 1

A CMOS INVERTER
 VDD 2 0 5V
VIN 1 0 DC 5V PULSE (0 5V 0 1NS 1NS 20US 40US)
RL 3 0 100k
M1 3 1 2 2 PMOD L=1U W= 20U
M2 3 1 0 0 NMOD L=1U W= 5U
.TRAN 1US 80US
.TF V(3) VIN
.OP
.PLOT TRAN V(3) V(1)
.PROBE
.END

2 VDD = 5

PMOS M1

3
1

NMOS M2
RL 100K

ANALOG MULTIPLIER

V1 1 0 1V
V2 4 0 1V
R1 1 2 1K
R2 4 5 1K
R3 3 7 1K
R4 6 7 1K
R5 7 8 1K
R6 10 0 1K
D1 2 3 DA
D2 5 6 DA
D3 8 9 DA
.MODEL DA D
X1 2 0 3 IOP
X2 5 0 6 IOP
X3 7 0 8 IOP
X4 9 0 10 IOP
.SUBCKT IOP M P V0
RI M P 1G
E V0 0 P M 2E5
.ENDS
.DC V1 -1 1 0.1
.PROBE
.END

R 17 U 2
7

3 5
+ O S2
V+

V8 R 26
0V 1k
6
O U T R 26
1k
2 1
- O S1
V-

U 2
7

0 1k
AD 741 3 5
+ O S2
V+

D 1 U 2
7
4

6 1 2 3 5
O U T + O S2
V+

0 1N 4376
2 1 6
- O S1 O U T
V-

AD 741 2 1
- O S1
V-
4

AD 741
R 27
4

R 17 U 2
7

3 5 1k
+ O S2
V+

V8
0V 1k 0
6
O U T
2 1 0
- O S1
V-

0 AD 741 0
4