MAX16814 Integrated, 4-Channel, High-Brightness LED Driver With High-Voltage DC-DC Controller
MAX16814 Integrated, 4-Channel, High-Brightness LED Driver With High-Voltage DC-DC Controller
MAX16814 Integrated, 4-Channel, High-Brightness LED Driver With High-Voltage DC-DC Controller
Electrical Characteristics
(VIN = VEN = 12V, RRT = 12.25kI, RSETI = 15kI, CVCC = 1FF, VCC = VDRV, NDRV = COMP = OUT_ = unconnected, VRSDT = VDIM
= VCC, VOVP = VCS = VLEDGND = VPGND = VSGND = 0V, TA = TJ = -40NC to +125NC for MAX16814A_ _, TA = -40NC to +85NC for
MAX16814BE_ _, and TA = TJ = 0NC to +85NC for MAX16814U_ _ and MAX16814BU_ _, unless otherwise noted. Typical values are at
TA = +25NC.) (Note 2)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Operating Voltage Range VIN 4.75 40 V
MAX16814A_ _ and MAX16814U_ _ 2.5 5
Active Supply Current IIN mA
MAX16814B_ _ _ only 2.75 5.5
Standby Supply Current VEN = 0V 15 40 μA
IN Undervoltage Lockout VIN rising 3.975 4.3 4.625 V
IN UVLO Hysteresis 170 mV
VCC REGULATOR
6.5V < VIN < 10V, 1mA < ILOAD < 50mA
Regulator Output Voltage VCC 4.75 5.0 5.25 V
10V < VIN < 40V, 1mA < ILOAD < 10mA
Dropout Voltage VIN - VCC, VIN = 4.75V, ILOAD = 50mA 200 500 mV
Short-Circuit Current Limit VCC shorted to SGND 100 mA
VCC Undervoltage Lockout
VCC rising 4 V
Threshold
VCC UVLO Hysteresis 100 mV
RT OSCILLATOR
Switching Frequency Range fSW 200 2000 kHz
MAX16814 toc02
CNDRV = 13pF TA = +125NC
3.6
VLX
10V/div 3.4
0V
3.2 TA = +25NC
IIN (mA)
IOUT1
100mA/div
3.0
0A TA = -40NC
VOUT 2.8
10V/div
2.6
FIGURE 2
0V 2.4
40Fs/div 5 10 15 20 25 30 35 40 45
VIN (V)
MAX16814 toc05
MAX16814 toc04
MAX16814 toc03
CNDRV = 13pF
308
4.2
306 1.236
SWITCHING FREQUENCY (kHz)
4.0 304
302 1.232
VSETI (V)
3.8
IIN (mA)
300
3.6 298 1.228
3.4 296
294 1.224
3.2
292
3.0 290 1.220
200 400 600 800 1000 1200 1400 1600 1800 2000 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
fSW (kHz) TEMPERATURE (NC) TEMPERATURE (NC)
MAX16814 toc07
MAX16814 toc08
VEN = 2.5V
1.233
120
EN THRESHOLD VOLTAGE (V)
1.231 1.20
VEN FALLING 60
1.230
1.15
30
1.229
1.228 1.10 0
20 46 72 98 124 150 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
LED STRING CURRENT (mA) TEMPERATURE (NC) TEMPERATURE (NC)
VCC LINE REGULATION VCC LOAD REGULATION SWITCHING FREQUENCY vs. 1/RT
5.08 5.10 2.00
MAX16814 toc11
MAX16814 toc10
MAX16814 toc09
5.08 1.80
5.06
1.20
5.02 5.00
1.00
4.98
5.00 TA = -40NC 0.80
4.96
4.94 TA = -40NC 0.60
4.98
4.92 0.40
IOUT_ IOUT1
100mA/div 100mA/div
0A 0A
VLED
VLED 10V/div
20V/div
FIGURE 2
0V 0V
40ms/div 40ms/div
20V/div
0V
1.3
VDIM
pMOS
ON-RESISTANCE (I)
5V/div
0V 1.1
IOUT1
100mA/div
0A 0.9
nMOS
VLED
10V/div 0.7
FIGURE 2
0V 0.5
40ms/div -50 -25 0 25 50 75 100 125
TEMPERATURE (NC)
LED CURRENT SWITCHING WITH DIM LED CURRENT RISING AND FALLING
AT 5kHz AND 50% DUTY CYCLE WAVEFORM
MAX16814 toc16 MAX16814 toc17
FIGURE 2
IOUT1 VDIM
100mA/div 5V/div
0A 0V
IOUT2
100mA/div
0A
IOUT3 ILED
100mA/div 50mA/div
0A 0A
IOUT4
100mA/div FIGURE 2
0A
100Fs/div 4Fs/div
MAX16814 toc19
VDIM = 0V
140
COMP LEAKAGE CURRENT (nA)
0.8
120
0.6
IOUT_ (mA)
100
VCOMP = 4.5V
80
0.4
VCOMP = 0.5V
60
0.2
40
20 0
0.010 0.025 0.040 0.055 0.070 0.085 0.100 -50 -25 0 25 50 75 100 125
1/RSETI (mS) TEMPERATURE (NC)
MAX16814 toc21
MAX16814 toc22
VDIM = 0V
VOUT = 40V 1.8 VOVP = 1.25V
1.6
OUT_ LEAKAGE CURRENT (nA)
200
10 1.4
1.2
VRSDT = 0.5V
1.0 150
0.8
1
0.6
100
0.4
VRSDT = 2.5V
0.2
0.1 0 50
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
TEMPERATURE (NC) TEMPERATURE (NC) TEMPERATURE (NC)
Pin Configurations
LEDGND
TOP VIEW
OUT4
OUT3
OUT2
OUT1
TOP VIEW
+ 15 14 13 12 11
NDRV 1 20 PGND
DRV 2 19 CS DIM
CS 16 10
VCC 3 18 OUT4
MAX16814 PGND 17 9 SGND
IN 4 17 OUT3
RT 7 14 OUT1 EP*
VCC 20 6 OVP
FLT 8 13 DIM
OVP 9 12 SGND 1 2 3 4 5
IN
EN
COMP
RT
FLT
SETI 10 EP* 11 RSDT
TSSOP TQFN/QFND
*EXPOSED PAD.
Pin Description
PIN
TQFN/ NAME FUNCTION
TSSOP
QFND
Bias Supply Input. Connect a 4.75V to 40V supply to IN. Bypass IN to SGND with a ceramic
1 4 IN
capacitor.
Enable Input. Connect EN to logic-low to shut down the device. Connect EN to logic-high or IN
2 5 EN
for normal operation. The EN logic threshold is internally set to 1.23V.
Switching Converter Compensation Input. Connect the compensation network from COMP to
3 6 COMP
SGND for current-mode control (see the Feedback Compensation section).
Oscillator Timing Resistor Connection. Connect a timing resistor (RT) from RT to SGND to program
the switching frequency according to the formula RT = 7.350 x 109/fsw (for the MAX16814A_ _
4 7 RT
and the MAX16814U_ _) or to the formula RT = 7.72 x 109/fsw (for the MAX16814B_ _ _). Apply an
AC-coupled external clock at RT to synchronize the switching frequency with an external clock.
Open-Drain Fault Output. FLT asserts low when an open LED, short LED, or thermal shutdown
5 8 FLT
is detected. Connect a 10kω pullup resistor from FLT to VCC.
Overvoltage-Threshold-Adjust Input. Connect a resistor-divider from the switching converter
6 9 OVP
output to OVP and SGND. The OVP comparator reference is internally set to 1.23V.
LED Current-Adjust Input. Connect a resistor (RSETI) from SETI to SGND to set the current
7 10 SETI
through each LED string (ILED) according to the formula ILED = 1500/RSETI.
LED Short Detection Threshold Adjust Input. Connect a resistive divider from VCC to RSDT and
8 11 RSDT SGND to program the LED short detection threshold. Connect RSDT directly to VCC to disable
LED short detection. The LED short detection comparator is internally referenced to 2V.
Signal Ground. SGND is the current return path connection for the low-noise analog signals.
9 12 SGND
Connect SGND, LEDGND, and PGND at a single point.
FLT RSDT
VREF POKD
MAX16814
UNUSED
FAULT FLAG SHORT LED OPEN-LED STRING
LOGIC DETECTOR DETECTOR DETECTOR
SHDN
DRV TSHDN
PWM
NDRV
LOGIC
PGND
CLK
CS CS BLANKING
COMP
OVP R
COMP LOGIC
THERMAL gM
TSHDN
SHUTDOWN
REF FB VBG
SHDN
IN BANDGAP LEDGND
LOGIC
(REF/FB
UVLO DIM
VBG = 1.235V SELECTOR)
5V LDO
VCC
REGULATOR
SS_REF SS_DONE
POK SOFT-START
POKD SHDN
100ms
VBG
P
EN
SHDN
1.23V
TSHDN
SGND
VIN 7 HBLEDS
L2 L1 D1 PER STRING
C6 C5 C1 C2 C7
R1
M1
C8
R2
D2 R7 RSCOMP RCS
IN NDRV CS OVP
EN
OUT1
VCC OUT2
C3 OUT3
R5
MAX16814 OUT4
VDRV
C4 RSETI
SETI
DIM VCC
R6
FLT
COMP
R3
RSDT
RCOMP R4
RT
RT
CCOMP
disconnected from the COMP output to retain the com- 95% of the OVP voltage and uses feedback from the OVP
pensation capacitor charge. This allows the converter input. Soft-start terminates when the minimum current-sink
to settle to steady-state level almost immediately when voltage reaches 1V or when the converter output reaches
the LED strings are turned on again. This unique feature 95% OVP. The typical soft-start period is 100ms. The 1V
provides fast dimming response, without having to use minimum OUT_ voltage is detected only when the LED
large output capacitors. strings are enabled by PWM dimming. Connect OVP to
For the MAX16814A_ _ and the MAX16814U_ _, if the the boost converter output through a resistive divider
PWM dimming on-pulse is less than or equal to five network (see the Typical Operating Circuit).
switching cycles, the feedback controls the voltage on When there is an open-LED condition, the converter output
OVP so that the converter output voltage is regulated at hits the OVP threshold. After the OVP is triggered, open-
95% of the OVP threshold. This mode ensures that narrow LED strings are disconnected and, at the beginning of the
PWM dimming pulses are not affected by the response dimming PWM pulse, control is transferred to the adaptive
time of the converter. During this mode, the error amplifier voltage control. The converter output discharges to a level
remains connected to the COMP output continuously and where the new minimum OUT_ voltage is 1V.
the DC-DC converter continues switching.
Oscillator Frequency/External Synchronization
Undervoltage Lockout (UVLO) The internal oscillator frequency is programmable
The MAX16814 features two undervoltage lockouts that between 200kHz and 2MHz using a resistor (RT) con-
monitor the input voltage at IN and the output of the inter- nected from the RT input to SGND. Use the equation
nal LDO regulator at VCC. The device turns on after both below to calculate the value of RT for the desired switch-
VIN and VCC exceed their respective UVLO thresholds. ing frequency, fSW.
The UVLO threshold at IN is 4.3V when VIN is rising and
4.15V when VIN is falling. The UVLO threshold at VCC is 7.35 × 10 9 Hz
RT =
4V when VCC is rising and 3.9V when VCC is falling. fSW
Enable (for the MAX16814A_ _ and the MAX16814U_ _).
EN is a logic input that completely shuts down the
device when connected to logic-low, reducing the 7.72 × 10 9
RT =
current consumption of the device to less than 40FA. fSW
The logic threshold at EN is 1.23V (typ). The voltage
at EN must exceed 1.23V before any operation can (for the MAX16814B_ _ _).
commence. There is a 50mV hysteresis on EN. The EN Synchronize the oscillator with an external clock by
input also allows programming the supply input UVLO AC-coupling the external clock to the RT input. The
threshold using an external voltage-divider to sense the capacitor used for the AC-coupling should satisfy the
input voltage as shown below. following relation:
Use the following equation to calculate the value of R1
9.862
and R2 in Figure 3: C SYNC ≤ -0.144×10 -3 (µF)
TR
V
=R1 UVLO - 1 × R2
1.23V where RT is in Ω.
Soft-Start EN
The pulse width for the synchronization pulse should BOOST CONVERTER
satisfy the following relations: OUTPUT
t PW
VS < 0.5
t CLK
40mA TO 300mA
t PW PER STRING
0.8 − VS + VS > 3.4
t CLK
t CLK
t PW < (t CI − 1.05 ×t CLK ) OUT1
t CI
MAX16814 OUT2
where tPW is the synchronization source pulse width, OUT3
tCLK is the synchronization clock time period, tCI is the
OUT4
programmed clock period, and VS is the synchronization
pulse voltage level.
5V LDO Regulator (VCC)
The internal LDO regulator converts the input voltage Figure 4. Configuration for Higher LED String Current
at IN to a 5V output voltage at VCC. The LDO regulator
supplies up to 50mA current to provide power to internal where IOUT_ is the desired output current for each of the
control circuitry and the gate driver. Connect a resistor four channels.
between VCC and DRV to power the gate-drive circuitry;
the recommended value is 4.7I. Bypass DRV with a If more than 150mA is required in an LED string, use two
capacitor to PGND. The external resistor and bypass or more of the current source outputs (OUT_) connected
capacitor provide noise filtering. Bypass VCC to SGND together to drive the string as shown in Figure 4.
with a minimum of 1FF ceramic capacitor as close to the LED Dimming Control
device as possible.
The MAX16814 features LED brightness control using an
PWM MOSFET Driver external PWM signal applied at DIM. A logic-high signal
The NDRV output is a push-pull output with the on-resis- on the DIM input enables all four LED current sources
tance of the pMOS typically 1.1I and the on-resistance and a logic-low signal disables them.
of the nMOS typically 0.9I. NDRV swings from PGND to For the MAX16814A_ _ and the MAX16814U_ _, the duty
DRV to drive an external n-channel MOSFET. The driver cycle of the PWM signal applied to DIM also controls
typically sources 2.0A and sinks 2.0A allowing for fast the DC-DC converter’s output voltage. If the turn-on
turn-on and turn-off of high gate-charge MOSFETs. duration of the PWM signal is less than or equal to 5
The power dissipation in the MAX16814 is mainly a oscillator clock cycles (DIM pulse width decreasing) then
function of the average current sourced to drive the the boost converter regulates its output based on feed-
external MOSFET (IDRV) if there are no additional loads back from the OVP input. During this mode, the converter
on VCC. IDRV depends on the total gate charge (QG) output voltage is regulated to 95% of the OVP threshold
and operating frequency of the converter. Connect DRV voltage. If the turn-on duration of the PWM signal is
to VCC with a 4.7I resistor to power the gate driver with greater than or equal to 6 oscillator clock cycles (DIM
the internal 5V regulator. pulse width increasing), then the converter regulates its
output so that the minimum voltage at OUT_ is 1V.
LED Current Control When the DIM signal crosses the 5 or 6 oscillator clock-
The MAX16814 features four identical constant-current cycle boundary, the control loop of the MAX16814
sources used to drive multiple HB LED strings. The experiences a discontinuity due to an internal mode
current through each one of the four channels is adjust- transition, which can cause flickering (the boost output
able between 20mA and 150mA using an external voltage changes, as described in previous paragraph).
resistor (RSETI) connected between SETI and SGND. To avoid flicker, the following is recommended:
Select RSETI using the following formula:
●● Avoid crossing the 5 or 6 oscillator clock-cycle
R SETI = 1500 IOUT_ boundary.
●● Do not set the OVP level higher than 3V converter output reaches the overvoltage
above the maximum LED operating voltage. protection threshold, the PWM controller is switched off,
●● Optimize the compensation components so setting NDRV low. Any current-sink output with VOUT_
that recovery is as fast as possible. If the loop < 300mV (typ) is disconnected from the minimum voltage
phase margin is less than 45°, the output voltage detector.
may ring during the 5 or 6 oscillator clock-cycle Connect the OUT_ of all channels without LED
boundary crossing, which can contribute to flicker. connections to LEDGND before power-up to avoid OVP
triggering at startup. When an open-LED overvoltage
Fault Protections condition occurs, FLT is latched low.
Fault protections in the MAX16814 include cycle-
by-cycle current limiting using the PWM controller, Short-LED Detection
DC-DC converter output overvoltage protection, open- The MAX16814 checks for shorted LEDs at each rising
LED detection, short LED detection and protection, and edge of DIM. An LED short is detected at OUT_ if the fol-
overtemperature shutdown. An open-drain LED fault lowing condition is met:
flag output (FLT) goes low when an open-LED string VOUT_ > VMINSTR + 3 x VRSDT
is detected, a shorted LED string is detected, and
where VOUT_ is the voltage at OUT_, VMINSTR is
during thermal shutdown. FLT is cleared when the fault
the minimum current-sink voltage, and VRSDT is the
condition is removed during thermal shutdown and
programmable LED short detection threshold set at
shorted LEDs. FLT is latched low for an open-LED
the RSDT input. Adjust VRSDT using a voltage-divider
condition and can be reset by cycling power or toggling
resistive network connected at the VCC output, RSDT
the EN pin. The thermal shutdown threshold is +165NC
input, and SGND.
and has 15NC hysteresis.
Once a short is detected on any of the strings, the LED
Open-LED Management and strings with the short are disconnected and the FLT
Overvoltage Protection output flag asserts until the device detects that the shorts
On power-up, the MAX16814 detects and disconnects are removed on any of the following rising edges of DIM.
any unused current-sink channels before entering Connect RSDT directly to VCC to always disable LED
soft-start. Disable the unused current-sink channels short detection.
by connecting the corresponding OUT_ to LEDGND.
This avoids asserting the FLT output for the unused Applications Information
channels. After soft-start, the MAX16814 detects open
LED and disconnects any strings with an open LED from DC-DC Converter
the internal minimum OUT_ voltage detector. This keeps Three different converter topologies are possible with
the DC-DC converter output voltage within safe limits the DC-DC controller in the MAX16814, which has
and maintains high efficiency. During normal operation, the ground-referenced outputs necessary to use the
the DC-DC converter output regulation loop uses the constant current-sink drivers. If the LED string forward
minimum OUT_ voltage as the feedback input. If any voltage is always more than the input supply voltage
LED string is open, the voltage at the opened OUT_ goes range, use the boost converter topology. If the LED string
to VLEDGND. The DC-DC converter output voltage then forward voltage falls within the supply voltage range, use
increases to the overvoltage protection threshold set by the boost-buck converter topology. Boost-buck topology
the voltage-divider network connected between the con- is implemented using either a conventional SEPIC con-
verter output, OVP input, SGND. The overvoltage protec- figuration or a coupled-inductor boost-buck configura-
tion threshold at the DC-DC converter output (VOVP) is tion. The latter is basically a flyback converter with 1:1
determined using the following formula: turns ratio. 1:1 coupled inductors are available with tight
coupling suitable for this application. Figure 6 shows
R1 (see the Typical Operating Circuit) the coupled-inductor boost-buck configuration. It is also
VOVP= 1.23 × 1 + possible to implement a single inductor boost-buck con-
R2
verter using the MAX15054 high-side FET driver.
where 1.23V (typ) is the OVP threshold. Select R1 and The boost converter topology provides the highest effi-
R2 such that the voltage at OUT_ does not exceed ciency among the above mentioned topologies. The
the absolute maximum rating. As soon as the DC-DC coupled-inductor boost-buck topology has the advan-
tage of not using a coupling capacitor over the SEPIC maximum average current occurs at the lowest line
configuration. Also, the feedback loop compensation for voltage. For the boost converter, the average inductor
SEPIC becomes complex if the coupling capacitor is not current is equal to the input current. Select the maxi-
large enough. A coupled-inductor boost-buck is not suit- mum peak-to-peak ripple on the inductor current (DIL).
able for cases where the coupled-inductor windings are The recommended peak-to-peak ripple is 60% of the
not tightly coupled. Considerable leakage inductance average inductor current.
requires additional snubber components and degrades Use the following equations to calculate the maximum
the efficiency. average inductor current (ILAVG) and peak inductor
Power-Circuit Design current (ILP) in amperes:
First select a converter topology based on the previous
factors. Determine the required input-supply voltage ILED
IL AVG =
range, the maximum voltage needed to drive the LED 1 − D MAX
strings including the minimum 1V across the constant
LED current sink (VLED), and the total output current Allowing the peak-to-peak inductor ripple DIL to be
needed to drive the LED strings (ILED) as follows: +30% of the average inductor current:
=
ILED I STRING × N STRING ∆=
IL IL AVG × 0.3 × 2
Use the following equations to calculate the average The combined inductance value and current is calcu-
inductor currents (IL1AVG, IL2AVG) and peak inductor lated as follows:
currents (IL1P, IL2P) in amperes:
L1MIN × L2 MIN
I × D MAX × 1.1 L MIN =
IL1AVG = LED L1MIN + L2 MIN
1 − D MAX
and:
The factor 1.1 provides a 10% margin to account for the =
IL AVG IL1AVG + IL2 AVG
converter losses:
where ILAVG represents the total average current through
both the inductors together for SEPIC configuration. Use
IL2 AVG = ILED
these values in the calculations for SEPIC configuration
Assuming the peak-to-peak inductor ripple DIL is Q30% in the following sections.
of the average inductor current: Select coupling capacitor CS so that the peak-to-
peak ripple on it is less than 2% of the minimum input
∆=
IL1 IL1AVG × 0.3 × 2 supply voltage. This ensures that the second-order
effects created by the series resonant circuit comprising
and: L1, CS, and L2 does not affect the normal operation of
the converter. Use the following equation to calculate the
∆IL1 minimum value of CS:
=
IL1P IL1AVG +
2
ILED × D MAX
CS ≥
VIN_MIN × 0.02 × fSW
∆IL2
= IL2 AVG × 0.3 × 2
where CS is the minimum value of the coupling capacitor
and:
∆IL2 in farads, ILED is the LED current in amperes, and the
=
IL2 P IL2 AVG + factor 0.02 accounts for 2% ripple.
2
Slope Compensation
Calculate the minimum inductance values L1MIN and The MAX16814 generates a current ramp for slope
L2MIN in henries with the inductor current ripples set to compensation. This ramp current is in sync with
the maximum value as follows: the switching frequency and starts from zero at the
beginning of every clock cycle and rises linearly to
(VINMIN − VDS − 0.3V) × D MAX reach 50FA at the end of the clock cycle. The slope-
L1MIN =
fSW × ∆IL1 compensating resistor, RSCOMP, is connected between
(VINMIN − VDS − 0.3V) × D MAX the CS input and the source of the external MOSFET.
L2 MIN = This adds a programmable ramp voltage to the CS input
fSW × ∆IL2
voltage to provide slope compensation.
where 0.3V is the peak current-sense voltage. Choose Use the following equation to calculate the value of slope
inductors that have a minimum inductance greater than compensation resistance (RSCOMP).
the calculated L1MIN and L2MIN and current rating For boost configuration:
greater than IL1P and IL2P, respectively. The recom-
mended saturation current limit of the selected inductor
R SCOMP =
(VLED − 2VIN_MIN ) × R CS × 3
is 10% higher than the inductor peak current: L MIN × 50FA × fSW × 4
For simplifying further calculations, consider L1 and L2
as a single inductor with L1 and L2 connected in parallel.
where 0.396 is the minimum value of the peak cur- PCOND = IL AVG 2 × D MAX × RDS (ON)
rent-sense threshold. The current-sense threshold also
includes the slope compensation component. The mini- where RDS(ON) is the on-state drain-to-source resistance
mum current-sense threshold of 0.396 is multiplied by of the MOSFET.
0.9 to take tolerances into account. Use the following equation to calculate the switching
losses in the MOSFET:
Output Capacitor Selection
For all the three converter topologies, the output capaci-
IL AVG × VLED 2 × C GD × fSW 1 1
tor supplies the load current when the main switch= is PSW × +
on. The function of the output capacitor is to reduce the 2 I GON I GOFF
converter output ripple to acceptable levels. The entire
where IGON and IGOFF are the gate currents of the
output-voltage ripple appears across constant current-
MOSFET in amperes, when it is turned on and turned
sink outputs because the LED string voltages are stable
off, respectively. CGD is the gate-to-drain MOSFET
due to the constant current. For the MAX16814, limit
capacitance in farads.
the peak-to-peak output voltage ripple to 200mV to get
stable output current. Rectifier Diode Selection
The ESR, ESL, and the bulk capacitance of the output Using a Schottky rectifier diode produces less forward
capacitor contribute to the output ripple. In most of the drop and puts the least burden on the MOSFET during
applications, using low-ESR ceramic capacitors can reverse recovery. A diode with considerable reverse-
dramatically reduce the output ESR and ESL effects. recovery time increases the MOSFET switching loss.
To reduce the ESL and ESR effects, connect multiple Select a Schottky diode with a voltage rating 20% higher
ceramic capacitors in parallel to achieve the required than the maximum boost-converter output voltage and
bulk capacitance. To minimize audible noise during current rating greater than that calculated in the follow-
PWM dimming, the amount of ceramic capacitors on the ing equation:
output are usually minimized. In this case, an additional
electrolytic or tantalum capacitor provides most of the = ID IL AVG × (1 − D MAX ) x 1.2
bulk capacitance.
ILED
fP1 =
2 × π × VLED × C OUT
If the output capacitors do not have low ESR, the ESR multiplied by a factor of 1220 is the current through
zero frequency may fall within the 0dB crossover fre- each one of the four constant current-sink channels.
quency. An additional pole may be required to cancel Adjust the current through SETI to get analog dimming
out this pole placed at the same frequency. This is functionality by connecting the external control voltage
usually implemented by connecting a capacitor in paral- to SETI through the resistor RSETI2. The resulting change
lel with CCOMP and RCOMP. Figure 5 shows the SEPIC in the LED current with the control voltage is linear and
configuration and Figure 6 shows the coupled-inductor inversely proportional. The LED current control range
boost-buck configuration. remains between 20mA to 150mA.
Analog Dimming Using External Use the following equation to calculate the LED current
Control Voltage set by the control voltage applied:
Connect a resistor RSETI2 to the SETI input as shown
in Figure 7 for controlling the LED string current using 1500 (1.23 − VC )
I OUT = + × 1220
an external control voltage. The MAX16814 applies a R SETI R SETI2
fixed 1.23V bandgap reference voltage at SETI and
measures the current through SETI. This measured current
VIN
4.75V TO 40V
L1 CS D1
UP TO 40V
C1 C2
N R1
L2
RSCOMP RCS R2
IN NDRV CS OVP
EN OUT1
VCC OUT2
C3
MAX16814 OUT3
R5
DRV OUT4
RSETI
C4
SETI
VCC
DIM FLT
COMP R3
RSDT
RCOMP
RT
R4
SGND PGND LEDGND
RT
CCOMP
PCB Layout Considerations 3) There are two loops in the power circuit that carry
LED driver circuits based on the MAX16814 device use high-frequency switching currents. One loop is when
a high-frequency switching converter to generate the the MOSFET is on (from the input filter capacitor
voltage for LED strings. Take proper care while laying positive terminal, through the inductor, the internal
out the circuit to ensure proper operation. The switching- MOSFET, and the current-sense resistor, to the input
converter part of the circuit has nodes with very fast capacitor negative terminal). The other loop is when
voltage changes that could lead to undesirable effects the MOSFET is off (from the input capacitor positive
on the sensitive parts of the circuit. Follow the guidelines terminal, through the inductor, the rectifier diode,
below to reduce noise as much as possible: output filter capacitor, to the input capacitor negative
1) Connect the bypass capacitor on VCC and DRV as terminal). Analyze these two loops and make the loop
close to the device as possible and connect the areas as small as possible. Wherever possible, have a
capacitor ground to the analog ground plane using return path on the power ground plane for the switch-
vias close to the capacitor terminal. Connect SGND ing currents on the top layer copper traces, or through
of the device to the analog ground plane using a via power components. This reduces the loop area con-
close to SGND. Lay the analog ground plane on the siderably and provides a low-inductance path for
inner layer, preferably next to the top layer. Use the the switching currents. Reducing the loop area also
analog ground plane to cover the entire area under reduces radiation during switching.
critical signal components for the power converter. 4) Connect the power ground plane for the constant-
2) Have a power ground plane for the switching- current LED driver part of the circuit to LEDGND as
converter power circuit under the power components close to the device as possible. Connect SGND to
(input filter capacitor, output filter capacitor, inductor, PGND at the same point.
MOSFET, rectifier diode, and current-sense resis-
tor). Connect PGND to the power ground plane as
close to PGND as possible. Connect all other ground
connections to the power ground plane using vias
close to the terminals.
VIN
4.75V TO 40V
T1 D1
(1:1)
C1
UP TO 40V
C2
N R1
RSCOMP RCS R2
IN NDRV CS OVP
EN OUT1
VCC OUT2
C3
MAX16814 OUT3
R5
DRV OUT4
RSETI
C4
SETI
VCC
DIM FLT
COMP R3
RSDT
RCOMP
RT
R4
SGND PGND LEDGND
RT
CCOMP
MAX16814
RSETI2
SETI
1.23V
RSETI VC
VIN
4.75V TO 40V
L D1 UP TO 40V
C1 C2
N R1
RSCOMP RCS R2
IN NDRV CS OVP
EN OUT1
VCC OUT2
C3
MAX16814 OUT3
R5
DRV OUT4
RSETI
C4
SETI
VCC
DIM FLT
COMP R3
RSDT
RCOMP
RT
R4
SGND PGND LEDGND
RT
CCOMP
Revision History
REVISION REVISION
DESCRIPTION PAGES CHANGED
NUMBER DATE
0 7/09 Initial release —
1 9/09 Correction to slope compensation description and block diagram 10, 18
Correction to synchronization description frequency and minor
2 11/09 1–4, 8, 12–20, 22, 25
edits
3 2/10 Correction to CSYNC formula 13
4 6/10 Added MAX16814BE _ _ parts; corrected specification 1–4, 8, 13, 25
Correction to output current accuracy specification and Absolute
5 3/11 1, 2, 4
Maximum Ratings
6 10/11 Correction to the last formula and description 19
Added side-wettable package option and updated EN leakage in
7 1/13 1, 2, 4, 8, 9, 23, 24
Electrical Characteristics
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. © 2016 Maxim Integrated Products, Inc. │ 25