Final Project Report - Edited-Pdf1
Final Project Report - Edited-Pdf1
Final Project Report - Edited-Pdf1
FED DC DRIVE
A PROJECT REPORT
Submitted by
AJITH T (211716105024)
DHIVAGAR K (211716105035)
of
BACHELOR OF ENGINEERING
IN
APRIL-2020
ANNA UNIVERSITY: CHENNAI 600 025
BONAFIDE CERTIFICATE
under my supervision.
SIGNATURE SIGNATURE
HEAD OF THE DEPARTMENT
Mr. B MANIMARAN, M.E., (Ph.D)
SUPERVISOR Assistant
Dr. C. KAMALAKANNAN, M.E., Ph.D., Professor
Electrical and Electronics Engineering, Electrical and Electronics Engineering,
i
ACKNOWLEDGEMENT
and our vice chairman Dr. HAREE SHANKAR, M.B.B.S who have
constantly
successfully.
our project.
Also we thank all the other teaching faculty and non-teaching faculty
of
comments and suggestions during review meetings and for their timely
help
Also we thank our parents for their full support towards our project
and
ii
ABSTRACT
resonant controller) controlled closed loop systems using veinna rectifier &
the
parameters like settling time and steady state error. The outcomes
represent the
iii
TABLE OF CONTENTS
ABSTRACT III
TABLE OF CONTENT IV
LIST OF TABLES X
LIST OF ABBREVIATION XI
1. INTRODUCTION 1
1.1 Introduction 1
2. LITERATURE SURVEY 3
3. VIENNA RECTIFIER 30
Three-Phase Three
loads
Single-Phase
3.4 Vienna Rectifier System 41
4. CONTROL TECHNIQUES 51
4.1 PI Controller 51
iv
4.2 Proportional Resonant Control 52
Source Disturbance
PI Controller
PR Controller
6. HARDWARE IMPLEMENTATION
6.1 General 66
6.3.3 Reset 72
6.3.6 Interrupt 73
6.4.3 Applications 79
6.5 MOSFET 81
6.5.1 Introduction 81
v
7. CONCLUSION 85
8. REFERENCE 86
vi
LIST OF FIGURES
Controlled Transistors
Factor PWM
Single-phase
Rectifier
vii
3.12 Current path in alternate construction 49
in all switches ON
viii
5.13 Circuit Diagram of closed loop Vienna 62
6.5 Optocouplers 75
x
LIST OF ABBREVIATION
NPP Neutral-point-Potential
Transistor
xi
RISC Register Instruction Set Register
INTRODUCTION
power factor created by the power electronic converters and the need for
Active
1.1 INTRODUCTION
the harmonics injected into the mains. This has led to the formulation of
new
and the poor power factor is the Power Electronic Converters (PEC).
These
converters act as non-linear loads to the mains. They pollute the mains by
drawing
conductors and calls for increased conductor size. With the introduction of
fast
Processors (DSP), PECs have become handy and are utilized in almost
every
1
To mitigate this issue, earlier, bulky passive harmonic filters were
used.
active filters or APFC. These APFC circuits invariantly use the boost
rectifiers
that draw continuous current from the mains. Good power factor and
harmonics
rectifiers are naturally higher than the peak of the maximum input voltage.
To
obtain necessary output voltage and galvanic isolation these rectifiers are
level structure facilitates the use of low voltage switches. The advantage of
using
the low voltage switches is reduced conduction and switching losses. The
power
circuit is also available as a monolithic module with some semiconductor
as it is a fifth order system. This calls for high expertise in control design
and
2
For example, Youssef et al. developed a small signal model that has twenty
controllers are used in addition to one controller for voltage balancing, and
use of high speed DSP, and, require a complex algorithm. Real time control
Switching frequency of only 2.04 kHz was used with d SPACE due to
complex
calculations and algorithms involved in both the cases. These issues are
addressed
power rating in terms of current rating of the device used, losses involved,
efficiency and the number of active and passive devices used. A complete
the full range of input and output conditions. A Boundary Conduction Mode
(BCM) of the VIENNA Rectifier is also proposed and the circuit diagram for
realization of the control using analog controller is
presented.
3
CHAPTER 2
LITERATURE SURVEY
This section highlights the various work so far carried out in the
following
topologies
derived the stator flux. Direct Torque Control (DTC) of the PMSG by the
improving the power quality in a DTC based Induction Motor Drive (IMD) at
the
front end. The design, modeling, simulation were carried out and
implemented
on a hardware using a
DSP.
The operation and control strategies, the intrinsic benefits, the reduction of
the magnetic components including the boost inductors, and the power
semiconductor devices were given. A 7.5 kW four legs per phase lab
prototype
was demonstrated for an efficiency of 98% from 40% load and
IEC61000-3-2
requirements.
Bachir Kedjar et al. (2014) used the VIENNA Rectifier for power
quality
cancel the input current harmonics drawn by the nonlinear loads connected
to the
was developed in the d–q frame and was experimentally validated from the
results
phase PFC rectifiers; the active six-switch buck-type PFC rectifier, the
active six-
5
switch boost-type PFC rectifier, the SWISS Rectifier and the VIENNA
Rectifier
(VR). Typical feed-back control strategies and the equations for current
levels and the volume of the main passive components. Two variants, one
with
the SiC JFETs and SiC Schottky diodes and the other using Si IGBTs and
SiC
and/or power density and were also compared, that helps to establish the
trade-
off between the power density and efficiency. Roland Greul et al. (2007)
phase boost rectifier modules, for the power factor correction application,
without
a neutral point connection. The main advantages of this rectifier over the
VIENNA are the low DC output voltage and have a high degree of
modularity.
There is a large reduction in the input current ripple, when compared to the
three
shown that high quality input current with low ripple can be achieved similar
to
which occurs during a mains phase failure, was also provided in the
analysis. The
6
theoretical and simulated results were provided and validated by a digitally
controlled experimental 5.4-kW
prototype.
of converter and compared it for its performance and efficiency. The first
one was
stage, while the second was a three-phase boost + buck rectifier system
consisting
Both the rectifiers draw sinusoidal current from the input mains and
provides
400 Vrms line-to-line input and for different output voltages from 200 to 600
V.
Based on the evaluation it was concluded that the buck + boost approach
was
superior considering the overall system complexity, the volume and weight
of the
phase PFC including VR, to suppress the diode reverse recovery losses
and
It uses two inductors in series with the freewheeling diodes with two
auxiliary
switches and two capacitors to clamp the voltage. All the switches turn-on
under
7
Dan Carlton & William G Dunford (2001) studied the features and
voltage and controllability angle were investigated. While any phase angle
and the VR was found to be the most cost effective for the low power
applications.
series, connected across the freewheeling diodes on both the sides. The
coupled
inductor was chosen such a way that the freewheeling diode current dies
within
the off-time of the power transistor and results in low reverse recovery
current of
the auxiliary diodes. The switching behavior with and without the turn-on
and efficiency was calculated and compared with and without the snubber.
It was
8
frequency of 25kHz improved by 0.3% in the presence of the proposed
turn-on
snubber.
introduced between the mains neutral point and the centre point of the
output
voltage in a Three-level Three-phase PWM rectifier systems due to the
switching.
simply connecting the neutral to the output centre point. But this leads to
use of
index range also gets limited to one. So to maintain the advantage of the
three-
for the VR through digital simulation and a procedure for selection of the
filter
of this system was realized by removing the DC-link capacitor from the
regular
current rather than with the impressed voltage, thereby removing the
requirement
9
realization is low compared to a conventional two stage system. The
functionality
of the new rectifier and the conduction states occurring within a pulse
period was
currents in phase with the phase voltages. The proposed rectifier was
digitally
to reduce the output voltage ripple and the DC component of the reactive
power
based current control was designed that reduces the algorithm complexity.
The
stationary region of operation was analysed, and found to work beyond the
operation region with large unbalance. The 9-dynamic response under the
unbalanced input and the comparison with the traditional controller were
given.
10
than the Discontinuous PWM (DPWM) method for the VIENNA Rectifiers,
based on the space vectors. Just adding the offset voltage to the three
sinusoidal
requirement of same sign of the current and the input voltage. Hence, a
new CB-
DPWM method was considered for the VR, where the reference voltage
that does
not satisfy the requirement was clamped to zero. This was achieved by
adding a
modified offset voltage that is different from the offset of the CB-DPWM
method,
to the reference
voltages.
Lijun Hang et al. (2014) analysed the SVM of the VIENNA Rectifier
and
controller that can work for a wide range of unbalanced load. The
maximum
unbalanced load versus the modulation index was deduced and tested on
an
Control schemes for preserving the high power factor operation, while
sharing
power with the paralleled rectifier and to handle a phase loss, without
changing
11
the controller structure were proposed. The efficiency of the hybrid systems
presented are high, while they require 10 less silicon area when compared
to the
the VR to minimise the effect of the switching between the DCM and CCM
that
method and the control design were given and validated through the
experimental
results.
Lijun Hang & Ming Zhang (2014) studied the constant power control
method for the VR under severe unbalanced load and analysed the
theoretical
operation area. Control methods like Dual Frame Hybrid Vector Control
(DFHVC) are good at alleviating the input power ripple under the light
input power and gets rid of ripples in the dc-link voltage. For large
unbalances a
power ripple to arrive at a trade-off between the output voltage ripples and
the
voltage and input power, while it decreases the ripple under severe
unbalanced
balancing under the unbalanced load for different modulation indices using
the
results from the prototype. Ming Zhang et al. (2013) proposed a novel
control
method for the unbalanced grid after analysing the theoretical operation
area of
the constant 11 power control method that can work under the severe
unbalanced
grid by injecting a small part of the input power ripple and balance the
working
area performance and the output DC voltage ripple. Controls like the dual
frame
hybrid vector control, can perform well under the light unbalanced grid, but
fails
under the severe unbalanced grid. The proposed control method was
validated by
experimental results.
third harmonics into the current feedback of the One Cycle Control (OCC)
and
the ripple in the DC-link, retaining the advantages of the conventional OCC
scheme, like fixed switching frequency and no phase locked loop. The
theoretical
prototype. Zheng Wei et al. (2013) proposed a MOCC for the VIENNA
Rectifier
fed by a high frequency power line such as the aircraft power systems,
where the
13
switching frequency to the power line frequency ratio becomes low. Here
the drop
The control equation of the MOCC taking into account the voltage drop
across
the inductor was derived and the theoretical analysis was verified by the
the Vienna type rectifier that works on the unbalanced input. The positive/
loss. The static operation region of the rectifier was analysed and derived.
The
proposed control scheme was verified and compared with the traditional
for the VIENNA Rectifier in a wind mill application. The rectifier was
modelled
as a tetra port Loss Free Resistor (LFR), with three decoupled input ports
and one
14
digital logic circuits. The theoretical predictions were validated by the
experimental results obtained from a low power wind generator for different
in the closed loop systems for the VR by proper selection of the output
functions
four cases were considered and were shown that only one case has
resulted in a
In the second methodology, two output functions were imposed to zero and
solved with two control inputs. Of the eighteen different cases studied, only
one
the proposed adaptive controllers are capable of regulating the output with
input
done for NPC converters. This equivalent modelling turns into structurally
time
15
into the synchronous d-q frame, and averaging it over a switching cycle.
This
drive and a 2 kW experimental prototypes were used for validation. The full
an NPC converter and using the correct modulating signals to comply with
the
proposed model retains its time variant dynamics inherent to the pulsating
power
transfer between its input and output, due to its DC bus mid-point
clamping. The
converter input admittance is periodic over 180o and the converter output
impedance is time invariant, enabling its direct use for the DC stability
studies.
Loop-gain transfer functions like the d-q frame current loop and, the dc bus
and
sequence vectors of the three-level rectifiers and the zero state vectors of
two-
16
digital signal processor–field programmable gate array controlled VIENNA
state space averaging technique. This has resulted in a fifth order system
with
time varying inputs. The model was established in rotating abc frame and
then
dependence. Multi-loop PI controller was used and the stability was verified
for
phase trajectories for any initial conditions. It was also verified on a 1.5 kW
model. Switching frequency of only 2.04 kHz was used due to the
limitations on
and inner current control loop. The controller was tuned by linear pole
placement
17
method and was evaluated by experiments. The results were also
compared with
VR. The output and input voltages and were numerically estimated by an
extended Kalman filter and the converter averaged model. Only two current
sensors were used unlike the traditional nonlinear control approach, thus
the measured currents were controlled by the inner loops. The total output
DC
bus voltage was regulated by an outer loop considering the power balance.
The
proposed method was verified on a 1.5 kVA prototype of the rectifier and
control technique based on a small-signal model for the VR. Averaging and
local
linearization techniques were applied to obtain the dynamic model in the
dqo
reference frame. The resulted transfer functions were discretized for the
digital
controller design. The control consists of inner current feedback loops that
18
the references for the inner current loops. Also the output voltage
unbalance was
controlled by the inner loops. The model and control approaches were
simulated
the proposed model and its dependability for the control design and
dynamic
analysis. The nominal static point was determined from the converter
nonlinear
state-space averaged model and local linearization was performed. This
dynamic
and the output voltages. Simulation and the implementation with DSP
using the
to the inner loops of the VR, to maintain a balanced output, while the 16
other
parameters like output voltage control and current shaping were achieved.
The
output state space model. The system was sufficiently linearized and
controlled
balance while the outer loop regulates the total output voltage and was
evaluated
on a 1.5 kW prototype.
technique for the VIENNA Rectifier and validated it through simulation and
19
experiments. The physical variables obtained in the stationary frame were
locally
model and the converter steady state and dynamic models were
elaborated and
then transformed into dqo rotational frame. Twenty input to output transfer
functions were obtained. The model was numerically verified using the
averaged
The results obtained were quantified and were compared through Bode
plots. It
was concluded that the proposed small-signal model was accurate and can
be
controller design.
the current sensors. This aids in reduced cost and space. The proposed
approach
controls both the amplitude of the synthesized voltage and the phase angle
and
becomes the phase angle difference between the source and pole
voltages. The
modulation index space vector was calculated based on the phase angle
small and the amplitude of the modulation index vector varies marginally
during
the steady state operation. The power flow is mainly controlled by the
phase
20
angle, though the unity power factor and input current shaping is achieved
through proper amplitude. The control transfer function results for the VR
SABER and compared with the experimental results. The match between
the two
The aim was to arrive at an appropriate value of the inductor that has the
minimal
value to limit the ripple current and capable of withstanding the current
imposition method. The plot of variation of the control saturation angle for
various line inductor sizes and variation of the saturation angle, THD and
PF with
21
respect to DC voltage unbalance were reported. It can be observed that
the
proposed a control for balancing the partial DC link voltages in both the 18
balanced and unbalanced loads. The digital control system was realized
with the
due to the asymmetry of the split load. If the load resistors are considerably
link voltages, the balancing term was obtained from the balance
PI-controller and
and were added to the preliminary reference forming the peak current
references
The measured currents were then subtracted from the references and the
current
error signals were fed to a P-controller, giving an approximation for the filter
voltages. These were subtracted from measured phase voltages and the
rectifier’s
modulator along with the information of the DC link capacitor voltages and
the
the rectifier was able to maintain balanced DC link voltages in both load
currents from the utility network. During a constant asymmetrical load the
line
currents increases
significantly.
vector and its dependence to the phase currents. The maximum voltage
space
vector and the range of the phase displacement angle vs the phase
displacement
angle was drawn for sinusoidal SVM. The mathematical model was verified
by
simulation.
a virtual connection between the output centre point and the neutral
connection,
zero sequence voltage is obtained from the output voltage of a three phase
diode
23
bridge. This results in retaining the advantages of the classical hysteresis
control
high input voltage and at low load currents. In PFC application, this occurs
even
at the medium loads near the mains voltage zero crossings. Under the
DCM
operation, the input current total harmonic distortion is poor and requires
voltages, from which the basic rules for the location of error voltages can
be
input current reference from the mains AC phase voltage and the output
voltage
controller output. This has also featured a reduced input ripple current and
third
harmonic current that flows into the output mid-point. The control was
achieved
24
by modifying the amplitude of the carrier signal in accordance with the
voltage
controller output and changing its polarity to that of the input voltage.
Another
scheme, which does not rely on the input voltage polarity, was also
presented.
prototype was also provided. In Part II, a conventional scheme that utilizes
a
multiplier has been compared with the multiplier free scheme, for operation
in
control concept was briefly discussed and compared with the size of the
control
along with three flips-flops and comparators form the control circuit. It does
not
require the multipliers or the input voltage sensing as in many other control
25
Franz Stogererjo et al. (2001) proposed a novel control concept for
the
average current-mode controller with an inner input current control loop for
each
phase and an outer output voltage loop was employed. The output voltage
values. The current control loop uses a mains voltage pre-control signal
that
controller is sufficient to achieve a high quality input current shape with this
mains voltage pre-control signal. The input current reference values were
derived
from the input conductivity reference value considering the output voltage
maintain the limit on the peak value of the input currents. The input current
reference values were derived from the product of the input conductivity
and the
circuit. All high frequency operations were carried out by the analog circuit
while
26
the rate of change of the respective input phase current, and the phase
currents
can be built by the integration of the inductor voltage. The estimation error
can
observer circuit, in modified form could also detect an output voltage earth
fault,
laws were derived considering the CCM large signal averaged Pulse Width
such as boost, fly back, SEPIC, and buck + boost, thereby using a two-loop
simulation results were provided for the SEPIC, flyback, and buck + boost
converters.
each phases, with and without synchronization of the control ramps and
also with
27
the star point is not connected to the neutral, all the three phases are
coupled, and
ramp produces lower switching losses and lower input harmonics, while
The size and weight of the EMI filter reduces significantly for the
synchronized
triangular carrier.
Johann W Kolar et al. (1996) analysed the stationary operational
behaviour
of the VIENNA Rectifier for the unbalanced loading of the output. Analytical
calculations revealed that the average value of the centre point current has
a linear
admissible center point load was calculated and was dependent on the
amplitude
of the input current and the modulation index of 23 the system. The
calculations
were verified by the digital simulations. Input RMS ripple current was
analyzed
stress on the devices and the output capacitors were also compiled,
enabling direct
used for the current shaping. The center point voltage stability was studied
based
on the analysis of the center point current generated due to the switching
state.
28
Transfer function of the dynamic system behavior was determined. The
control
of the center point voltage was achieved by offsetting the phase current
reference
values. Mains current shape is not affected due to the floating neutral, but
Control behavior for the stationary operation and the load step change of
the
feedback amplifiers for controlling any converter can be designed with the
required crossover frequency and necessary phase margin in a few
algebraic
equations on the first try, without the need for the trial and error
adjustments.
Three standard feedback amplifiers were presented, which caters for any
known
loop. With these amplifiers and the k factor, the feedback circuit can be
designed
always one for the first amplifier, the square root of the ratio of the pole
frequency
to the zero frequency for the second amplifier, and the ratio of the double
pole
VIENNA RECTIFIER
Three bidirectional switches (Sa, Sb, and Sc) with two capacitors which are
identical and series connected along with a three-phase diode rectifier, are
used
across the device. This is only one half of the blocking potential
across the
rectifiers.
LEVELS
voltage-source rectifier. The status of the switches and the current direction
30
decides the generation of input voltages. Three switches are provided in
the
Vienna Rectifier. Each switch is placed one per phase-leg and each phase
is tied
to the neutral point of the DC-link when that particular phase is switched
on. Or
else the current direction decides the voltage of that phase. The input
current is
positive and the positive DC link rail will be tied to the phase14 leg if the
upper
The input current is negative, when the bottom diode is on, and the
negative
DC link will be tied to the phase leg. For nominal loads, Vienna Rectifier
improves the three phase rectifier’s input power factor. When the “critical
input
Power Factor as well as the THD occurs. Using the proposed controller,
high-
good DC link voltage regulation and wide load variations. The converter
draws a
diodes use capacitors to smoothen the voltage. This arrangement has the
disadvantage that large current harmonics are injected into the devices
used by
31
IEC 1000-3-2 and EN61000-3-2. To achieve input waveforms of high
quality
three levels power converters are proposed which fall under the series of
newly
developed topologies.
switches, and two series-connected capacitors. During the 30 of the input
line
The above method is able to retain the well shaped current waveform
and
keeps it nearly sinusoidal. In such cases, the THD in the input current goes
down
to a low value of 6.6% and the PF goes up to 0.99. The switching losses
are
negligible as the bidirectional switches are able to conduct at twice the line
❖ The Vienna Rectifier offers the same or less input current harmonic
32
❖ The Vienna Rectifier, with its three-level output, allows any DC-DC
❖ The Vienna Rectifier has only three switches, which are significantly
fewer
than switches used in other rectifiers with the same performance (in
terms
The mains phase current harmonics, which remain even after filtering
the
input quantities that are discontinuous are filtered, decides the output
voltage
level.
33
The DC side converter part is split into two partial systems, which are
simultaneously pulsed, and is shown in Figure 3.2. This is to make each
part to
sustain half of the DC link voltage for operating the system followed in
Europe
for limiting the conducted Electro Magnetic Interference (EMI) the filtering
effort
required is more.
34
Figure 3.2 Inductors on AC
Side
Along with the limitations mentioned already, the high voltage across
the
sinusoidal mains current shape can be created over the range of pulse
periods,
only if rectifier input voltages have sinusoidal shape. Using output diodes
and
transistors which are controlled synchronously in each of the bridge legs,
help to
achieve control of the synthesis of each phase voltage and this is shown in
Figure
3.3.
35
Since the output voltage centre point is included into the system, the
final
voltage. Circuit legs control the converter’s conduction state. If the diodes
are
36
Figure 3.4 Diodes in the Circuit
Legs
3.5(b)
Figures 3.5 (a) and (b) VIENNA Rectifier System having Unity
Power
Factor PWM
38
Comparing the realizations shown in Figures 3.1 and 3.2, it is
observed that
in Figures 3.5 (a) and (b) 50% reduction in turn-off power electronic
devices can
power transistors used are realized. With reference to Figure 3.5 (a), the
diodes
must withstand the full output voltage in the blocking direction. This is a
serious
eliminated. On the input side, the diode bridge legs can be integrated with
the
For instance, if the controlled switch Ta is off and the line current iA is
39
Figure 3.6 Working Principle of Vienna Rectifier - Single
Phase
voltage VAM is 0, and the conduction path is as shown in Figure 3.6 (b). In
a
similar way, we can establish that if the line current iA is negative, the
voltage
VAM can be either -Vdc/2, if the switch Ta is off, or zero if the switch Ta is
on,
and this situation is illustrated in Figure 3.6 (c). Again, if the line current iA
is
negative, the voltage VAM can be either -Vdc/2 if the switch Ta is off, or zero
if
the switch Ta is on, as illustrated in Figure 3.6 (d). For the phase legs B and
C the
40
3.4 VIENNA RECTIFIER SYSTEM
factor.
41
The phase voltage VAN, VBN, VCN are determined by ON/OFF state
of
the bidirectional switch and the direction of line current in the respective
phase.
Hence the rectifier phase voltage depends on the state of switch position
and
Where,
Vj is input voltage
represent
ON condition.
42
When the polarity of line current is positive and the switch state is
OFF,
the DC link voltage +V0/2 will appear across the VAN and the polarity of
current
remains the same and the switch state is ON. Then input current flows to
common
of capacitor through the switch and VAN becomes zero. The current flow
directions are shown in Figures 3.8 & 3.9, when the input current is positive
and
respectively.
link voltage –V0/2 will appear across the VAN and the polarity remains the
same
and the switch state is ON; then VAN becomes zero. The current flow
directions
are shown in Figures 3.10 & 3.11, when the input current is negative and
switch
44
Figure 3.10 Current direction when input current is negative and
Sa is
OFF
Figure 3.11 Current direction when input current is negative and Sa
is ON
The phase voltages VAN, VBN, VCN are determined by the polarity
of
current and switch position. The following Tables 3.1, 3.2, 3.3, 3.4, 3.5 &
3.6
45
give the switching patent for the different possible combinations at different
for instant when all the switches are in OFF/ON condition respectively. The
three-
50
CHAPTER 4
CONTROL TECHNIQUES
4.1 PI CONTROLLER
pointed; low percentage overshoot and small settling time can be obtained
by
using this controller. Many theoretical and industrial studies have been
done in
51
4.2 PROPORTIONAL RESONANT CONTROL
So as to direct the grid current a solitary stage input current loop is
utilized. The model of the present control and the plant are appeared in
Figure
4.2. As space vector hypothesis can't be connected to the single phase
VSI, the
controller structure and demonstrating of the system is impossible in dq
outline.
Figure 4.2 Block diagram of Current Controller.
The transfer function of the LCL filter is symbolized by plant Gf(s) ,
which is delineates as:
Gf (s) = sCf Rd+ 1
3 2 ..........................................(4.1)
s LI Lg Cf+s CfRd(LI+Lg)+s(LI+Lg)
There is always steady state magnitude and phase error subsists while
tracking a sinusoidal signal utilizing ‘Proportional Integral (PI) control’. This
would eliminate SSE (steady state error) while following a sinusoidal
signal. The
PR controller Gi(s) is:
52
is the ‘damping factor’, ω0is ‘power frequency of the grid voltage’. The
‘infinite
gain of PR control’ is diminished by damping factor ′δ to enhance the
‘bandwidth’ and thus dynamics of the system remains steady.
Gi (s) = Kp + Kis
2 ................................................(4.2)
S +2δω0s+ω02
2. Algorithm development
3. Data acquisition
that does not require dimensioning. This allows you to solve many
technical
language such as C or
FORTRAN.
54
The name MATLAB stands for matrix laboratory. MATLAB was
LAPACK and BLAS libraries, embedding the state of the art in software for
matrix computation.
MATLAB has evolved over a period of years with input from many
users.
analysis.
55
5.2 SIMULATION RESULTS
DISTURBANCE
Circuit diagram of open loop veinna rectifier with source disturbance is
Voltage across motor load is delineated in Fig.5.3 &its value is 150V. Motor
56
57
Voltage across motor load is delineated in Fig.5.9 &its value is 100V. Motor
controller
Figure 5.8. Input voltage
59
60
Figure 5.12 Motor torque
controller
Figure 5.14. Input voltage
62
63
Figure .18 Motor torque
from 4.78Sec to 2.33Sec; steady state error is reduced from 1.8V to 1.1V.
Hence,
the outcome represents that the closed loop veinna rectifier with PR
controller is
64
12V
1mf
1mf
C2
C2
C2
1mf mc
1mf
1mf To Driver
1mf
circuit or
5V
5V
mc
1
1
To Driver
1 circuit or
mc
2 To Driver
2
circuit or
To Driver mc
circuit or
To Driver
mc
circuit or
To Driver mc
circuit or
To Driver
mc
circuit or
To Driver mc
circuit or
HARDWARE IMPLEMENTATION
6.1 GENERAL
2. Voltage Regulators
PIC16F84A
1
D2
D5
D5
To Driver
circuit or
mc 1
2
To Driver 2
circuit or
3
3
1
1
7805
7805
7805
7805
7805
2
2
2
3
3
3
3
3
66
power circuit.
❖ The 15V AC input is rectified into 15V pulsating DC with the help of
full
❖ An output voltage of 12V obtained from the output pin of 7812 is fed
as
❖ From the same output pin of the 7805, a LED is connected in series
with
set of this controller are fewer than the usual microcontroller. Unlike
67