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Data Communication Lab

This document discusses various line coding schemes used for digital data transmission, including: 1. Unipolar NRZ encodes 1 as a positive voltage and 0 as zero voltage, but has issues with DC component and lack of clocking. Polar NRZ addresses these by using both positive and negative voltages. 2. Manchester encoding ensures a transition in the middle of every bit for clock recovery. Differential Manchester only transitions at the start of a 1 bit. 3. Polar RZ returns to zero in the middle of each bit to address issues with polar NRZ. Bipolar AMI alternates signal polarity for each 1 bit while representing 0 as zero voltage.

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dicij
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0% found this document useful (0 votes)
179 views

Data Communication Lab

This document discusses various line coding schemes used for digital data transmission, including: 1. Unipolar NRZ encodes 1 as a positive voltage and 0 as zero voltage, but has issues with DC component and lack of clocking. Polar NRZ addresses these by using both positive and negative voltages. 2. Manchester encoding ensures a transition in the middle of every bit for clock recovery. Differential Manchester only transitions at the start of a 1 bit. 3. Polar RZ returns to zero in the middle of each bit to address issues with polar NRZ. Bipolar AMI alternates signal polarity for each 1 bit while representing 0 as zero voltage.

Uploaded by

dicij
Copyright
© © All Rights Reserved
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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NON RETURN TO ZERO UNIPOLAR SCHEME

Unipolar encoding is a line code. A positive voltage represents a binary 1, and zero
volts indicates a binary 0. It is the simplest line code, directly encoding the bit
stream, and is analogous to on-off keying in modulation.
Its drawbacks are that it is not self-clocking and it has a significant DC component,
which can be halved by using return-to-zero, where the signal returns to zero in the
middle of the bit period. With a 50% duty cycle each rectangular pulse is only at a
positive voltage for half of the bit period. This is ideal if one symbol is sent much
more often than the other and power considerations are necessary, and also makes
the signal self-clocking.

NRZ (Non-Return-to-Zero) - Traditionally, a unipolar scheme was designed as a


non-return-to-zero (NRZ) scheme, in which the positive voltage defines bit 1 and the
zero voltage defines bit 0. It is called NRZ because the signal does not return to zero
at the middle of the bit, as instead happens in other line coding schemes, such as
Manchester code. Compared with its polar counterpart, polar NRZ, this scheme
applies a DC bias to the line and unnecessarily wastes power – The normalized
power (power required to send 1 bit per unit line resistance) is double that for polar
NRZ. For this reason, unipolar encoding is not normally used in data
communications today.
NON RETURN TO ZERO POLAR SCHEME
Polar schemes:
In polar schemes, the voltages are on the both sides of the axis. For example, the
voltage level for 0 can be positive and the voltage for 1 can be negative. In polar
NRZ encoding there are two level of voltage amplitude. We can have two versions of
polar NRZ: NRZ-Level (NRZ-L) and NRZ-Invert (NRZ-I)
NRZ-L and NRZ-I – These are somewhat similar to unipolar NRZ scheme but here
we use two levels of amplitude (voltages). For NRZ-L(NRZ-Level), the level of the
voltage determines the value of the bit, typically binary 1 maps to logic-level high,
and binary 0 maps to logic-level low, and for NRZ-I(NRZ-Invert), two-level signal has
a transition at a boundary if the next bit that we are going to transmit is a logical 1,
and does not have a transition if the next bit that we are going to transmit is a logical
0.
Note – For NRZ-I we are assuming in the example that previous signal before
starting of data set “01001110” was positive. Therefore, there is no transition at the
beginning and first bit “0” in current data set “01001110” is starting from +V.
Example: Data = 01001110.

Matlab code for Polar NRZ-L:


clc;
clear;
x=[ 0 1 0 1 0 0 0 1 1 0 1 1 0 0 0 1 ];
T=length(x);
n=200;
N=n*T;
dt=T/N;
t=0:dt:T;
y=zeros(1,length(t));
for i=0:T-1;
    if x(i+1)==1
        y(i*n+1 : (i+1)*n)=1;
    else
        y(i*n+1 : (i+1)*n)=-1;
    end;
end;
plot(t,y);
axis([0 t(end) -2 2]);
grid on;
title('NRZ-L');
Output of Polar NRZ-L:
Matlab code for Polar NRZ-I:
clc;
clear;
x=[0 1 0 1 0 0 0 1 1 0 1 1 0 0 0 1];
T=length(x);
n=200;
N=n*T;
dt=T/N;
pulse=-1;
t=0:dt:T;
y=zeros(1,length(t));
  for i=0:T-1;
    if x(i+1)==1
        if pulse==1
            pulse=-1;
            y(i*n+1 : (i+1)*n)=-1;
        else
            pulse=1;
            y(i*n+1 : (i+1)*n);
        end;
    else
        y(i*n+1 : (i+1)*n)=pulse;
    end;
  end;
  plot(t,y);
  axis([0 t(end) -2 2]);
  grid on;
  title('NRZ-I');
Output of Polar NRZ-I:

RETURN TO ZERO POLAR SCHEMA


Polar RZ is the return-to-zero form of polar line coding. Some of the problems
relating to polar NRZ line coding schemes are mitigated here through the use of
three signaling levels. It is still the case that (typically) logic low is represented by a
positive voltage and logic high is represented by a positive voltage, but in both cases
the signal level returns to zero half way through the bit time and stays there until the
next bit is transmitted (note that, somewhat confusingly, some sources refer to this
line coding scheme as bipolar RZ, or BPRZ). One solution to NRZ problem is the RZ
scheme, which uses three values positive, negative, and zero. In this scheme signal
goes to 0 in the middle of each bit.
The logic we are using here to represent data is that for bit 1 half of the signal is
represented by +V and half by zero voltage and for bit 0 half of the signal is
represented by -V and half by zero voltage. In this type of Polar signaling, a High in
data, though represented by a Mark pulse, its duration T0 is less than the symbol bit
duration. Half of the bit duration remains high but it immediately returns to zero and
shows the absence of pulse during the remaining half of the bit duration received, it
assumes that an error in transmission has occurred and discards the received data.
BIPHASE: MANCHESTER AND DIFFERENTIAL MANCHASTER LINE CODING
MANCHESTER ENCODING:
Manchester encoding is a widely used line coding scheme that embeds timing
information in the transmitted signal. It does this by ensuring that there is a transition
(high-to-low or low-to-high) in the middle of every bit time, making it easy for the
receiver to retrieve a clock signal from the incoming bit stream and maintain
synchronization with the transmitted signal. The trade-off is a much higher bandwidth
requirement than the other line coding schemes we have seen so far.
A logic high (binary one) is represented by a positive pulse with a period of half a bit
time followed by a negative pulse of the same duration. Similarly, a logic low (binary
zero) consists of a negative pulse followed by a positive pulse, each with a period of
half a bit time. Essentially, the receiver looks for a transition in the middle of each bit
time. A positive to negative transition is interpreted as a binary one, and a negative
to positive transition is seen as a binary zero.
Matlab code for Manchester:
clc;
clear;
x=[0 1 0 1 0 0 0 1 1 0 1 1 0 0 0 1];
T=length(x);
n=100;
N=2*n*T;
dt=T/N;
t=0:dt:T;
y=zeros(1,length(t));
    for i=0:1:(T-1);
        if x(i+1)==1
            y(i*2*n+1 : (2*i+1)*n)=-1;
            y((i*2+1)*n+1 : (2*i+2)*n)=1;
        else
            y(i*2*n+1 : (2*i+1)*n)=1;
            y((2*i+1)*n+1 : (2*i+2)*n)=-1;
        end;
    end;
     plot(t,y);
     axis([0 t(end) -2 2]);
     grid on;
     title('Manchester');
Output of Manchester:

DIFFERENTIAL MANCHESTER
In Manchester Encoding scheme, two signal changes represent 0 and one signal
change repress. This encoding scheme is a combination of RZ and NRZ-I. It also
transit at the middle of the bit but changes phase only when 1 is encountered.  
It changes the signal at the middle of the bit interval for synchronization, but the
presence or absence of the transition at the beginning of the interval determines the
bit. A transition means binary 0 and no transition means binary 1. There is still a
transition in the middle of each bit time, but there is only a transition at the start of a
bit time if the bit will be a logic high (binary one). There is no transition at the start of
the bit time if the bit will be a logic low (binary zero). It is the presence or absence of
a transition at the beginning of a bit time that signifies what logic state the bit
represents. Neither the direction of the transition nor the actual voltage level on the
line during the bit time have any significance in this respect. This means, effectively,
that if the signal gets inverted, it still represents the same bit pattern.
Matlab code for Differential Manchester
clc;
clear;
x=[0 1 0 1 0 0 0 1 1 0 1 1 0 0 0 1];
T=length(x);
n=100;
N=2*n*T;
dt=T/N;
pulse=-1;
t=0:dt:T;
y=zeros(1,length(t));
  for i=0:(T-1);
         if x(i+1)==1
             if pulse==1
                 pulse=-1;
                 y(i*2*n+1 : (2*i+1)*n)=-1*pulse;
                 y((2*i+1)*n+1 : (2*i+2)*n)=pulse;
             else
                 pulse=1;
                 y(i*2*n+1 : (2*i+1)*n)=-1*pulse;
                 y((2*i+1)*n+1 : (2*i+2)*n)=pulse;
             end;
         end;
  end;
plot(t,y);
axis([0  t(end)  -2  2]);
grid on;
title('differential Manchester');
Output of Differential Manchester

ALTERNATE MARK INVERSION (AMI) BIPOLAR LINE CODING


Bipolar alternate mark inversion (AMI) is the simplest type of bipolar encoding. In the
name alternate mark inversion, the word mark comes from telegraphy and means 1
so (AMI) means alternate 1 inversion. A neutral, zero voltage represents binary 0.
Binary 1s are represented by alternating positive and negative voltage.
Matlab code for Bipolar AMI:
clc;
clear;
x=[0 1 0 1 0 0 0 1 1 0 1 1 0 0 0 1];
T=length(x);
n=200;
N=n*T;
dt=T/N;
pulse=-1;
t=0:dt:T;
y=zeros(1,length(t));
   for i=0:T-1;
         if x(i+1)==1
             if pulse==-1
                 y(i*n+1 : (i+1)*n)=-1;
             else
                 pulse=1;
                 y(i*n+1 : (i+1)*n)=1;
             end;
         else
             y(i*n+1 : (i+1)*n)=0;
         end;
   end;
   plot(t,y);
   axis([0 t(end) -2 2]);
   grid on;
   title('Bipolar AMI');
Output of Bipolar AMI:

PSEUDOTERNARY BIPOLAR LINE CODING


The pseudoternary version of bipolar line coding is essentially identical to AMI
except that logic high is represented by a zero voltage and logic low is represented
by alternate positive and negative voltages - the exact opposite of what happens with
AMI.

Matlab code for Pseudoternary:


clc;
clear;
x=[0 1 0 1 0 0 0 1 1 0 1 1 0 0 0 1];
T=length(x);
n=200;
N=n*T;
dt=T/N;
pulse=-1;
t=0:dt:T;
y=zeros(1,length(t));
   for i=0:T-1;
          if x(i+1)==0
                if pulse==1
                    pulse=-1;
                    y(i*n+1 : (i+1)*n)=-1;
                else
                    pulse=1;
                    y(i*n+1 : (i+1)*n)=0;
                end;
          end;
   end;
   plot(t,y);
   axis([0 t(end) -2 2]);
   grid on;
   title('Pseudoternery');
Output for Pseudoternary:

MULTILINE TRANSMISSION: MLT-3


MLT-3 (multi-level transmit) is, like polar NRZ-I and differential Manchester, a
differential line coding scheme. The "3" in the name reflects the fact that, whereas
both of the aforementioned schemes use only two signal levels (positive and
negative) to represent binary values, MLT-3 uses three levels (positive, negative and
zero). It is also classed as a multi-level encoding scheme, because it uses more than
two levels to represent binary data.
On that basis, we could probably also describe polar RZ, bipolar AMI and
pseudoternary encoding as multi-level schemes. The difference is that, in polar RZ,
the zero signal level is not used to represent a logic value, and in bipolar schemes,
the absence of a pulse always represents a binary zero while the presence of a
pulse (positive or negative) always represents a binary one. In MLT-3, not only are
all three signal levels used to represent data, but each signal level can represent a
different logic value, depending on the signal level and the logic value of the
preceding bit.
MLT-3 cycles through the voltage levels sequentially (from negative to zero to
positive to zero), moving to the next state to signal a binary one or maintaining its
current state to signal a binary zero. The illustration below shows how a typical bit
pattern would be encoded using MLT-3. Note that, for the purposes of this exercise,
we are assuming that the most recent non-zero signal level prior to the start of the
sequence was negative.
MLT-3 encoding of a typical bit sequence:

Because transitions only occur when a logic high is to be transmitted, MLT-3 has a
relatively low bandwidth requirement. The worst-case scenario from a bandwidth
perspective would be a long sequence of binary ones, which would cause the signal
to make one complete cycle (+0-0 or -0+0) in the space of four bits, as shown below.

Runs of binary ones increase the average bandwidth requirement


Because MLT-3 requires four transitions to complete one complete cycle, the
maximum fundamental frequency that must be supported by the transmission
medium is only one quarter of the baud rate, making MLT-3 suitable for transmission
over twisted-pair copper wire cables. Consequently, MLT-3 has been used
successfully for 100BASE-TX Ethernet, the predominant
Form of Fast Ethernet (100 Mbps), operating over two wire pairs in category 5 (or
above) twisted pair cables.
4B/5B BLOCK CODING
Block Coding:
Block coding helps in error detection and re-transmission of the signal. It is normally
referred to as mB/nB coding as it replaces each m-bit data group with an n-bit data
group (where n>m). Thus, its adds extra bits (redundancy bits) which helps in
synchronization at receiver’s and sender’s end and also providing some kind of error
detecting capability.
It normally involves three steps: division, substitution, and combination. In the
division step, a sequence of bits is divided into groups of m-bits. In the substitution
step, we substitute an m-bit group for an n-bit group. Finally, the n-bit groups are
combined together to form a stream which has more bits than the original bits.

4B/5B Coding Technique:


The four binary/five binary (4B/5B) coding scheme was designed to be used in
combination with NRZ-I. Recall that NRZ-I has a good signal rate, one-half that of
the biphase, but it has a synchronization problem. A long sequence of ‘0’s can make
the receiver clock lose synchronization. One solution is to change the bit stream,
prior to encoding with NRZ-I, so that it does not have a long stream of ‘0’s.
The 4B/5B scheme achieves this goal. The block-coded stream does not have more
than three consecutive ‘0’s. At the receiver, the NRZ-I encoded digital signal is first
decoded into a stream of bits and then decode to remove the redundancy.
In 4B/5B, the 5-bit output replaces the 4-bit input has no more than one leading zero
(left bit) and no more than two trailing zeros (right bits). So when different groups are
combined to make a new sequence, there are never more than three consecutive
‘0’s. The following figure shows the idea
The following table shows the corresponding pairs used in 4B/5B encoding. Note
that the first two columns pair a 4-bit group with a 5-bit group. A group of 4 bits can
have only 16 different combinations while a group of 5 bits can have 32 different
combinations. This means that there are 16 groups that are not used for 4B/5B
encoding. Some of these unused groups are used for control purposes; the others
are not used at all. The latter provide a kind of error detection. If a 5-bit group arrives
that belongs to the unused portion of the table, the receiver knows that there is an
error in the transmission.
8B/10B (Eight binary/Ten binary) BLOCK CODING
This encoding is similar to 4B/5B encoding except that a group of 8 bits of data is
now substituted by a 10-bit code and it provides greater error detection capability
than 4B/5B. When 8-bit data are generated in a serial string, there is no assurance
that the string will not contain a long sequence of zeros or ones. In fact, it is
desirable that there be a balance of zeros and ones in the bit sequence
It is actually a combination of 5B/6B and 3B/4B encoding. The most five significant
bits of a 10-bit block is fed into the 5B/6B encoder; the least 3 significant bits is fed
into a 3B/4B encoder. The split is done to simplify the mapping table.
A group of 8 bits can have 2^8 different combinations while a group of 10 bits can
have 2^10 different combinations. This means that there are 2^10-2^8=768
redundant groups that are not used for 8B/10B encoding and can be used for error
detection and disparity check.
Thus, this technique is better than 4B/5B because of better error-checking capability
and better synchronization.

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