Plasma TV: Service Manual
Plasma TV: Service Manual
Plasma TV: Service Manual
PLASMA TV
SERVICE MANUAL
CHASSIS : PA11K
CAUTION
BEFORE SERVICING THE CHASSIS,
READ THE SAFETY PRECAUTIONS IN THIS MANUAL.
CONTENTS ............................................................................................................................... 2
SPECIFICATION.........................................................................................................................4
Copyright ©2011 LG Electronics Inc. All rights reserved. -2- LGE Internal Use Only
Only for training and service purposes
Keep wires away from high voltage or high temperature parts. Leakage Current Hot Check circuit
Due to high vacuum and large surface area of picture tube, AC Volt-meter
extreme care should be used in handling the Picture Tube.
Do not lift the Picture tube by it's Neck.
Copyright ©2011 LG Electronics Inc. All rights reserved. -3- LGE Internal Use Only
Only for training and service purposes
V Application Range
This spec is applied to PDP TV used PA11K Chassis.
Model Name Market Brand
42PT250-TA Australia, New Zealand, Malaysia, Indonesia, Singapore LG
South Africa, Israel, Iran, Vietnam, Kenya, Non-EU analog
V Specification
Each part is tested as below without special appointment.
(1) Temperature : 25 °C ± 5 °C (77 °F ± 9 °F), CST : 40 ± 5
(2) Relative Humidity: 65 % ± 10 %
(3) Power Voltage: Standard Input voltage (100 V - 240 V ~, 50 / 60 Hz)
* Standard Voltage of each product is marked by models.
(4) Specification and performance of each parts are followed each drawing and specification by part number in accordance with
SBOM.
(5) The receiver must be operated for about 20 minutes prior to the adjustment.
V Test Method
(1) Performance : LGE TV test method followed.
(2) Demanded other specification
Safety : CE, IEC specification, EMC : CE, IEC
Model Name Market Brand
42PT250-TA Australia, New Zealand, Malaysia, Indonesia, Singapore Safety : IEC/EN60065
South Africa, Israel, Iran, Vietnam, Kenya, Non-EU analog EMI : CISPR13
V Module Specification
(1) 2D - 42” HD
No Item Specification Remark
1 Display Screen Device 106 cm (42 inch) wide Color Display Module PDP
2 Aspect Ratio 16:9
3 PDP Module PDP42T3####,
RGB Closed (Well) Type, Glass Filter (38%)
Pixel Format: 1024 horiz. By 768 ver
4 Operating Environment 1) Temp. : 0 deg ~ 40 deg
2) Humidity : 20 % ~ 80 %
LGE SPEC
5 Storage Environment 3) Temp. : -20 deg ~ 60 deg
4) Humidity : 10 % ~ 90 %
6 Input Voltage AC 100 V ~ 240 V, 50 / 60 Hz Maker LG
Copyright ©2011 LG Electronics Inc. All rights reserved. -4- LGE Internal Use Only
Only for training and service purposes
Copyright ©2011 LG Electronics Inc. All rights reserved. -5- LGE Internal Use Only
Only for training and service purposes
Copyright ©2011 LG Electronics Inc. All rights reserved. -6- LGE Internal Use Only
Only for training and service purposes
Copyright ©2011 LG Electronics Inc. All rights reserved. -7- LGE Internal Use Only
Only for training and service purposes
* Caution : Not to push the INSTOP KEY after completion if the * Auto-control interface and directions
function inspection. (1) Adjust in the place where the influx of light like floodlight
around is blocked. (Illumination is less than 10ux).
(2) Measure and adjust after sticking the Color Analyzer (CA-
100+, CA210 ) to the side of the module.
7. Total Assembly line process (3) Aging time
After aging start, keep the Power on (no suspension of
7-1. POWER PCB Assy voltage adjustment power supply) and heat-run over 5 minutes
(Vs voltage adjustment)
O Required Equipment for adjustment
O Auto adjustment Map(RS-232C)
- D.M.M
RS-232C COMMAND
O Condition for adjustment
[ CMD ID DATA ]
- No signal with the snow noise in RF mode)
Wb 00 00 White Balance Start
Wb 00 ff White Balance End
7-2. Adjustment Preparation RS-232C COMMAND CENTER
- Required Equipment
O Remote controller for adjustment
[CMD ID DATA] MIN (DEFAULT) MAX
O Color Analyzer ( CS-1000, CA-100,100+,CA-210 or same Cool Mid Warm Cool Mid Warm
product : CH 10 (PDP)
R Gain jg Ja jd 00 192 192 192 192
* Please adjust CA-210, CA-100+ by CS-1000 before
measuring G Gain jh Jb je 00 192 192 192 192
O Auto W/B adjustment instrument(only for Auto adjustment) B Gain ji Jc jf 00 192 192 192 192
O 9 Pin D-Sub Jack(RS232C) is connected to the AUTO W/B
EQUIPMENT. R Cut 64 64 64 128
G Cut 64 64 64 128
Before Adjust of White Balance, Please press POWER ONLY B Cut 64 64 64 128
key
Copyright ©2011 LG Electronics Inc. All rights reserved. -8- LGE Internal Use Only
Only for training and service purposes
-> Picture Mode change : Vivid ? Vivid(User) O Edid data and Model option download (RS232)
NO Item CMD 1 CMD 2 Data 0
7-3. DPM operation confirmation
Enter download A A 0 0 When transfer the
(Only Apply for MNT Model)
download ‘Mode In’ ‘Mode In’
* Check if Power LED Color and Power Consumption operate Mode Carry the
as standard. command.
(1) Set Input to RGB and connect D-sub cable to set EDID data download A E 00 10 Automatically
(2) Measurement Condition: (100~240V@ 50/60Hz) Model download
(3) Confirm DPM operation at the state of screen without
option (The use of
Signal
download a internal pattern)
Copyright ©2011 LG Electronics Inc. All rights reserved. -9- LGE Internal Use Only
Only for training and service purposes
* Caution
* Use the proper signal cable for EDID Download
- Analog EDID : Pin3 exists
- Digital EDID : Pin3 exists
* Caution:
- Never connect HDMI & D-sub Cable at the same time.
- Use the proper cables below for EDID Writing.
- Download HDMI1, HDMI2 separately because HDMI1 is
different from HDMI2.
ⓐ Vender ID
Copyright ©2011 LG Electronics Inc. All rights reserved. - 10 - LGE Internal Use Only
Only for training and service purposes
(4) Put on the 3D Glasses, And block the right side of Glasses
9. Ping TEST (LEFT:CLOSED, RIGHT:OPEN[TEST])
And check the middle sides of picture , BLUE -> normal ,
(DVB T2 model only, PP11B/L) others -> abnormal
Copyright ©2011 LG Electronics Inc. All rights reserved. - 11 - LGE Internal Use Only
Only for training and service purposes
CMD : A0h
LENGTH : 85~94h (1~16 bytes)
ADH : EEPROM Sub Address high (00~1F)
ADL : EEPROM Sub Address low (00~FF)
Data : Write data
CS : CMD + LENGTH + ADH + ADL + Data_1 + ... +
Data_n
Delay : 20ms
4) Check the model name Instart menu ? Factory name 12-2. Check the method of CI+ Key value
displayed (ex 42LD450-TA) (1) check the method on Instart menu
Copyright ©2011 LG Electronics Inc. All rights reserved. - 12 - LGE Internal Use Only
Only for training and service purposes
3) result value
- normally status for download : OKx
- abnormally status for download : NGx
Copyright ©2011 LG Electronics Inc. All rights reserved. - 13 - LGE Internal Use Only
Only for training and service purposes
Copyright ©2011 LG Electronics Inc. All rights reserved. - 14 - LGE Internal Use Only
Only for training and service purposes
400
601
520
207
206
200
602
201
204
590
580
501
240
910
900
203
303
301
205
202
304
302
A9
305
A4
A10
LV1
A12
A21
A2
120
300
570
EU
R114
JK100 10K
EU R154 C118
PSC008-02 470 0.1uF
AV/SC1_DET E 16V
R115 EU
R136 READY
1K 0
SHIELD EU EU B
R156
SC1_SOG_IN C 15K
23 C Q103
B ISA1530AC1 EU
AV/SC1_CVBS_IN EU
D103 30V AV_DET C
22 R122 C110 C112 R145
READY Q100 330 ATV_OUT
COM_GND 75 27pF 220pF E EU B
2SC3052
21 EU 50V 50V
D104 SYNC_IN EU READY EU
30V C117
20 E Q104 100uF
D105 READY30V SYNC_OUT
SC1_VOUT 2SC3052 R157 16V
EU 10K EU
19 R150 EU
READY SYNC_GND2 R120 C111 R144 R153
75 R123 C107 R143 0 220
1000pF 100 EU 180
18 EU 470K 100uF 50V EU
SYNC_GND1 16V EU
EU 1/4W
EU READY EU
17 R151
D106 30V RGB_IO 390
SC1_FB READY
16
D107 READY30V R_OUT SC1_R+/COMP1_Pr+> R124
R130
33
15 75
READY EU
RGB_GND EU
14
R_GND SC1_R-/COMP1_Pr-> SC1_ID
13 R121 R125
D2B_OUT 10K 2.7K
12 EU EU
D108 30V G_OUT SC1_G+/COMP1_Y+>
11
READY D2B_IN AV/SC1_L_IN
10 C140 R128
G_GND R126 R133
SC1_G-/COMP1_Y-> 1000pF 10K 12K
470K 50V
9 EU EU
D109 30V ID EU READY
8
D110 READY30V B_OUT SC1_B+/COMP1_Pb+> AV/SC1_R_IN
READY 7
D111 30V AUDIO_L_IN R127 C141 R131
470K 1000pF 10K R134
IC100
READY 6
50V EU 12K P_17V
B_GND EU
5
SC1_B-/COMP1_Pb-> READY EU AS324MTR-E1
AUDIO_GND
4
D100 30V AUDIO_L_OUT DTV_L_OUT OUT1
1 14
OUT4
3 R129 R147 C115 R159
C105
D101 READY 30V AUDIO_R_IN
1000pF 0
C108 2K C114 27pF 15K
2 4700pF EU 10uF 50V IN1- IN4-
50V EU EU 2 13
D102 READY 30V AUDIO_R_OUT 50V 16V EU
1 Q101 EU
READY 2SC3052 R155
EU SCART1_Lout IN1+ IN4+
R146 6.8K 3 12
C106 R132 C109 2K EU R162
1000pF 0 EU 5.6K
EU 4700pF
50V EU VCC GND
50V 4 11
+3.3V_CI
CI SLOT +5V_CI_ON
EU
EU IC101 EU
EU AR108 33
C103 C104 CI_ADDR[12] PCM_A[12] TC74LCX244FT C120
22uF 0.1uF 0.1uF
10V 16V CI_ADDR[13] PCM_A[13] 16V
CI_ADDR[14] PCM_A[14] 1OE VCC
1 20
CI_DET EU
REG /PCM_REG 1A1 2OE
JK104 PCM_A[0]
2Y4
2 19
1Y1
EAG41860102 EU CI_ADDR[7] 3 18
CI_ADDR[0]
AR109 33 1A2 2A4
1Y2
PCM_A[7]
5 16
CI_ADDR[9] PCM_A[9] CI_ADDR[6] CI_ADDR[1]
35 EU AR105 33
EU CI_ADDR[10] PCM_A[10] PCM_A[2]
1A3
6 15
2A3
PCM_A[6]
R112 EU 100 PCM_D[3] 2Y2
7 14
1Y3
EU 37 3 PCM_A[3] PCM_A[5]
AR100 33 PCM_D[5] 2Y1 1Y4
CI_TS_DATA[4] 38 4 EU CI_ADDR[4] 9 12
CI_ADDR[3]
AR107 33
39 5 PCM_D[6] CI_OE /PCM_OE
GND
10 11
2A1
PCM_A[4]
CI_TS_DATA[5]
40 6 PCM_D[7] CI_WE /PCM_WE
CI_TS_DATA[6]
R137 33 EU
CI_TS_DATA[7] 41 7 /PCM_CE CI_IORD /PCM_IORD
EU R138 33 EU
42 8 CI_IOWR /PCM_IOWR
CI_ADDR[10]
R118 43 9 CI_OE
10K CI_ADDR[11] BUF_FE_TS_DATA[0-7] AR110
CI_IORD 44 10 AR101 EU 33 EU
CI_ADDR[9] 33
CI_IOWR 45 11 FE_TS_SYN BUF_FE_TS_SYN
CI_ADDR[8] BUF_FE_TS_DATA[0]
46 12 FE_TS_VAL_ERR BUF_FE_TS_VAL_ERR
BUF_FE_TS_SYN CI_ADDR[13] BUF_FE_TS_DATA[1] FE_TS_DATA[1]
47 13
FE_TS_DATA[0-7]
FE_TS_CLK BUF_FE_TS_CLK
BUF_FE_TS_DATA[0-7]
+3.3V_ST
C
R212 C C For CEC +3.3V_ST +3.3V_ST
10K SHIELD R236 BODY_SHIELD R258 C245
SHIELD Q200 B PM_RXD
2SC3052 HPD2 Q201 B 10K Q202 B 10K 0.1uF
R225 1K HPD3 HPD4 JK203 R297 0
IC203 16V
R200 1K 20 2SC3052 R248 1K 2SC3052
20
20 E SPG09-DB-009 R290 R291 MAX3232CDR
E E 10K 10K
19 19
19 R226 1.8K R249 1.8K
R201 1.8K 1
18 18 R220 R1434 VCC C1+
18 R204 100 16 1 R1206
R229 R252 56K R269
3.3K 3.3K 3.3K 6 232C_NO6 C244 10K
17 R230 33 17 0.1uF
17 R253 33 27K R288 100 READY
MMBD301LT1G
D200 D207
READY D212
JK201 READY
JK200 JK202 READY
HDMI2 HDMI Side
HDMI1
EAG59023302
5V_HDMI_2 +5V EAG59023301
5V_HDMI_3 +5V EAG62611201
5V_HDMI_4 +5V SPDIF
+5V +5V
A2
A1
A2
A1
A2
A1
ENKMC2838-T112 ENKMC2838-T112
D205 D208 ENKMC2838-T112
D213
C
HDMI1
C
IC204
IC200 EDID_WP IC201 IC202 C235
1K NL17SZ00DFT2G
AT24C02BN-SH-T JK204 0.1uF READY READY
AT24C02BN-SH-T EDID_WP AT24C02BN-SH-T EDID_WP JST1223-001 16V
R207 VCC A
10K R232 R255 5 1 SPDIF_OUT
10K 10K NAND B
A0 VCC A0 VCC A0 VCC GND 2
GATE
1
1 8
Fiber Optic
1 8 1 8 Y GND
4 3
$0.055 $0.055 R293
A1 WP $0.055 R233 R234 VCC 100
R208 R209 A1 WP A1 WP C234 C236
2
3 6 3 6 3 6
DDC_SCL_2 DDC_SCL_3 DDC_SCL_4 100
4
R203 22 R250 22
R228 22
GND SDA GND SDA GND SDA FIX_POLE
4 5 4 5 4 5
DDC_SDA_2 DDC_SDA_3 DDC_SDA_4
R202 22
R227 22 R251 22
RGB PC
+3.3V COMPONENT2 SIDE CVBS
JK210 Close to Jack
Close to Jack PPJ234-02 +3.3V
JK205 R217 [GN]E-LUG +3.3V
R224 COMP2_Pr+> R279 R282 COMP2_Pr+
10K 75
SPG09-DB-010 1K 6A 0
DSUB_DET [GN]O-SPRING C228
COMP2_Y+> R264 10pF R294
R241 5A 10K
0 R271 50V 10K R1203
C210 [GN]CONTACT 1K COMP2_DET D223 READY
D206 DSUB_R+> DSUB_R+ 1K
30V 0.1uF C216 30V SIDEAV_DET
RED_GND READY 16V R238
R242 10pF
4A READY
READY COMP2_Pr-
JK207
6 75 [BL]E-LUG-S D220 C237
READY D230
GND_2 0 50V
DSUB_R-
30V R270 PPJ235-01 30V
0.1uF
1 11 RED READY 7B 10K R283 READY
16V
DSUB_R+> [BL]O-SPRING AV/COMP2_DET 0
GREEN_GND D210 COMP2_Pb+>
R280 R284 COMP2_Y+ 5A [YL]E-LUG
7 DDC_DATA 30V 5B READY R272 COMP2_Y+>
75 0
2 12 RGB_DDC_SDA READY [RD]E-LUG-S D221 1K SIDEAV_CVBS_IN
GREEN 30V C229 4A
DSUB_G+> 7C [YL]O-SPRING D231 R1200 C240
BLUE_GND R243 10pF
8 R218 0 [RD]O-SPRING_1 D224 50V 30V 75 27pF
H_SYNC 33 DSUB_B+ COMP2_Pr+> 30V READY READY 50V
DSUB_HSYNC DSUB_B+> 3A [YL]CONTACT
3 13 BLUE C217 5C READY COMP2_Y-
DSUB_B+> R239 10pF [RD]CONTACT_1
75 R244
NC R219 0 50V 4B
9 33 DSUB_B- 4C R285 [WH]O-SPRING R1201
V_SYNC READY COMP2_L_IN 0 10K
4 14 DSUB_VSYNC [WH]O-SPRING R261 10K SIDEAV_L_IN
GND_1 D211 3C
5D C224 R281 R286 COMP2_Pb+ [RD]CONTACT
SYNC_GND 30V R259 R265 COMP2_Pb+> D232 R298 C239 R1204
10 [RD]CONTACT_2 D215 470K 1000pF 12K 75 0 470K 1000pF
READY 30V 30V 12K
DDC_CLOCK 50V 4C 50V
RGB_DDC_SCL READY [RD]O-SPRING READY
5 15 DDC_GND R245
4E
R262 10K COMP2_R_IN
C230
[RD]O-SPRING_2 10pF
C209 C211 0 D225 50V R1202
DSUB_G+ READY 5C [RD]E-LUG 10K
10pF 10pF DSUB_G+> 5E D216 C225 30V
C218 R260 R266 SIDEAV_R_IN
50V 50V [RD]E-LUG 30V 470K 1000pF READY COMP2_Pb-
16 R240
R246 10pF READY
12K
R299 C238 R1205
75 50V D233
0 50V 6E 470K 1000pF 12K
DSUB_G- R287 30V 50V
SHILED READY 0 READY
D209
30V
READY
GND R211
10
PC_SER_DATA
C204 C207
D204 220pF
220pF Close to Jack
30V 50V
READY READY R210
50V
READY COMPONENT1 SIDE USB
COMP1_Pr+> R102 R108
10 0
75
PC_SER_CLK JK206
C203 PPJ234-02 C102
220pF
C208 27pF SC1_R+/COMP1_Pr+
+3.3V +3.3V +5V
D201 220pF [GN]E-LUG +3.3V 50V SWITCH ADDED
50V D236 READY
30V READY 50V
READY 6A 30V
READY IC206
[GN]O-SPRING READY SC1_R-/COMP1_Pr-
COMP1_Y+> R1112 AP2191SG-13
PC AUDIO 5A 10K R1107
SC2/COMP1_DET
[GN]CONTACT 1K R107 Capacitors on VBUSA should be R267 NC GND R277
0 8 1
USB1_CTL
T_TERMINAL1 AT24C02BN-SH-T [RD]E-LUG-S READY
6A SC1_G-/COMP1_Y- 33
2
R215 7C SIDE_USB_DM
B_TERMINAL1 10K R104
7A [RD]O-SPRING_1 0
PC_R_IN R235 C219 COMP1_Pr+>
1 8 10K R237 0.1uF 5C
R247
3
5 27pF SC1_B+/COMP1_Pb+
D238 50V READY READY
3 6 5D C135
R216 RGB_DDC_SCL R199 R189 READY
5
+3.3V
R370
10K
READY R373 @compC
0
C READY
R367
TU300 10K B 19 18
+5V_TU AMP_MUTE Q303
TDTJ-S001D READY 2SC3052 EAPD/OUT4B OUT3A/FFX3A
READY
+5V_TU R341
E
R374
20 17
ANT_PWR[OPT] 470
R344
82
0 TWARN/OUT4A OUT3B/FFX3B
1 TU_SIF C331
BST_CNTL 0.1uF 21 16
2 50V VDD_DIG_1 CONFIG
ISA1530AC1 C335
+B Q300 22 15
3 +3.3V_TU R338 0.1uF
NC[RF_AGC] C304 C307 4.7K
GND_DIG_1 VDD 50V
4 0.1uF 22uF AC_DET
AS 16V 10V 22 R375
23 14
5 R326
R365 PWRDN GND_REG
R319 1.2K
SCL R313 22 1.2K 2.2 24 13 R381 L302 C347 C351
6 TU_SCL 10.0uH
SDA +5V_TU
VDD_PLL OUT1A 20 0.22uF 1000pF
7 R314 22 R371 50V 50V
TU_SDA 25 12
SMAW250-H04R
C305 C306 2K C333 C345
NC[IF_TP] C301 C327
8 0.1uF 10pF 10pF R345 R349 0.1uF 680pF
50V
FILTER_PLL GND1 C336 1uF 25V 0.22uF
R343 200 200 16V C328 C342 50V 4
SIF 16V 50V 50V 4700pF C348 C352
9 READY READY 0 R366 50V 26 11 C337 0.1uF 50V 330pF
L303 0.22uF 1000pF
TU_CVBS GND_PLL VCC1 50V 10.0uH
P301
NC READY 0 Close-by 50V 50V
27Close-by
10 AUD_MASTER_CLK C355 3
VIDEO READY 22pF 22 R376
10
11 E 50V
XTI OUT1B
Q301 AUD_SCK C356
GND +3.3V_TU 28 9 L304 2
12 +1.26V_TU +3.3V_TU ISA1530AC1
READY 22pF 22 R377 C343 10.0uH
1.2V
B
50V
BICKI OUT2A C338 1uF 25V 330pF C349 C353
13 AUD_LRCK C357 50V 0.22uF 1000pF
C 29 8 C339 0.1uF 50V C346 1
3.3V READY 22pF 22 R378 0.22uF 50V 50V
14 R335 50V
LRCKI VCC2 50V
RESET
10K +5V_TU AUD_LRCH C358 R382 C350 C354
15 Close to Tuner R334 100
TUNER_RESET READY 22pF 22 R379
30 7 20 L305 0.22uF 1000pF
SDI GND2 10.0uH
16
IF_AGC_CNTL C308 R342
0
R346
200
R348
200 AMP_RESET_N
50V Close-by 50V 50V
(Should be guarded by GND) IF_AGC_MAIN 0.1uF
READY EU EU 31 6 P_17V C340
DIF_1 16V 22 R380 C341 C344
17 IF_N_MSTAR
ATV_OUT RESET OUT2B 0.1uF 68uF 68uF
50V 35V
DIF_2 C334 35V
18 IF_P_MSTAR
R359 2K
R315 32 5 0.1uF READY
22 INT_LINE VCC_REG 50V
THERMAL
STA368BWG
IC303
LVDS Key/IR
SDA_3.3V_MOD
SCL_3.3V_MOD
+3.3V
PC_SER_DATA
PC_SER_CLK
UART_RXD
UART_TXD
P602
DISP_EN
12507WS-15L
TCLK2P
TCLK2N
TCLK1P
TCLK1N
R809
TE2P
TE2N
TD2P
TD2N
TC2P
TC2N
TB2P
TB2N
TA2P
TA2N
TE1P
TE1N
TD1P
TD1N
TC1P
TC1N
TB1P
TB1N
TA1P
TA1N
R781 R807
2.2K 0 4.7K
IR 1
G
+3.3V_ST C648
0
0
10pF
P_SDA SDA_3.3V_MOD 2
S
R835
+3.3V
KEY2 4
C 5
R780 R806 R808 R629
0 4.7K 4.7K ZD601
2.2K B Q602 5.6B
LED_RED
2SC3052
+3.3V_ST
TF05-51S
6
G
E
1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
R633 R635
P701
7
52
R631
Q700 22
2N7002(F) SUB_SDA 8
C645 C649
10pF 10pF
+3.3V_ST READY READY
9
LVDS_CLK_2+
UART_RXD
UART_TXD
TCLK2P
SDA_3.3V_MOD
SCL_3.3V_MOD
2D R827 2D
TE4P
TE4N
TD4P
TD4N
TC4P
TC4N
TB4P
TB4N
TA4P
TA4N
R799 0 0
PC_SER_DATA
LVDS_CLK_2- TCLK2N 12
PC_SER_CLK
LVDS_DATA_2_C- TC2N
2D R830 2D
TCLK3P
TCLK3N
TCLK2P
TCLK2N
TCLK1P
TCLK1N
LVDS_DATA_2_B+ R802 0 0 13
TB2P TOUCH_VER_CHK
TE3P
TE3N
TD3P
TD3N
TC3P
TC3N
TB3P
TB3N
TA3P
TA3N
TE2P
TE2N
TD2P
TD2N
TC2P
TC2N
TB2P
TB2N
TA2P
TA2N
TE1P
TE1N
TD1P
TD1N
TC1P
TC1N
TB1P
TB1N
TA1P
TA1N
R803 2D 0 R831 2D 0
LVDS_DATA_2_B- TB2N
LVDS_DATA_2_A+ R804 2D 0 R832 2D 0
TA2P 14
R805 2D 0 R833 2D 0
LVDS_DATA_2_A- TA2N
0
0
R783 2D 0 R811 2D 0 15
LVDS_DATA_1_E- TE1N
LVDS_DATA_1_D+ R784 2D 0 R812 2D 0
TD1P
R785 2D 0 R813 2D 0 16
LVDS_DATA_1_D- TD1N
LVDS_CLK_1+ R786 2D 0 R814 2D 0
TCLK1P
R787 2D 0 R815 2D 0
LVDS_CLK_1- TCLK1N
104060-8017
2D R818 2D 0
R790 0
P703
LVDS_DATA_1_B+ TB1P
FHD
R791 2D 0 R819 2D 0
81
LVDS_DATA_1_B- TB1N
LVDS_DATA_1_A+ R792 2D 0 R820 2D 0
TA1P
R793 2D 0 R821 2D 0
LVDS_DATA_1_A- TA1N
R442 22K
R457 22K
C432 0.01uF
C433 0.01uF
C467 0.01uF
C468 0.01uF
4
1K
A_DDR3_DQL4/DDR2_DQ4 B_DDR3_DQL4/DDR2_DQ4
NC_43 TCON11/CS5/HCON A13 E26
C466 AE5 AD20 A-TMDQL5 A_DDR3_DQL5/DDR2_DQ0 B_DDR3_DQL5/DDR2_DQ0 B-TMDQL5
R433 NC_52 TCON10/CS4/OPT_N B19 M24
0.1uF AF12 AE20 A-TMDQL6 A_DDR3_DQL6/DDR2_CKE B_DDR3_DQL6/DDR2_CKE B-TMDQL6
R452
AB16
R447
R449
R443
NC_26
AA14 CLose to Saturn7M IC CLose to Saturn7M IC
1K
READY1K
1K
READY 1K
NC_19
1K
AC15
NC_30
VCC_1.5V_DDR VCC_1.5V_DDR
AUD_LRCH Y16
<T3 CHIP Config> AUD_SCK NC_15
AC16
AUD_MASTER_CLK NC_31
(AUD_SCK, AUD_MASTER_CLK, PWM1, PWM0) PWM1
AE8
NC_55 NC_29
AC14
R489
1K 1%
R499
1K 1%
1KREADY
MIPS_no_EJ_NOR8 : 4’h3 (MIPS as host. No EJ PAD. Byte mode NAND flash.) NC_12 NC_21
R448
R450
R454
R461
Y19 AA15
R444
MIPS_EJ1_NOR8 : 4’h4 (MIPS as host. EJ use PAD1. Byte mode NAND flash.) GND_105 NC_20
MIPS_EJ2_NOR8 : 4’h5 (MIPS as host. EJ use PAD2. Byte mode NAND flash.)
Y10 A-MVREFCA B-MVREFCA
1K
B51_Secure_no scramble : 4’hb (8051 as host. Internal SPI flash secure boot, no scramble)
0.1uF
1000pF
1K
1K
0.1uF
1000pF
NC_11
1%
AA11
1%
B51_Sesure_scramble : 4’hc (8051 as host. Internal SPI flash secure boot with scarmble)
R1400
NC_17
R490
AB15
NC_25
C460
AB14
C462
1K
C459
1K
C461
NC_24
E9 L2 A-TMODT 3D 16 33
3D
A-MDQL5 R7
VSS_12 DQL5 AR509 22
G2 A-MDQU6 A-TMDQU6
DQL6 A-MDQL6
H7 A-MDQU0 A-TMDQU0 B2 VSSQ_10
DQL7 A-MDQL7 NC_1
B1 A-MDQU4 A-TMDQU4
A2
B8 VSSQ_9 R547 IC503
VSSQ_1 NC_2 4.7K
B9 D7 E2
A7 VSSQ_8 +3.3V_ST MX25L8005M2I-15G
VSSQ_2 DQU0 A-MDQU0 NC_3 READY
D1 C3 R8 VSSQ_7
A-MDQU1 R521 22 A-TMDQU1 D2
VSSQ_3 DQU1 A-MDQU1
D8 C8 R512 10K D8 VSSQ_6 C552
VSSQ_4 DQU2 A-MDQU2 A-MCKE CS# VCC
E2 C2 VSSQ_5 /SPI_CS 1 8
A-MDQU3 VSSDL J7 E7 R546
VSSQ_5 DQU3
E8 A7 F2 VSSQ_4 10K 0.1uF
VSSQ_6 DQU4 A-MDQU4
F9 A2 VSSQ_3 SO HOLD#
A-MDQU5 +1.8V F8 2 7
VSSQ_7 DQU5 SPI_SDO
G1 B8 H2 VSSQ_2
VSSQ_8 DQU6 A-MDQU6
G9 A3 3D VDDL VSSQ_1 R540
A-MDQU7 R522 56 J1 H8 0 WP# SCLK
VSSQ_9 DQU7 B-MA0 B-TMA0 3 6
R523 56 C705 /FLASH_WP SPI_SCK
B-MA2 B-TMA2 100pF
AR510 56 50V R549
B-MA11 B-TMA11 C GND SI 33
READY 4 5 SPI_SDI
B-MA1 B-TMA1
B Q501
IC501 B-MA8 B-TMA8 2SC3052
R539
H5TQ1G63BFR-H9C B-MA6 B-TMA6 10K
READY E
VCC_1.5V_DDR AR511 56
B-MBA0 B-TMBA0
B-MA3 B-TMA3
M8 N3
B-MVREFCA VREFCA A0 B-MA0 B-MA5 B-TMA5 AR531
R500 P7 3D 22
1K A1 B-MA1 B-MA7 B-TMA7
1% P3 1/16W
A2 B-MA2 AR512 56
B-MVREFDQ H1 N2 B-MA4 B-TMA4
/C_DDR_WE /DDR_WE
VREFDQ A3 B-MA3 B-MA12 B-TMA12
P8 C_DDR2_CKE DDR2_CKE
R501 A4 B-MA4 B-MBA1 B-TMBA1
1K P2 C_DDR_BA[1] DDR_BA[1]
R504 A5 B-MA5 A0’h
1% L8
ZQ A6
R8
B-MA6
B-MA10
AR513 56
B-TMA10
C_DDR_BA[0] DDR_BA[0] EEPROM
240 R2 B-MRESETB B-TMRESETB
C500 C502
0.1uF 1000pF 1%
A7
T8
B-MA7
B-MA8
B-MBA2 B-TMBA2 3D
AR532
22 1MBit
A8 1/16W
B2 R3 B-MA13 B-TMA13 +3.3V_AVDD
VDD_1 A9 B-MA9
C506 10uF D9 L7 B-MA9 B-TMA9 C_DDR_A[2] DDR_A[2]
VDD_2 A10/AP B-MA10
C507 0.1uF G7 R7 R524 22 C_DDR_A[0] DDR_A[0]
VDD_3 A11 B-MA11 B-MCK B-TMCK
C508 0.1uF K2 N7 R525 22 /C_DDR_RAS /DDR_RAS
VDD_4 A12/BC B-MA12 B-MCKB B-TMCKB
C509 0.1uF K8 T3 AR514 56 C_DDR2_ODT DDR2_ODT
VDD_5 A13 B-MA13 B-MRASB B-TMRASB C547
C510 0.1uF N1 0.1uF
VDD_6 B-MCASB B-TMCASB AR533 IC504
C511 0.1uF N9 M7 3D 22
VDD_7 A15 B-MODT B-TMODT 1/16W M24M01-HRMN6TP
C512 0.1uF R1
VDD_8 B-MCK B-MWEB B-TMWEB
C513 0.1uF R9 M2 C_DDR_A[1] DDR_A[1]
VDD_9 BA0 B-MBA0 B-MCKB NC VCC
R526 22 C_DDR_A[3] DDR_A[3] 1 8
C514 0.1uF N8 B-MDQSL B-TMDQSL
BA1 B-MBA1 R527 22
C515 0.1uF M3 R508 R510 B-MDQSLB B-TMDQSLB C_DDR_A[12] DDR_A[12]
BA2 B-MBA2 R528 22 E1 WP
A1 56 56 B-MDQSU B-TMDQSU C_DDR_A[9] DDR_A[9] 2 7
C504 0.1uF 1% 1% R529 22
VDDQ_1 B-MDQSUB B-TMDQSUB
C516 0.1uF A8 J7 AR534
VDDQ_2 CK E2 SCL
AR515 22 3D 22 3 6 R543 22 I2C_SCL
C517 0.1uF C1 K7 B-MDQL1 B-TMDQL1
VDDQ_3 CK 1/16W
C518 0.1uF C9 K9 C542 B-MDQL3 B-TMDQL3
VDDQ_4 CKE B-MCKE 0.01uF VSS SDA
C_DDR_A[10] DDR_A[10] 4 5 R544 22
C519 0.1uF D2 50V B-MDML B-TMDML I2C_SDA
VDDQ_5 C_DDR_A[5] DDR_A[5]
C520 0.1uF E9 L2 B-MDQU2 B-TMDQU2 C546 C548
VDDQ_6 CS C_DDR_A[7] DDR_A[7] 10pF 10pF
C521 0.1uF F1 K1 AR516 22
VDDQ_7 ODT B-MODT B-MCKE B-TMCKE C_DDR_A[11] DDR_A[11] READY READY
C522 0.1uF H2 J3
VDDQ_8 RAS B-MRASB VCC_1.5V_DDR B-MDQL7 B-TMDQL7
C523 0.1uF H9 K3 AR535
VDDQ_9 CAS B-MCASB B-MDQL5 B-TMDQL5
L3 3D 22
B-MWEB R507 1/16W
WE 10K
J1
NC_1 AR517 22 C_DDR_A[8] DDR_A[8]
J9 T2 B-MDQL0 B-TMDQL0
NC_2 RESET B-MRESETB C_DDR_A[6] DDR_A[6]
L1 B-MDQL2 B-TMDQL2
NC_3 C_DDR_A[4] DDR_A[4]
L9 B-MDQL6 B-TMDQL6
NC_4 /C_DDR_CAS /DDR_CAS
T7 F3 B-MDQL4 B-TMDQL4
NC_6 DQSL B-MDQSL AR527 DDR_DQ[15-0]
G3 AR518 22 22
B-MDQSLB B-MDQU7 B-TMDQU7 R1459
DQSL 1/16W
3D 22 C_DDR_DQ[5] 3D Addr:10101--
A9 C7
B-MDQU3
B-MDQU5
B-TMDQU3
B-TMDQU5
C_DDR2_CLK
R1460
DDR2_CLK
C_DDR_DQ[2]
DDR_DQ[5] HDCP EEPROM
VSS_1 DQSU B-MDQSU DDR_DQ[2]
B3
E1
VSS_2 DQSU
B7
B-MDQSUB B-MDMU B-TMDMU
/C_DDR2_CLK
3D 22
/DDR2_CLK
C_DDR_DQ[0]
DDR_DQ[0] 8KBit
AR519 22 C_DDR_DQ[7]
VSS_3 B-MDQU6 B-TMDQU6 R1461 DDR_DQ[7]
G8 E7 3D 22
VSS_4 DML B-MDML B-MDQU0 B-TMDQU0
J2 D3 C_DDR_DQS0P DDR_DQS0P AR528
VSS_5 DMU B-MDMU B-MDQU4 B-TMDQU4 R1462 22
J8 3D 22 +3.3V_AVDD
VSS_6 1/16W
M1 E3 C_DDR_DQS1P DDR_DQS1P C_DDR_DQ[13] 3D
B-MDQL0 DDR_DQ[13]
VSS_7 DQL0 R530 22 R1463 C_DDR_DQ[10]
M9 F7 B-MDQU1 B-TMDQU1 3D 22 DDR_DQ[10]
VSS_8 DQL1 B-MDQL1
P1 F2 R531 10K C_DDR_DQM0 DDR_DQM0 C_DDR_DQ[8]
B-MDQL2 B-MCKE DDR_DQ[8]
VSS_9 DQL2 R1464 C_DDR_DQ[15]
P9 F8 DDR_DQ[15]
VSS_10 DQL3 B-MDQL3 3D 22 IC505
T1 H3 C_DDR_DQM1 DDR_DQM1 CAT24WC08W-T
VSS_11 DQL4 B-MDQL4 R548
T9 H8 R1465 AR529 4.7K
VSS_12 DQL5 B-MDQL5 3D 22 A0 1 VCC
G2 22 8
B-MDQL6 C_DDR_DQS0M DDR_DQS0M 1/16W
DQL6
H7 R1466 C_DDR_DQ[14] 3D A1 2 WP R550 4.7K
DQL7 B-MDQL7 3D 22 DDR_DQ[14] 7
B1 VCC_1.5V_DDR C_DDR_DQ[9]
VSSQ_1 C_DDR_DQS1M DDR_DQS1M DDR_DQ[9] A2 3 SCL 22
B9 D7 C_DDR_DQ[11] 6 R551
R1467 DDR_DQ[11] I2C_SCL
VSSQ_2 DQU0 B-MDQU0 +1.5V_DDR_IN 3D 22
D1 C3 C_DDR_DQ[12] VSS SDA
VSSQ_3 DQU1 B-MDQU1 /C_DDR_CS /DDR_CS DDR_DQ[12] 4 5 I2C_SDA
D8 C8 R552 22
VSSQ_4 DQU2 B-MDQU2
E2 C2 AR530
VSSQ_5 DQU3 B-MDQU3 22
E8 A7 1/16W
VSSQ_6 DQU4 B-MDQU4 L500 C_DDR_DQ[3] 3D
F9 A2 500 C544 C545 DDR_DQ[3]
VSSQ_7 DQU5 B-MDQU5 C_DDR_DQ[4]
G1 B8 Main 10uF 0.1uF DDR_DQ[4]
VSSQ_8 DQU6 B-MDQU6 10V 16V C_DDR_DQ[1]
G9 A3 DDR_DQ[1]
VSSQ_9 DQU7 B-MDQU7 C_DDR_DQ[6]
DDR_DQ[6]
C_DDR_DQ[15-0]
EP[GND]
C655 10K 0
5 6 C654
VIN_3
PWRGD
0.01uF C656 C657 READY
+3.3V_ST 22uF
BOOT
25V 100uF 0.01uF
+3.3V_ST 7 8 R612 16V
25V C622
EN
10K 16V 0.1uF
9 10
11 12
L603
500 +5V_ST G 50V L607
R601 R602 R607
16
15
14
13
Power Main 3.6uH
10K 10K 13 14 10K VIN_1
1 12 PH_3
R606 100 C619 C627
RL_ON
R603 100
15 16
100uF 0.1uF
16V R609 C Q600 VIN_2 2
THERMAL
17 11 PH_2 R1
17 18 16V
5V_ON
RL_ON
10K B Q601 RTR030P02 R621
C603 C604 RT1C3904-T112 C610 C612 GND_1 3 IC603 10 PH_1 43K C630
100pF C633 C651 C652
0.1uF 0.1uF 10uF 0.1uF 1% C653
+3.3V 16V 19 E 16V SN1007054RTER 50V 22uF 10uF 10uF
16V 16V GND_2 SS 0.1uF
4 9 16V 10V 10V 16V
R600
3A C626 0.01uF
8
10K
READY +5V
100
AGND
VSENSE
COMP
RT/CLK
R604 L604
ERROR_DET
R605 100 500
AC_DET Power Main
C602 C628 C631
0.1uF C621 C624 R615 R619
100uF 0.1uF 22uF 10K
16V 100uF 16V R637 75K
16V 16V 16V 330K R2
L605 C618 1/16W
500 2200pF 1%
Power Main
Vout=0.827*(1+R1/R2)
3.3V_AVDD / 2.5AVDD 5V Tuner +5V_TU
Power Main
120-ohm
L610
EAP61606601
L608
+2.5V_AVDD 22.0uH
+3.3V_AVDD
1.5V DDR
MBRA340T3G
Power Main
IC605
120-ohm
P_17V C639
+5V_ST_EN TPS54231D
L611
IC600
R626
105K
IC604 0.1uF
1%
PWRGD
SAM2333 3 6 20K R2
R623
BOOT
C
READY 1%
16K
15
14
13
3.6uH
VIN_1
R624
3.6K
R625 1 12 PH_3
C638
0.015uF 51K THERMAL
VIN_2 2 17 11 PH_2 R1
50V
R620
C609 GND_1 PH_1 10.5K C629
C611 3 IC602 10 100pF C632 C637 C647
10uF 1% C650
16V 0.1uF SN1007054RTER 50V 22uF 10uF 10uF
16V GND_2 SS 0.1uF
4 9
3.3Vst 3.3V 3A C625 0.01uF
16V 10V 10V 16V
5
1.26V Tuner
AGND
VSENSE
COMP
RT/CLK
+5V
LG8300 1.0V SEPARATE GND
3D
LG8300 3.3V / 1.8V R1
L710 0
BLM18PG121SN1D
3D R2000
READY R1440 R2
R762 0 0
0 3D
IC707
VIN_3
PWRGD
3D 3D 3D R2002
BOOT
AZ1117BH-1.8TRE1 +1.8V
C739 L709 L703 R4
EN
15
14
13
3.6uH READY 3D 0
5%
0.01uF CGND3
3D
3D R2005
AGND
VSENSE
COMP
RT/CLK
R779
22K R2 R7
0
3D 1%
10K
R774 3D
R775 R2006
3D 330K
C738 R8
2200pF 0
CGND4
R2007
L/R_DETECT
FLASH_WP
SPI_CK
SPI_DI
SPI_DO
A2
/JTAG_TRST
READY READY
TMODE[0]
TMODE[1]
TMODE[2]
TMODE[3]
BOOT_SEL
F6 F5
JTAG_TDO
JTAG_TDI
JTAG_TMS
TMODE[0] GND_4
22 R1444
22 R904
22 R905
22 R903
22 R910
22 R911
G10
R708 0
R721 0
R722 0
R723 0
R725 0
R726 0
F12
22 R907
22 R909
3D_RF_TXD
4.7K
VDD10_8 GND_8
C781 16V 0.1uF G12 G5 ZD702
VDD10_9 GND_9 5.6B R1456
C785 16V 0.1uF G13 G14 100
VDD10_10 GND_10 5 3D_RFMODULE_RESET
H6 G16
A16
B16
C16
D16
A15
B15
C15
D15
A14
B14
C14
D14
A13
B13
C13
D13
A12
B12
C12
D12
A11
B11
C11
D11
A10
B10
C10
D10
C6
D6
A5
B5
C5
D5
A4
B4
C4
D4
A3
VDD10_11 GND_11
C800 16V 0.1uF H13 H7 R1483
VDD10_12 GND_12 100
C808 16V 0.1uF J6 H8 6 3D_RFMODULE_DC
UART_TXD
UART_RXD
SPI_CS
SPI_SCLK
SPI_DO
SPI_DI
SCL
SDA
SCL_M
SDA_M
GPIO[0]
GPIO[1]
GPIO[2]
GPIO[3]
GPIO[4]
GPIO[5]
GPIO[6]
GPIO[7]
GPIO[8]
GPIO[9]
GPIO[10]
GPIO[11]
GPIO[12]
GPIO[13]
GPIO[14]
GPIO[15]
GPIO[16]
GPIO[17]
GPIO[18]
GPIO[19]
GPIO[20]
GPIO[21]
GPIO[22]
GPIO[23]
GPIO[24]
GPIO[25]
GPIO[26]
GPIO[27]
GPIO[28]
GPIO[29]
GPIO[30]
GPIO[31]
TDI
TMS
TRST
TDO
TCK
TEST_SE
TMODE[0]
TMODE[1]
TMODE[2]
TMODE[3]
BOOT_SEL
VDD10_13 GND_13
C813 16V 0.1uF J13 H9 ZD707
VDD10_14 GND_14 5.6B R1484
C757 16V 0.1uF K6 H10 100
VDD10_15 GND_15 7 3D_RFMODULE_DD
C764 16V 0.1uF K13 H11
VDD10_16 GND_16 ZD708
B2 U18 C771 16V 0.1uF L6 H12 5.6B R1477
TE4P TE4P RA1N 100 LVDS_DATA_1_A- VDD10_17 GND_17 1K
B1 U17 R1438 L7 H14 8
TE4N LVDS_DATA_1_A+ VDD10_18 GND_18
TE4N RA1P L8 H15
B3 T18
TD4P TD4P RB1N 100 LVDS_DATA_1_B- VDD10_19 GND_19
C3 T17 R1439 L9 H16 R1453 100
TD4N LVDS_DATA_1_B+ VDD10_20 GND_20 9 3D_RF_GPIO0
TD4N RB1P L10 J7
C1 R18 ZD703
TCLK4P TCLK4P RC1N 100 LVDS_DATA_1_C- VDD10_21 GND_21 5.6B
C2 R17 R896 L11 J8
TCLK4N LVDS_DATA_1_C+ VDD10_22 GND_22 R1469 100
TCLK4N RC1P L12 J9 10
D2 P18 3D_RF_GPIO1
TC4P TC4P RCLK1N 100 LVDS_CLK_1- VDD10_23 GND_23 ZD704
D1 P17 R894 +1.0V L13 J10
LVDS_CLK_1+ VDD10_24 GND_24 5.6B
TC4N TC4N RCLK1P M6 J11 R1470 100
D3 N18 L704 11
TB4P TB4P RD1N 100 LVDS_DATA_1_D- VDD10_25 GND_25 3D_RF_GPIO2
E3 N17 R891 BLM18PG121SN1D M13 J12
LVDS_DATA_1_D+ VDD10_26 GND_26 ZD705
TB4N TB4N RD1P +1.0V_LTX J14 5.6B
E1 M18
TA4P TA4P RE1N 100 LVDS_DATA_1_E- GND_27 R1455 22
E2 M17 R883 C820 6.3V 10uF H5 J15 12 3D_L/R_SYNC
TA4N LVDS_DATA_1_E+ LTX_VDD10_1 GND_28
TA4N RE1P C795 16V 0.1uF J5 J16 ZD706
LTX_VDD10_2 GND_29 5.6B
K5 K7 13 R1478 R1479 R1480
F2 L18 C803 16V 0.1uF 1K 1K 1K
TE3P TE3P RA2N 100 LVDS_DATA_2_A- LTX_VDD10_3 GND_30
F1 L17 R878 C811 16V 0.1uF L5 K8
TE3N LVDS_DATA_2_A+ LTX_VDD10_4 GND_31
TE3N RA2P C828 16V 0.1uF M5 K9
F3 K18
LTX_VDD10_5
TD3P
TD3N
TCLK3P
G3
G1
TD3P
TD3N
TCLK3P
IC700 RB2N
RB2P
RC2N
K17
J18
R845
R895
100
100
LVDS_DATA_2_B-
LVDS_DATA_2_B+
LVDS_DATA_2_C-
+3.3V_3D
L705
C821 16V 0.1uF
GND_32
GND_33
GND_34
K10
K11
G2 J17 BLM18PG121SN1D E5 K12
TCLK3N LVDS_DATA_2_C+ VDD33_1 GND_35
TCLK3N RC2P +3.3V_VDD E6 K14
H2 H18
TC3P TC3P RCLK2N 100 LVDS_CLK_2- VDD33_2 GND_36
H1 H17 R874 C794 6.3V 10uF E7 K15
LVDS_CLK_2+ VDD33_3
TC3N
TB3P
TB3N
H3
J3
TC3N
TB3P
TB3N
LG8300 RCLK2P
RD2N
RD2P
G18
G17 R840
100 LVDS_DATA_2_D-
LVDS_DATA_2_D+
C758 16V
C765 16V
0.1uF
0.1uF
E8
E9
VDD33_4
VDD33_5
GND_37
GND_38
GND_39
K16
L14
J1 F18 C778 16V 0.1uF E10 L15
TA3P TA3P RE2N 100 LVDS_DATA_2_E- VDD33_6 GND_40
J2 F17 R897 C772 16V 0.1uF E11 M7
TA3N LVDS_DATA_2_E+ VDD33_7 GND_41
TA3N RE2P C782 16V 0.1uF E12 M8
VDD33_8 GND_42
27pF
C721
E13 M9
50V
K2
TE2P TE2P VDD33_9 GND_43
K1 A17 E14 M10
TE2N TE2N CLK_XIN VDD33_10 GND_44
K3 B18 E15 M11
25MHz
X700
VDD33_11 GND_45
R744
L1 BLM18PG121SN1D
TCLK2P TCLK2P VDD33_13 GND_47
L2 V2 +3.3V_LRX M15
TCLK2N TCLK2N LR_SYNC GND_48
M2 V3 C832 6.3V 10uF L16 N5
TC2P TC2P EMITTER_PULSE LRX_AVDD33_1 GND_49
M1 C829 16V 0.1uF N16 N6
TC2N R1452 LRX_AVDD33_2 GND_50
TC2N 0 C831 16V 0.1uF N15
M3
TB2P TB2P LG8300_RESET GND_51
N3 +3.3V_LTX E4 P5
TB2N TB2N LTX_AVDD33_1 GND_52
N1 R1450 L706 C833 6.3V 10uF G4 P11
TA2P TA2P 0 LTX_AVDD33_2 GND_53
N2 3D_L/R_SYNC BLM18PG121SN1D C796 16V 0.1uF L4 R4
TA2N TA2N LTX_AVDD33_3 GND_54
C804 16V 0.1uF N4 R14
LTX_AVDD33_4 GND_55
P2 C812 16V 0.1uF J4
TE1P TE1P LTX_AVDD33_5
P1 C815 16V 0.1uF M16
TE1N TE1N LRX_AVSS33_1
P3 C816 16V 0.1uF P16
TD1P TD1P LRX_AVSS33_2
R3 C836 6.3V 10uF T4
TD1N TD1N DDR_VREF0
R1 C835 16V 0.1uF R11 F4
TCLK1P TCLK1P DDR_VREF1 LTX_AVSS33_1
R2 DDR_VREF_LG8300 C817 16V 0.1uF V17 H4
TCLK1N TCLK1N DDR_VREF2 LTX_AVSS33_2
T2 C837 16V 0.1uF K4
TC1P TC1P LTX_AVSS33_3
T1 N7 M4
TC1N TC1N DDR_VDDQ_1 LTX_AVSS33_4
T3 N8 P4
TB1P TB1P +1.8V DDR_VDDQ_2 LTX_AVSS33_5
U3 N9
TB1N TB1N DDR_VDDQ_3
U1 C838 6.3V 10uF N10
TA1P TA1P DDR_VDDQ_4
N11 C17
DDR_ADDR[10]
DDR_ADDR[11]
DDR_ADDR[12]
DDR_DQS_N[0]
DDR_DQS_N[1]
DDR_TDOUT[0]
DDR_TDOUT[1]
DDR_DQ[10]
DDR_DQ[11]
DDR_DQ[12]
DDR_DQ[13]
DDR_DQ[14]
DDR_DQ[15]
DDR_RAS_N
DDR_CAS_N
DDR_DM[0]
DDR_DM[1]
DDR_DQ[0]
DDR_DQ[1]
DDR_DQ[2]
DDR_DQ[3]
DDR_DQ[4]
DDR_DQ[5]
DDR_DQ[6]
DDR_DQ[7]
DDR_DQ[8]
DDR_DQ[9]
DDR_TAOUT
DDR_VDDQ_6 SYSPLL_AVSS33
DDR_CK_N
DDR_CS_N
DDR_WE_N
DDR_ODT
U9
T9
V6
U6
V9
R5
U4
V4
T5
R10
V14
V12
U14
U12
R15
T12
C_DDR_DQ[0] V15
T15
U16
T16
R16
V16
T14
U15
T13
V11
U13
U11
T11
V13
R12
R13
U10
T10
V10
DDR_VDDQ_11 SYSPLL_AVDD33
C793 16V 0.1uF P9 E17 C766 0.1uF
DDR_VDDQ_12 SSPLL_AVDD33
C_DDR_A[0]
C_DDR_A[1]
C_DDR_A[2]
C_DDR_A[3]
C_DDR_A[4]
C_DDR_A[5]
C_DDR_A[6]
C_DDR_A[7]
C_DDR_A[8]
C_DDR_A[9]
DDR_VDDQ_14
C814 16V 0.1uF P13
C_DDR_BA[0]
C_DDR_BA[1]
/C_DDR_WE
C_DDR2_CLK
C_DDR2_ODT
/C_DDR_RAS
/C_DDR_CAS
C_DDR_DQM0
C_DDR_DQM1
/C_DDR2_CLK
C_DDR_DQS0P
C_DDR_DQS1P
C_DDR_DQS0M
C_DDR_DQS1M
/C_DDR_CS
C_DDR2_CKE
DDR_VDDQ_15
P14
DDR_VDDQ_16
C_DDR_A[12-0]
P15
DDR_VDDQ_17
C_DDR_DQ[15-0]
WP CLK
3 6
SPI_CK /JTAG_TRST
C TP1
GND DIO
B Q703 4 5 SPI_DI JTAG_TDI TP2
FLASH_WP KRC103S JTAG_TDO
READY TP3
E DDR_VREF_LG8300 DDR_VREF_DDR
JTAG_TMS TP4 R998 R996
JTAG_TCLK TP5 4.7K 4.7K
0 R759 1% 1%
TP6
SW700
JTP-1127WEM R757 R772 Close to LG8300 Close to DDR2(IC701)
1 2 0 10K
LG8300_RESET
C737
3 4 0.1uF
16V
PA11A_K
-Vy adjustment
Vy Vsc Vzb
A5
Vzb adjustment
Vy Vsc Vzb
A5
Pic. 1. Pic. 2.
A7
▣ Check Method
① Check input voltages(5V, Va, Vs) at P103 connector. YSUS board
② Check it is short or not between Vs and GND at P103 connector.
③ Check all of fuses open. (FS201, FS202, FS203, FS501)
④ Check voltage of diode , FET by using digital multi-meter. FS203
Vs fuse
▣ Measurement method
Diode FET P113
FS202
5V fuse
FS201
▣ Specifications Va fuse
Position Direction Circuit No. FS501
D610 Q606,Q607 Q608,Q609 18V fuse
HS601 Forward 0.35V ~ 0.45V 0.45V~0.55V 0.45V~0.55V
Reverse O.L. (Overload)
HS603
HS601
HS602
D604,D605 Q601,Q602
HS602 Forward 0.35V ~ 0.45V 0.45V~0.55V
Reverse O.L. (Overload)
D602 Q603,Q605 Q610,Q612
HS603 Forward 0.35V ~ 0.45V 0.35V ~ 0.45V 0.4V~0.5V
Reverse O.L. (Overload)
A8
A9
▣ Specifications
HS101
Position Direction Circuit No.
HS102
D114,D118 Q107, Q110 Q106, Q109
HS101 Forward 0.35V ~ 0.45V 0.35V ~ 0.45V 0.35V ~ 0.45V
Reverse O.L. (Overload)
D109,D110,D108,D111 Q104,Q113,Q114 Q102,Q103
HS102 Forward 0.35V ~ 0.45V 0.5V ~ 0.6V 0.45V~0.55V
Reverse O.L. (Overload)
FS202
5V fuse
A9
GND
③ If LED doesn’t work, check crystal X1 output.
④ Check 3.3V, 5V IC.
⑤ Check MCM at VS_DA by using digital multi meter.
② Check LED On
③ Check Crystal(X1)
Check oscillation of Crystal
(Normal: 25 MHZ)
⑤ Check MCM
P2(18V)
P105_FL1,FL2(5V) Pin14, 15
MCM Check point
(+)VS_DA / (-) GND
(Normal: 3.3V ) Pin 14,15 : 18V
A14
A15
▣ Y drive board
Scan IC
A16
A18
First of all, Check whether all of cable between board was inserted properly or not.
Next, Check whether there is foreign material on connector.
Symptom picture defects description To action
1. Check connection
(CTRL B/D, X B/D)
Regular vertical lines
2. Check CTRL B/D
3. Replace CTRL B/D
1. Check connection
(CTRL B/D, X B/D)
Vertical lines or Bar
2. Check CTRL B/D
3. Replace CTRL B/D
1. Check connection
(CTRL B/D, X B/D)
Many irregular vertical lines
2. Check CTRL B/D
3. Replace CTRL B/D
1. Check connection
(Y-Sus B/D ↔Panel)
Horizontal Line or Bar
2. Check Y-Sus B/D
3. Replace Y-Sus B/D
A19
1. Check foreign & Connection status TCP (Tape Carrier Package) is film Connector to connect between
2. Check bad soldering for IC connect with Electrode pattern Electrode PAD Of PANEL and
on Chip resistance (Direct Bonding) on X B/D Y Drive B/D,Z-Sus B/D
▣ Defect symptom
A20