FAN7621 — PFM Controller for Half-Bridge Resonant Converters

July 2010

FAN7621
PFM Controller for Half-Bridge Resonant Converters
Features Description
ƒ Variable Frequency Control with 50% Duty Cycle The FAN7621 is a pulse frequency modulation controller
for Half-bridge Resonant Converter Topology for high-efficiency half-bridge resonant converters.
Offering everything necessary to build a reliable and
ƒ High Efficiency through Zero Voltage Switching (ZVS) robust resonant converter, the FAN7621 simplifies
ƒ Fixed Dead Time (350ns) designs and improves productivity, while improving
ƒ Up to 300kHz Operating Frequency performance. The FAN7621 includes a high-side gate-
ƒ Pulse Skipping for Frequency Limit (Programmable) drive circuit, an accurate current controlled oscillator,
frequency limit circuit, soft-start, and built-in protection
at Light-Load Condition
functions. The high-side gate-drive circuit has a
ƒ Remote On/Off Control Using CON Pin common-mode noise cancellation capability, which
ƒ Protection Functions: Over-Voltage Protection guarantees stable operation with excellent noise
(OVP), Overload Protection (OLP), Over-Current immunity. Using the zero-voltage-switching (ZVS)
Protection (OCP), Abnormal Over-Current Protection technique dramatically reduces the switching losses and
efficiency is significantly improved. The ZVS also
(AOCP), Internal Thermal Shutdown (TSD)
reduces the switching noise noticeably, which allows a
small-sized Electromagnetic Interference (EMI) filter.
Applications The FAN7621 can be applied to various resonant
ƒ PDP and LCD TVs converter topologies; such as series resonant, parallel
resonant, and LLC resonant converters.
ƒ Desktop PCs and Servers
ƒ Adapters
ƒ Telecom Power Supplies Related Resources
ƒ Video Game Consoles
AN4151 — Half-bridge LLC Resonant Converter Design
TM
using FSFR-series Fairchild Power Switch (FPS )

Ordering Information
Operating Junction
Part Number Package Packaging Method
Temperature

FAN7621N 16-Lead, Dual Inline Package (DIP) Tube

FAN7621SJ -40°C ~ 130°C 16-Lead, Small-Outline Package (SOP) Tube
FAN7621SJX 16-Lead, Small-Outline Package (SOP) Tape & Reel

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FAN7621 • Rev. 1.0.3
 FAN7621 — PFM Controller for Half-Bridge Resonant Converters
Application Circuit Diagram
D1
Cr

L lk Np VO
Ns
VCC
LVcc Lm
HV CC
Ns
RT

FAN7621
HO

CON D2 CF R F
CDL CTR

VIN
LO
KA431
CS

SG PG

Rsense

Figure 1. Typical Application Circuit (LLC Resonant Half-Bridge Converter)

Block Diagram
LVCC
12

+
LVCC good
VREF I CTC VREF
+
11.3 / 14.5V - 8.7 / 9.2V
S Q
HVCC good
-
3V - Internal
I CTC R -Q Bias +
2ICTC 1V +

F/F 1 HVCC
-

2V
Time High-Side
HO
+
Level-Shift 3
- Delay Gate Drive
350ns
RT 8
2 CTR
Counter (1/4)
LVCC
I OLP
Time Balancing Low-Side
CON 6 -
Delay Delay Gate Drive
14 LO
0.4 / 0.6 V
+ 350ns
+

OLP Shutdown without delay

5V -
S Q

LVCC +
LVCC good R -Q + -1
50ns Delay
Auto-restart Q S
0.9 V
-
23 V - Protection
OVP -Q R V AOCP
Latch TSD 16 PG
Protection
LVCC < 5V
V OCP

Delay
- 0.58 V 10 SG
1.5µs +

CS
Figure 2. Internal Block Diagram

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FAN7621 • Rev. 1.0.3 2
 FAN7621 — PFM Controller for Half-Bridge Resonant Converters
Pin Configuration

(1) HVCC PG (16)

(2) CTR NC (15)

(3) HO LO (14)

(4) NC NC (13)
FAN7621
(5) NC LVCC (12)

(6) CON NC (11)

(7) NC SG (10)

(8) RT CS (9)

Figure 3. Package Diagram

Pin Definitions
Pin # Name Description
1 HVCC This is the supply voltage of the high-side gate-drive circuit IC.
2 CTR This is the drain of the low-side MOSFET. Typically, a transformer is connected to this pin.
3 HO This is the high-side gate driving signal.
4 NC No connection.
5 NC No connection.
This pin is for a protection and enabling/disabling the controller. When the voltage of this pin
is above 0.6V, the IC operation is enabled. When the voltage of this pin drops below 0.4V,
6 CON
gate drive signals for both MOSFETs are disabled. When the voltage of this pin increases
above 5V, protection is triggered.
7 NC No connection.
This pin programs the switching frequency. Typically, an opto-coupler is connected to
8 RT
control the switching frequency for the output voltage regulation.
This pin senses the current flowing through the low-side MOSFET. Typically, negative
9 CS
voltage is applied on this pin.
10 SG This pin is the control ground.
11 NC No connection.
12 LVCC This pin is the supply voltage of the control IC.
13 NC No connection.
14 LO This is the low-side gate driving signal.
15 NC No connection.
16 PG This pin is the power ground. This pin is connected to the source of the low-side MOSFET.

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FAN7621 • Rev. 1.0.3 3
 FAN7621 — PFM Controller for Half-Bridge Resonant Converters
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In
addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only. TA=25°C unless otherwise specified.

Symbol Parameter Min. Max. Unit

VHO High-Side Gate Driving Voltage VCTR-0.3 HVCC
V
VLO Low-Side Gate Driving Voltage -0.3 LVCC
LVCC Low-Side Supply Voltage -0.3 25.0 V
HVCC to VCTR High-Side VCC Pin to Center Voltage -0.3 25.0 V
VCTR Center Voltage -0.3 600.0 V
VCON Control Pin Input Voltage -0.3 LVCC V
VCS Current Sense (CS) Pin Input Voltage -5.0 1.0 V
VRT RT Pin Input Voltage -0.3 5.0 V
dVCTR/dt Allowable Center Voltage Slew Rate 50 V/ns
16-DIP 1.56 W
PD Total Power Dissipation
16-SOP 1.13 W
(1)
Maximum Junction Temperature +150
TJ (1) °C
Recommended Operating Junction Temperature -40 +130
TSTG Storage Temperature Range -55 +150 °C
Note:
1. The maximum value of the recommended operating junction temperature is limited by thermal shutdown.

Thermal Impedance
Symbol Parameter Value Unit
16-DIP 80
θJA Junction-to-Ambient Thermal Impedance ºC/W
16-SOP 110

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FAN7621 • Rev. 1.0.3 4
 FAN7621 — PFM Controller for Half-Bridge Resonant Converters
Electrical Characteristics
TA=25°C and LVCC=17V unless otherwise specified.

Symbol Parameter Test Conditions Min. Typ. Max. Unit

Supply Section
ILK Offset Supply Leakage Current HVCC=VCTR 50 μA
IQHVCC Quiescent HVCC Supply Current (HVCCUV+) - 0.1V 50 120 μA
IQLVCC Quiescent LVCC Supply Current (LVCCUV+) - 0.1V 100 200 μA
fOSC=100kHz, VCON > 0.6V,
Operating HVCC Supply Current 5 8 mA
IOHVCC CLoad=1nF
(RMS Value)
No Switching, VCON < 0.4V 100 200 μA
fOSC=100kHz, VCON > 0.6V,
Operating LVCC Supply Current 6 9 mA
IOLVCC CLoad=1nF
(RMS Value)
No Switching, VCON < 0.4V 2 4 mA
UVLO Section
LVCCUV+ LVCC Supply Under-Voltage Positive Going Threshold (LVCC Start) 13.0 14.5 16.0 V
LVCCUV- LVCC Supply Under-Voltage Negative Going Threshold (LVCC Stop) 10.2 11.3 12.4 V
LVCCUVH LVCC Supply Under-Voltage Hysteresis 3.2 V
HVCCUV+ HVCC Supply Under-Voltage Positive Going Threshold (HVCC Start) 8.2 9.2 10.2 V
HVCCUV- HVCC Supply Under-Voltage Negative Going Threshold (HVCC Stop) 7.8 8.7 9.6 V
HVCCUVH HVCC Supply Under-Voltage Hysteresis 0.5 V
Oscillator & Feedback Section
VCONDIS Control Pin Disable Threshold Voltage 0.36 0.40 0.44 V
VCONEN Control Pin Enable Threshold Voltage 0.54 0.60 0.66 V
VRT V-I Converter Threshold Voltage 1.5 2.0 2.5 V
fOSC Output Oscillation Frequency RT=5.2kΩ 94 100 106 kHz
DC Output Duty Cycle 48 50 52 %
fSS Internal Soft-Start Initial Frequency fSS=fOSC+40kHz, RT=5.2kΩ 140 kHz
tSS Internal Soft-Start Time 2 3 4 ms
Output Section
Isource Peak Sourcing Current HVCC=17V 250 360 mA
Isink Peak Sinking Current HVCC=17V 460 600 mA
tr Rising Time 65 ns
CLoad=1nF, HVCC=17V
tf Falling Time 35 ns
High Level of High-Side Gate Driving
VHOH 1.0 V
Signal (VHVCC-VHO)
Low Level of High-Side Gate Driving
VHOL 0.6 V
Signal
IO=20mA
High Level of High-Side Gate Driving
VLOH 1.0 V
Signal (VLVCC-VLO)
Low Level of High-Side Gate Driving
VLOL 0.6 V
Signal

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FAN7621 • Rev. 1.0.3 5
 FAN7621 — PFM Controller for Half-Bridge Resonant Converters
Electrical Characteristics (Continued)
TA=25°C and LVCC=17V unless otherwise specified.

Symbol Parameter Test Conditions Min. Typ. Max. Unit

Protection Section
IOLP OLP Delay Current VCON=4V 3.8 5.0 6.2 μA
VOLP OLP Protection Voltage VCON > 3.5V 4.5 5.0 5.5 V
VOVP LVCC Over-Voltage Protection LVCC > 21V 21 23 25 V
VAOCP AOCP Threshold Voltage -1.0 -0.9 -0.8 V
tBAO AOCP Blanking Time 50 ns
VOCP OCP Threshold Voltage -0.64 -0.58 -0.52 V
(2)
tBO OCP Blanking Time 1.0 1.5 2.0 μs
Delay Time (Low-Side) Detecting from
tDA (2) 250 400 ns
VAOCP to Switch Off
(2)
TSD Thermal Shutdown Temperature 110 130 150 °C
Protection Latch Sustain LVCC Supply
ISU LVCC=7.5V 100 150 μA
Current
Protection Latch Reset LVCC Supply
VPRSET 5 V
Voltage
Dead-Time Control Section
DT Dead Time 350 ns
Note:
2. These parameters, although guaranteed, are not tested in production.

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FAN7621 • Rev. 1.0.3 6
 FAN7621 — PFM Controller for Half-Bridge Resonant Converters
Typical Performance Characteristics
These characteristic graphs are normalized at TA=25ºC.

1.1 1.1

1.05 1.05
Normalized at 25OC

Normalized at 25OC
1 1

0.95 0.95

0.9 0.9
-50 -25 0 25 50 75 100 -50 -25 0 25 50 75 100
O
Temp ( C) Temp (OC)

Figure 4. Low-Side MOSFET Duty Cycle Figure 5. Switching Frequency vs. Temperature
vs. Temperature

1.1 1.1

1.05 1.05
Normalized at 25OC
Normalized at 25OC

1 1

0.95 0.95

0.9 0.9
-50 -25 0 25 50 75 100 -50 -25 0 25 50 75 100
Temp (OC) Temp (OC)

Figure 6. High-Side VCC (HVCC) Start vs. Temperature Figure 7. High-Side VCC (HVCC) Stop vs. Temperature

1.1 1.1

1.05 1.05
Normalized at 25OC
Normalized at 25OC

1 1

0.95 0.95

0.9 0.9
-50 -25 0 25 50 75 100 -50 -25 0 25 50 75 100

Temp (OC) Temp (OC)

Figure 8. Low-Side VCC (LVCC) Start vs. Temperature Figure 9. Low-Side VCC (LVCC) Stop vs. Temperature

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FAN7621 • Rev. 1.0.3 7
 FAN7621 — PFM Controller for Half-Bridge Resonant Converters
Typical Performance Characteristics (Continued)
These characteristic graphs are normalized at TA=25ºC.

1.1 1.1

1.05 1.05

Normalized at 25OC
Normalized at 25OC

1 1

0.95 0.95

0.9 0.9
-50 -25 0 25 50 75 100 -50 -25 0 25 50 75 100

Temp (OC) Temp (OC)

Figure 10. OLP Delay Current vs. Temperature Figure 11. OLP Protection Voltage vs. Temperature

1.1 1.1

1.05 1.05
Normalized at 25OC

Normalized at 25OC

1 1

0.95 0.95

0.9 0.9
-50 -25 0 25 50 75 100 -50 -25 0 25 50 75 100
Temp (OC) Temp (OC)

Figure 12. LVCC OVP Voltage vs. Temperature Figure 13. RT Voltage vs. Temperature

1.1 1.1

1.05 1.05
Normalized at 25OC
Normalized at 25OC

1 1

0.95 0.95

0.9 0.9
-50 -25 0 25 50 75 100 -50 -25 0 25 50 75 100

Temp (OC) Temp (OC)

Figure 14. CON Pin Enable Voltage vs. Temperature Figure 15. OCP Voltage vs. Temperature

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FAN7621 • Rev. 1.0.3 8
 FAN7621 — PFM Controller for Half-Bridge Resonant Converters
Functional Description
Gain
1. Basic Operation
FAN7621 is designed to drive high-side and low-side 1.8
MOSFETs complementarily with 50% duty cycle. A fixed max
dead time of 350ns is introduced between consecutive f min f normal f f ISS
transitions, as shown in Figure 16. 1.6
Dead t ime

High-side 1.4
MOSFET
gate drive
1.2

Low-side 1.0
MOSFET Soft-sta rt
gate drve
time 0.8
Figure 16. MOSFETs Gate Drive Signal

0.6
60 70 80 90 100 110 120 130 140 150
Frequency (kHz)
2. Internal Oscillator
Figure 18. Resonant Converter Typical Gain Curve
FAN7621 employs a current-controlled oscillator, as
shown in Figure 17. Internally, the voltage of RT pin is
regulated at 2V and the charging / discharging current
for the oscillator capacitor, CT, is obtained by copying the VCC
current flowing out of RT pin (ICTC) using a current mirror. LVCC
Therefore, the switching frequency increases as ICTC HV CC
increases.
RT

FAN7621
Rmax
I CTC Rmin RSS HO
VREF +

S Q CON
3V -
CSS CTR
I CTC R -Q
2I CTC 1V +

CT F/F
-
LO
CS

-
2V SG PG
RT Counter
(1/4)
8 Gate drive

R sense
Figure 17. Current Controlled Oscillator Figure 19. Frequency Control Circuit
The minimum switching frequency is determined as:
5.2k Ω (1)
3. Frequency Setting f min = × 100(kHz )
Rmin
Figure 18 shows the typical voltage gain curve of a
resonant converter, where the gain is inversely Assuming the saturation voltage of opto-coupler
proportional to the switching frequency in the ZVS transistor is 0.2V, the maximum switching frequency is
region. The output voltage can be regulated by determined as:
modulating the switching frequency. Figure 19 shows the 5.2k Ω 4.68k Ω
typical circuit configuration for RT pin, where the opto- f max = ( + ) × 100(kHz ) (2)
coupler transistor is connected to the RT pin to modulate Rmin Rmax
the switching frequency. To prevent excessive inrush current and overshoot of
output voltage during startup, increase the voltage gain
of the resonant converter progressively. Since the
voltage gain of the resonant converter is inversely
proportional to the switching frequency, the soft-start is
© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com
FAN7621 • Rev. 1.0.3 9
 FAN7621 — PFM Controller for Half-Bridge Resonant Converters
implemented by sweeping down the switching frequency
ISS
from an initial high frequency (f ) until the output
voltage is established. The soft-start circuit is made by VCC
connecting R-C series network on the RT pin, as shown LV CC
in Figure 19. FAN7621 also has an internal soft-start for
HV CC
3ms to reduce the current overshoot during the initial
cycles, which adds 40kHz to the initial frequency of the RT
external soft-start circuit, as shown in Figure 20. The

FAN7621
initial frequency of the soft-start is given as: Rmax
R min RSS HO

5.2k Ω 5.2k Ω CON

f ISS = ( + ) × 100 + 40 (kHz ) (3) CSS CTR
Rmin RSS
It is typical to set the initial (soft-start) frequency of two ~ LO
three times the resonant frequency (fO) of the resonant
CS
network.
The soft-start time is three to four times the RC time
SG PG
constant. The RC time constant is as follows:

TSS = RSS ⋅ CSS (4)

fs Figure 22. Control Pin Configuration for
Pulse Skipping
ISS
f
40kHz
Remote On / Off: When an auxiliary power supply is
Control loop
used for standby, the main power stage using FAN7621
take over can be shut down by pulling down the control pin
voltage, as shown in Figure 23. R1 and C1 are used to
ensure soft-start when switching resumes.

Main
OP1
time Output

Figure 20. Frequency Sweeping of Soft-Start R1

4. Control Pin C1
The FAN7621 has a control pin for protection, cycle
skipping, and remote on/off. Figure 21 shows the internal FAN7621 Main Off
block diagram for control pin.

LVCC
RT
Rmin Aux
IOLP Output
CON 6 -

0.4 / 0.6V
+

Stop Switching
+
CON
OLP S Q
5V -

R -Q
LVCC +
OP1
LVCC good Auto-restart
23V - protection
OVP
Figure 23. Remote On / Off Circuit
Figure 21. Internal Block of Control Pin
Protection: When the control pin voltage exceeds 5V, 5. Protection Circuits
protection is triggered. Detailed applications are The FAN7621 has several self-protective functions, such
described in the protection section. as Overload Protection (OLP), Over-Current Protection
(OCP), Abnormal Over-Current Protection (AOCP),
Pulse Skipping: FAN7621 stops switching when the
Over-Voltage Protection (OVP), and Thermal Shutdown
control pin voltage drops below 0.4V and resumes (TSD). OLP, OCP, and OVP are auto-restart mode
switching when the control pin voltage rises above 0.6V. protections; while AOCP and TSD are latch-mode
To use pulse-skipping, the control pin should be protections, as shown in Figure 24.
connected to the opto-coupler collector pin. The
frequency that causes pulse skipping is given as: 5.1 Auto-Restart Mode Protection: Once a fault
condition is detected, switching is terminated and the
5.2 k 4.16 k
SKIP
= + x100(kHz) (5)
MOSFETs remain off. When LVCC falls to the LVCC stop
R min R max voltage of 11.3V, the protection is reset. FAN7621

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FAN7621 • Rev. 1.0.3 10
 FAN7621 — PFM Controller for Half-Bridge Resonant Converters
resumes normal operation when LVCC reaches the start 5.4 Current Sensing Using Resonant Capacitor
voltage of 14.5V. Voltage: For high-power applications, current sensing
using a resistor may not be available due to the severe
5.2 Latch-Mode Protection: Once this protection is
power dissipation in the resistor. In that case, indirect
triggered, switching is terminated and the gate output
current sensing using the resonant capacitor voltage can
signals remain off. The latch is reset only when LVCC is
be a good alternative because the amplitude of the
discharged below 5V. p-p
resonant capacitor voltage (Vcr ) is proportional to the
p-p
LV CC resonant current in the primary side (Ip ) as:
I p p− p
12

+
LV CC good Internal VCr p − p = (6)
11/ 14 V -
V RE F
Bias 2π f sCr
To minimize power dissipation, a capacitive voltage
Shutdown divider is generally used for capacitor voltage sensing,
OCP as shown in Figure 27.
Auto-restart Latch
OLP protection protection
Q S
AOCP
S Q LVCC
OVP CDL
-Q R HV CC
LV CC good R -Q
F/F TSD
CON F/F RT

FAN7621
20k
LV CC < 5V HO Ip
CON
CTR
Figure 24. Protection Blocks
LO
5.3 Current Sensing Using Resistor: FAN7621 CS
senses drain current as a negative voltage, as shown in SG PG

Figure 25 and Figure 26. Half-wave sensing allows low CB

Csense
power dissipation in the sensing resistor, while full-wave
sensing has less switching noise in the sensing signal. V sense 100
Cr

LV CC
Ip
HV CC

RT
FAN7621

HO
C DL CON
CTR VCr
I ds VCrp-p
V CS LO
CS

SG PG
Vsensepk CB Vsensepk
Vsense = = VCON
V CS VCr p− p Csense+ C B 2
R sense
I ds
V sensepk
VCON

Figure 25. Half-Wave Sensing Vsensepk

I ds tDelay =R dC d

Figure 27. Current Sensing Using Resonant

Capacitor Voltage
LVCC V CS
HV CC 5.5 Over-Current Protection (OCP): When the
RT sensing pin voltage drops below -0.6V, OCP is triggered
FAN7621

HO and the MOSFETs remain off. This protection has a

C DL CON shutdown time delay of 1.5µs to prevent premature
CTR
shutdown during startup.
V CS LO
CS
5.6 Abnormal Over-Current Protection (AOCP): If
the secondary rectifier diodes are shorted, large current
SG PG
with extremely high di/dt can flow through the MOSFET
before OCP or OLP is triggered. AOCP is triggered
R sense without shutdown delay when the sensing pin voltage
I ds
drops below -0.9V. This protection is latch mode and
reset when LVCC is pulled down below 5V.
Figure 26. Full-Wave Sensing

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FAN7621 • Rev. 1.0.3 11
 FAN7621 — PFM Controller for Half-Bridge Resonant Converters
5.7 Overload Protection (OLP): Overload is
defined as the load current exceeding its normal level 6. PCB Layout Guideline
due to an unexpected abnormal event. In this situation, Duty imbalance problems may occur due to the radiated
the protection circuit should trigger to protect the power noise from main transformer, the inequality of the
supply. However, even when the power supply is in the secondary-side leakage inductances of main
normal condition, the overload situation can occur during transformer, and so on. Among them, it is one of the
the load transition. To avoid premature triggering of dominant reasons that the control components in the
protection, the overload protection circuit should be vicinity of RT pin are enclosed by the primary current flow
designed to trigger only after a specified time to pattern on PCB layout. The direction of the magnetic
determine whether it is a transient situation or a true field on the components caused by the primary current
overload situation. Figure 27 shows a typical overload flow is changed when the high-and-low side MOSFET
protection circuit. By sensing the resonant capacitor turns on by turns. The magnetic fields with opposite
voltage on the control pin, the overload protection can be direction from each other induce a current through, into,
implemented. Using RC time constant, shutdown delay or out of the RT pin, which makes the turn-on duration of
can be also introduced. The voltage obtained on the each MOSFET different. It is strongly recommended to
control pin is given as: separate the control components in the vicinity of RT pin
from the primary current flow pattern on PCB layout.
CB (7)
VCON = VCr p − p Figure 28 shows an example for the duty-balanced case.
2(CB + Csense ) The yellow and blue lines show the primary current flows
p-p when the lower-side and higher-side MOSFETs turns on,
where VCr is the amplitude of the resonant capacitor respectively. The primary current does not enclose any
voltage. component of controller.
5.8 Over-Voltage Protection (OVP): When the It is helpful to reduce the duty imbalance to make the
LVCC reaches 23V, OVP is triggered. This protection is loop configured between CON pin and opto-coupler as
used when auxiliary winding of the transformer to supply small as possible, as shown in the red line in Figure 28.
VCC to the controller is utilized.
5.9 Thermal Shutdown (TSD): If the temperature
of the junction exceeds approximately 130°C, the
thermal shutdown triggers.

Figure 28. Example for Duty Balancing

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FAN7621 • Rev. 1.0.3 12
 FAN7621 — PFM Controller for Half-Bridge Resonant Converters
Typical Application Circuit (Half-Bridge LLC Resonant Converter)
Output Voltage
Application Device Input Voltage Range Rated Output Power
(Rated Current)
390VDC
LCD TV FAN7621 200W 24V-8.3A
(340~400VDC)

Features
ƒ High efficiency ( >94% at 400VDC input)
ƒ Reduced EMI noise through zero-voltage-switching (ZVS)
ƒ Enhanced system reliability with various protection functions

FAN7621

Figure 29. Typical Application Circuit

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FAN7621 • Rev. 1.0.3 13
 FAN7621 — PFM Controller for Half-Bridge Resonant Converters
Typical Application Circuit (Continued)
Usually, LLC resonant converters require large leakage inductance value. To obtain a large leakage inductance,
sectional winding method is used.

ƒ Core: EC35 (Ae=106 mm )

2

ƒ Bobbin: EC35 (Horizontal)

ƒ Transformer Model Number: SNX-2468-1

EC35

2 Np 13 N
s2
12 N
s1

10
6 9

Figure 30. Transformer Construction

Pins (S → F) Wire Turns Note

Np 6→2 0.08φ×88 (Litz Wire) 36

Ns1 12 → 9 0.08φ×234 (Litz Wire) 4 Bifilar Winding

Ns2 10 → 13 0.08φ×234 (Litz Wire) 4 Bifilar Winding

Pins Specifications Remark

Primary-Side Inductance (Lp) 2－6 550μH ± 10% 100kHz, 1V

Primary-Side Effective Leakage (Lr) 2－6 110μH ± 10% Short one of the secondary windings

For more detailed information regarding the transformer, visit http://www.santronics-usa.com/documents.html or

contact sales@santronics-usa.com or +1-408-734-1878 (Sunnyvale, California USA).

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FAN7621 • Rev. 1.0.3 14
 FAN7621 — PFM Controller for Half-Bridge Resonant Converters
Physical Dimensions

A
19.68
18.66
16 9

6.60
6.09

1 8
(0.40)
TOP VIEW

0.38 MIN 8.13

5.33 MAX 7.62

3.42
3.17

3.81
2.92
15
2.54 0.58 A 0.35 0
0.20
0.35
1.78
1.14 8.69
17.78
SIDE VIEW

NOTES: UNLESS OTHERWISE SPECIFIED

A THIS PACKAGE CONFORMS TO
JEDEC MS-001 VARIATION BB
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR PROTRUSIONS
D) CONFORMS TO ASME Y14.5M-1994
E) DRAWING FILE NAME: N16EREV1

Figure 31. 16-Lead Dual Inline Package (DIP)

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FAN7621 • Rev. 1.0.3 15
 FAN7621 — PFM Controller for Half-Bridge Resonant Converters
Physical Dimensions

Figure 32. 16-Lead Small Outline Package (SOP)

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FAN7621 • Rev. 1.0.3 16
 FAN7621 — PFM Controller for Half-Bridge Resonant Converters

© 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com

FAN7621 • Rev. 1.0.3 17