1sem Manual 1

LAB MANUAL-BASIC ELECTRONICS
UNIVERSITY INSTITUTE OF ENGINEERING AND TECHNOLOGY,

PANJAB UNIVERSITY, CHANDIGARH
BASIC ELECTRONICS
LAB MANUAL
DEPARTMENT OF
ELECTRONICS AND COMMUNICATION ENGINEERING
BASIC ELECTRONICS LABORATORY
UIET, PANJAB UNIVERSITY, CHANDIGARH Page 1

INDEX
S.NO. EXPERIMENT NAME PAGE NO.

1. Familiarization with electronic components and usage of 3
multimeter.
2. Familiarization with CRO and signal generator. 7
3. To obtain V-I characteristics of PN junction diode and determine 10

static resistance and dynamic resistance.
4. To observe waveforms at the output of clamper circuits. 15
5. To observe waveforms at the output of clipper circuits. 18
6. To plot common emitter characteristics of NPN transistor. 22
7. To verify truth table of logic gate . 25
8. To verify truth table of different flip-flops. 31
9. To study OP-AMP as summing/difference amplifier. 36
10. To study OP-AMP differentiator circuit. 40
11. To study OP-AMP integrator circuit. 42

EXPERIMENT NO. 1
AIM: Familiarization with electronic components and usage of multimeter.
APPARATUS: Resistor, Inductor, Capacitor, Diode, Transistor and Multimeter.
THEORY: Electronics (electron-mechanics ) is that field of science and engineering which

deals with the motion of electrons under the influence of applied electric and/or magnetic
field.
Electronic circuits contain a few basic components – three passive and two active
components. Passive components are the not capable of amplifying or processing an
electrical signal but these components are as important in an electronic circuit as active
ones. Active components contains tube type and semiconductor type devices. Passive
components include resistors, inductors and capacitors.
Fig.1: Multimeter
Resistor: It is only one out of passive components which dissipate electrical energy. Its
applications include – in amplifiers as loads for active devices, in bias network and feedback
elements. It offers resistance which is measured in ohms. It can dissipate the heat losses
without getting itself overheated. Many resistors have their resistance values and tolerance
written on their bodies but small resistors have their values printed on them. This includes a
color coding system. There can be four or five color bands. 1 st and 2nd band represents first’s
two digits of resistance value. 3rd band indicates the number of zeroes. Fourth band represents
the tolerance. For instance, using the table we can calculate the value of given resistor and it
comes out to be 100 * 103 +- 5 ohm.

Fig.2: Resistor
Diode : The essential characteristics of a pn junction is that it constitutes a diode which

permits the easy flow of current in one direction but restrains the flow in opposite direction.
When an external field with p region connected to positive terminal and n region is
connected to negative terminal of the battery , is applied across the junction is said to be
forward biased. Physically, a diode has silver end and black end. Silver end is negative and
black end is positive. When we connected this to a multimeter the value that comes is
unbiased i.e. no voltage is applied. Hence, built in potential barrier maintains equilibrium.
Fig.3: Diode
Transistor: It is a current controlled device . It consists of a silicon or germanium crystal in

which a layer of n-type material is sandwiched between two layers of p-type or vice versa.
Hence this constitutes n-p-n and p-n-p transistors.
It has three sections- emitter, base and collector. The direction indicated by arrow in figure
indicates conventional direction of current.
Using multimeter, we can calculate its forward reverse biasing voltage. Emitter-base
junction of p-n-p transistor is forward biased by connecting positive terminal of battery to
emitter and negative to base while collector- base junction is reverse biased by connecting
negative terminal of battery . Note the reading on the multimeter.

Fig.4: Transistor
Capacitor: A capacitor is a physical device which is capable of storing energy by virtue of a

voltage existing across it. The voltage applied across the capacitor sets up an electric field
within it and the energy stored in electric field. Capacitance is a measure of a capacitor’s
ability to store charge and is measured in farads(F). It offers very low impedance to ac but
very high impedance to dc.
Fig.5: Capacitor

Inductors: An inductor has been defined as a physical device which is capable of storing
energy by virtue of a current flowing through it.It opposes the change of current and
induces a voltage when the current flowing through it varies in magnitude or direction.
Fig.6: colour coding
PROCEDURE:
On multimeter by default meter is in auto power off mode.
1. Switch on the multimeter to connect red and black lead tests.
2. Set function switch to V position.
3. Select AC/DC.
4. Connect test lead to device.
5. Turn on power value will appear on digital display.
Use resistor, capacitor, pnp transistor, diode and follow above steps and note down
readings.
RESULT:
Hence the value of diode when unbiased is ___________.
Capacitance_________
Pnp transistor___________
Resistance___________

EXPERIMENT NO. 2
AIM: Familiarization with CRO and signal generator.
APPARATUS: Signal generator, cathode ray oscilloscope, BMC.
THEORY:
Cathode ray oscilloscope

It is a device which is used to measure the output of a signal generator. It displays the signal
generated in the form of different signal waveforms on the display. It can display different
shaped pulse on the screen. It is a common laboratory instrument that provides accurate
time and amplitude measurement of voltage signals over a wide range of frequencies. The
heart of a CRO is a cathode ray tube.
Fig.1 : Cathode ray oscilloscope(CRO)

Signal generator
It is a device which generates a certain frequency wave signal which is measured by a CRO.
It is also known as function generator. These are electronic devices that generate repeating
and non- repeating electronic signals. It also offers following add on modules:
The logic scope: It is very useful while experimenting with digital circuits to view timing
diagrams of flip flops, gates, counters, registers, multiplexers, demultiplexers, clocks,
frequency dividers and many other such appliances.
The power supply: has a triple output which is suitable for most of the requirements on
the test bench. It has +5 V-250mA, +12V-500mA all floating from chassis. It offers load and
line regulation of +-2%.
The curve tracer: is used to test transistors, FETs, two terminal devices like rectifier
diodes, Zener diodes. It can also be used to find out parameters like beta (current gain),
breakdown, saturations and cut off voltages.

The digital voltmeter: measures voltages upto DC 200 V with high accuracy and its 3 ½
digital display gives resolution of 1mV and 100mV. Over range is indicated by ‘I’. Special
emphasis has been placed on high voltage protection and input isolation of against floating
and chasis and ground measurements.
Component tester: This allows passive and active components like resistors, capacitors,
inductors, transformer, silicon or germanium diodes, Zener diodes, tunnel diodes, schottky
diodes and transistors JFETs, MOSFETs, UJTs, SCRs, TRJACs and even linear and digital ICs to
be tested while still in current using 201 components tester is very simple. Just push in the
CT switch, plug in two test probes one at banana socket marked CT-IN and other at ground
socket. A horizontal line about 5 to 6 cms will be seen. On shorting the two test probe tips a
vertical line is seen.
Fig.2 : Component Tester
PROCEDURE:
1. Connect the signal generator to CRO using DMC wire.

2. Switch on the signal generator.
3. Using the control panel on CRO, set the position, focus and intensity of the signal
wave.
4. Analyze the signal wave on screen.
5. Calculate the amplitude, wavelength of the signal.
6. Note the time using time division switch.
Electrical quantities measurements by using CRO can be done like

amplitude, time period and frequency.
Measurement of Amplitude
 Measurement of Time Period
 Measurement of Frequency
Measurement of Amplitude
The displays like CRO is used to exhibit the voltage signal like a time
function on its display. The amplitude of this signal is stable; however, we
can change the number of partitions that cover up the voltage signal within
vertical way by changing volt/division button on top of the CRO board. So,
we will acquire the signal’s amplitude, which is there on the CRO screen
with the help of the below formula.
A = j * nv
Where,
‘A’ is the amplitude
‘j’ is the volt/division value
‘nv’ is the no. of partitions that cover up the signal within a vertical way.
Measurement of Time Period

CRO displays the voltage signal as a function of time on its screen. The
Time period of that periodic voltage signal is constant, but we can vary the
number of divisions that cover one complete cycle of the voltage signal in
the horizontal direction by varying the time/division knob on the CRO panel.
Therefore, we will get the Time period of the signal, which is present on the
screen of CRO by using the following formula.
T = j * nv
Where,
‘T’ is the Time period
‘j’ is the time/division value

‘nv’ is the number of partitions that cover up one whole cycle of the periodic
signal within the horizontal way.
Measurement of Frequency
On the CRO screen, the measurement of tile & frequency can be done very
simply through the horizontal scale. If you want to make sure accuracy
while measuring a frequency, then it assists to enhance the area of the
signal on your CRO display so that we can more simply convert the
waveform.
Initially, the time can be measured with the help of the horizontal scale on
the CRO & counting the number of flat partitions from one finish of the
signal to the other wherever it crosses the flat line. After that, we can
develop the number of flat partitions through the time or division to discover
the time period of the signal. Mathematically the measurement of the
frequency can be signified as frequency = 1/period.
f = 1/T
OBSERVATIONS: The signal generated on screen in the form of sinusoidal waves.
S NO d (cm) TDM T(s) Ft (kHz) Fp(kHz) Amplitude(v)
Theoretical values of frequencies: _______, ________, ________
Practical values of frequencies: _______, _________, _________
RESULT:
Input frequency comes out to be equal to output frequency. (approx.)
PRECAUTIONS:
1. Note the division on screen carefully.

2. Make sure the supply generator and CRO are connected properly.
3. Note the TDM division, switch division carefully.

EXPERIMENT NO. 3
AIM: To obtain V-I characteristics of PN junction diode and determine static resistance and
dynamic resistance.
Introduction:
The semiconductor diode is formed by doping P-type impurity in one side and N-type of
impurity in another side of the semiconductor crystal forming a p-n junction as shown in the
following figure.
Fig.1: p-n junction
At the junction initially free charge carriers from both side recombine forming negatively
charged ions in P side of junction(an atom in P-side accept electron and becomes negatively
charged ion) and positively charged ion on n side(an atom in n-side accepts hole i.e. donates
electron and becomes positively charged ion)region. This region deplete of any type of free
charge carrier is called as depletion region. Further recombination of free carrier on both side is
prevented because of the depletion voltage generated due to charge carriers kept at distance by
depletion (acts as a sort of insulation) layer as shown dotted in the above figure.
Working principle:
When voltage is not applied across the diode, depletion region forms as shown in the above
figure. When the voltage is applied between the two terminals of the diode (anode and cathode)
two possibilities arises depending on polarity of DC supply.

[1] Forward-Bias Condition: When the +ve terminal of the battery is connected to P-type
material & -ve terminal to N-type terminal as shown in the circuit diagram, the diode is said to
be forward biased. The application of forward bias voltage will force electrons in N-type and
holes in P-type material to recombine with the ions near boundary and to flow crossing junction.
This reduces width of depletion region. This further will result in increase in majority carriers
flow across the junction. If forward bias is further increased in magnitude the depletion region
width will continue to decrease, resulting in exponential rise in current as shown in ideal diode
characteristic curve.
[2] Reverse-biased: If the negative terminal of battery (DC power supply) is connected with P-
type terminal of diode and +ve terminal of battery connected to N type then diode is said to be
reverse biased. In this condition the free charge carriers (i.e. electrons in N-type and holes in P-
type) will move away from junction widening depletion region width. The minority carriers (i.e.
–ve electrons in p-type and +ve holes in n-type) can cross the depletion region resulting in
minority carrier current flow called as reverse saturation current (Is). As no. of minority carrier is
very small so the magnitude of Is is few microamperes. Ideally current in reverse bias is zero.
In short, current flows through diode in forward bias and do not flow through diode in reverse
bias. Diode can pass current only in one direction.
Experiment Procedure:
1. Connect the power supply, voltmeter, current meter with the diode as shown in the figure
for forward bias diode. You can use two multimeter (one to measure current through
diode and other to measure voltage across diode)
2. Increase voltage from the power supply from 0V to 20V in step as shown in the
observation table
3. Measure voltage across diode and current through diode. Note down readings in the
observation table.
4. Reverse DC power supply polarity for reverse bias
5. Repeat the above procedure for the different values of supply voltage for reverse bias
6. Draw VI characteristics for forward bias and reverse bias in one graph

Circuit diagram (forward bias)
Circuit diagram (reverse bias)



EXPERIMENT NO. 4
AIM: To observe waveforms at the output of clamper circuits.
Introduction:
Diodes are widely used in clipping and clamping circuits. Clamping circuits are used to change
DC level (average level) of the signal which adds or subtracts DC value with the signal. In
clamping, shape of waveform remains same only offset value (DC level) will change. Positive
clamping adds positive DC level in the signal while negative clamping adds negative DC level in
the signal. Capacitor is widely used in the clamping circuit. Typical clamping waveforms for the
sinusoidal signal are shown below for positive clamping and negative clamping.
Fig.1
Clamping circuit is used in video amplifier of television receiver to restore DC level of video
signal to preserve overall brightness of the scene. Clamping circuit is also used in offset control
of function generator. Zero offset means no DC value is added in the AC signal.

Circuit operation:
Typical circuit operation of the positive clamping and negative clamping is given below.
Positive clamping:
Fig.2: Positive clamping circuit
Consider that 4V peak to peak signal with zero offset is applied at the input of the clamping
circuit. On the first negative half cycle of the input signal, diode D turns ON because anode
voltage is greater than cathode voltage. Capacitor charges to the negative peak voltage let us say
-2V in our example. The value of R should be high so that it will not discharge the capacitance.
After completion of negative cycle, positive cycle starts and diode turns OFF. Capacitance
voltage is in series with the input voltage. As per the Kirchhoff's law output voltage will be
addition of input voltage and capacitance voltage. Input signal is positive swing of +2V and
capacitor voltage is +2V. Thus during the positive peak of the input voltage total output voltage
will be +4V. We can consider that during the positive cycle capacitor acts like a battery and adds
+2V in the input. Waveforms are drawn here considering ideal diode, no leakage in the
capacitance under ideal situations which will be different in practical situations.
Negative clamping:
Fig.3: Negative clamping circuit

In a negative clamping circuit polarity of diode is reverse than in positive clamping. In our signal
input swings from -2V to +2V (peak to peak 4V).
Diode turns ON during the positive cycle and charge is stored in the capacitor. Capacitor will
charge up to +2 V in our example. During the negative cycle this voltage will be in series with
the input voltage and gives total output -4V during negative peak of the input signal.
EXPERIMENT PROCEDURE:
1. Connect function generator with CRO. Set sine wave with 4V peak to peak.
Ensure that offset voltage is 0.
2. Connect the function generator at the input of the clamping circuit
3. Observe output waveforms on the CRO for different clamping circuits and draw
output waveforms.
RESULT:
The Clamper circuit has been studied successfully.

EXPERIMENT NO. 5
AIM: To observe waveforms at the output of clipper circuits.
Introduction:
Clipping circuit is used to select for transmission that part of an arbitrary waveform which lie
above or below some reference level. Clipping circuit “clips” some portion of the waveform.
Clipping circuit are also referred to as voltage limiters. Clamping circuit preserves shape of the
waveform while clipping circuit does not preserve shape of waveform. Clipping circuit uses
some reference level. Waveform above or below this reference level is clipped. Clipping circuits
are also known as voltage limiter or amplitude limiter or slicers. Some clipper circuits are
explained here.
Positive cycle clipper circuits:
Positive cycle clipper circuits are shown in the figure with series and shunt diode. Transfer
characteristics and output waveform for sinusoidal input is shown.
Fig.1: Positive cycle clipper circuits
For series diode:
1. When vi(t)<0, Diode D is in ON condition, input waveform is available at the

output.
2. When vi(t)>0, Diode D is in OFF condition, input waveform is not
available at the output and output remains zero.

For shunt diode:
1. When vi(t)<0, Diode D is in ON condition which bypass the signal to the

ground and hence input waveform is not available at the output.
2. When vi(t)>0, Diode D is in OFF condition and acts like a OFF switch, input
waveform is available at the output.
For negative cycle clipper, polarity of diode is reverse.
Series diode positive clipping with positive reference:
In the circuit shown in the following figure, DC reference voltage is used. This is useful
of we do not want to clip entire positive cycle but some portion of positive half cycle.
Fig 2: Series diode positive clipping with positive reference
1. When vi(t)<VR, Diode D is in ON condition, input waveform is available at the

output.
2. When vi(t)> VR, Diode D is in OFF condition, input waveform is not available at
the output and output remains zero. Thus portion of output cycle clips as shown in
the waveform.
Series diode positive clipping with negative reference:
If want to clip entire positive half cycle along with some portion of the negative cycle
then negative DC reference can be used as shown in the following figure. In this case only some
portion of negative cycle passes to the output.
Fig.3: Series diode positive clipping with negative reference:
1. When vi(t)<-VR, Diode D is in ON condition, input waveform is available at the

output.
2. When vi(t)> -VR, Diode D is in OFF condition, input waveform is not available at the
output and output remains constant equal to VR. Thus entire positive cycle and some
portion of negative cycle below –VR clips.
Series diode negative clipping with reference:
Negative clipping can be achieved by changing polarity of the diode. Negative clipper
with negative reference voltage is shown in the following figure. This will clip some portion of
negative cycle.
Fig4: Series diode negative clipping with reference
1. When vi(t)>-VR, Diode D is in ON condition, input waveform is available at the

output.
2. When vi(t)< -VR, Diode D is in OFF condition, input waveform is not available at
the output and output voltage remains constant which is equal to –VR.
Shunt diode positive clipping with negative reference voltage:
Shunt diode positive clipping with negative reference voltage is as shown in the
following circuit. This will clip entire positive cycle and some portion of negative cycle as
shown in the waveform.
Fig 5: Shunt diode positive clipping with negative reference voltage
1. When vi(t)<-VR, Diode D is in OFF condition (open circuit) and input


2. When vi(t)> -VR, Diode D is in ON condition, input waveform is not available at the
output and negative voltage –VR is extended to the output. Output voltage remains
constant equal to VR. Thus entire positive cycle and some portion of negative cycle
below –VR clips.
Shunt diode negative clipping with negative reference:
Negative clipping with negative reference voltage can be achieved by reversing

polarity of the diode. Some portion of negative cycle clips.
Fig 6: Shunt diode negative clipping with negative reference voltage
1. When vi(t)>-VR, Diode D is in OFF condition (open circuit) and input

2. When vi(t) < -VR, Diode D is in ON condition, input waveform is not
available at the output and negative voltage –VR is extended to the output.
Output voltage remains constant equal to VR. Thus entire positive cycle and
some portion of negative cycle below –VR clips.
1. Connect function generator with CRO. Set sine wave with 6V peak to peak.
Ensure that offset voltage is 0.
2. Connect the function generator at the input of the clipping circuit.
3. Observe output waveforms on the CRO for different clipping circuits and draw
output waveforms.
RESULT:
The Clipper circuit has been studied successfully.
EXPERIMENT NO. 6

AIM: To plot common emitter characteristics of NPN transistor.
INTRODUCTION:
Transistor is three terminal active device having terminals collector, base and emitter. Transistor
is widely used in amplifier, oscillator, electronic switch and so many other electronics circuits for
variety of applications. To understand operation of the transistor, we use three configurations
common emitter, common base and common collector. In this practical, we will understand
common emitter configuration. As the name suggest, emitter is common between input and
output. Input is applied to base and output is taken from collector.
Fig 1: common emitter NPN transistor
We will obtain input characteristics and output characteristics of common emitter (CE)
configuration. We will connect variable DC power supply at VBB and VCC to obtain
characteristics. Input voltage in CE configuration is base-emitter voltage Vbe and input current is
base current Ib. Output voltage in CE configuration is collector to emitter voltage VCE and
output current is collector current Ic. We will use multi-meter to measure these voltages and
currents for different characteristics. Collector to emitter junction is reverse biased and base to
emitter junction is forward biased. The CE configuration is widely used in amplifier circuits
because it provides voltage gain as well as current gain. In CB configuration current gain is less
than unity. In CC configuration voltage gain is less than unity. Input resistance of CE

configuration is less than CC configuration and more than CB configuration..Output resistance of

CE configuration is more than CC configuration and less than CB configuration.
Circuit setup for input characteristics:
Fig 2
 Connect circuit as shown in the circuit diagram for input characteristics
 Connect variable power supply 0-30V at base circuit and collector circuit.
 Keep Vcc fix at 0V (Or do not connect Vcc)
 Increase VBB from 0V to 20V, note down readings of base current Ib and base to emitter
voltage Vbe in the observation table.
 Repeat above procedure for Vcc = +5V and Vcc = +10V
 Draw input characteristics curve. Plot Vbe on X axis and Ib on Y axis.
Observation table:
Circuit setup for output characteristics:

Fig 3
1. Connect circuit as shown in the circuit diagram for output characteristics.

2. Connect variable power supply 0-30V at base circuit and collector circuit.
3. Keep base current fix (Initially 0)
4. Increase VCC from 0V to 30V, note down readings of collector current Ic and
collector to emitter voltage Vce in the observation table.
5. Repeat above procedure for base currents Ib = 5µA, 50 µA, 100 µA.
6. Draw output characteristics curve. Plot Vce on X axis and Ic on Y axis.
Observation table:

EXPERIMENT NO. 7
AIM : To verify truth table of logic gate .
APPARATUS : IC7400 , bread board , connecting wires , voltage sources , Multimeter .
THEORY :
In electronics , a logic gate is an idealized on physical device implementing Boolean function ,

that is , it performs a logical operation on one or more logical inputs and products , and produces
a single logical output. The 7400 series of transistor -transistor logic (TTL) integrated circuits are
the most popular family of TTL integrated circuit logic.
INTEGRATED CIRCUITS : It is a set of electronic circuits one on one small plate of

semiconductor material, normally silicon . It is a semiconductor wafer on which thousands of
components are fabricated .
IC7400 : The 7400 series of integrated circuits is a quad 2-input NAND gate that contains four
independent gates each of which performs logical NAND functions. It consists of 14 pins, which
has alternate 2 inputs and one output.

Fig 1: IC 7400
NAND GATE :
NAND gate is a logic gate which produces an output which is false if all its inputs are time, thus
the output is complement of that of AND gate its given value zero if and only if all inputs have
value of one and otherwise has value one .
Fig 2: Symbol and Truth table of NAND gate
NOT GATE : In digital , NOT gate is a logic gate which implements logical megation. it has
one input and output is magnitude that too of input .
Fig 3: Symbol and Truth table of NOT gate
AND GATE : A HIGH output (1) results only if both the inputs to the AND gate are HIGH (1).
If neither or only one input to the AND gate is HIGH, a LOW output results.
Fig 4: Symbol and Truth table of AND gate
OR GATE: It is a digital logic gate that implements logical disjunction it behaves according to
the truth table as given below .A HIGH output (1) if one or both the inputs to the gate are HIGH
(1) . If neither input is high , a LOW output (0) results .
Fig 5: Symbol and Truth table of OR gate
PROCEDURE :
1. Circuit should be formed with components as shown in the diagram respectively.
2. 5 volts should be provided to the bread board using the voltage source by keeping other at
ground.

3.Now to convert NAND gate into NOT/OR/AND gate signal input should be provided to the
input pins .
4. By making connections in bread board provide same voltage to input pins 1 and 2 .
5.Now another wire should be connected to output terminal 3.
6. Another wire should be connected at ground voltage.
7. Now the output voltage should be measured using the multimeter.
8. If both terminals receive 5 volts output should give zero volt and vice versa .
1.)
OBERSEVATION TABLE:
INPUT A INPUT B OUTPUT

0V 0V 4.89V
5V 5V 0V
2.)
OBSERVATION TABLE :
5V 5V 3.8V
5V 0V 4.55V
0V 5V 4.3V
0V 0V 0V
3.)
AND GATE FROM NAND GATE

OBSEVATION TABLE:
0V 0V 0V
0V 5V 0V
5V 0V 0V
5V 5V 4.98V
PRECAUTIONS :
1. Verify that the given IC is not faulty by independently verifying NAND gate.
2. Wire should be properly inserted into the bread board circuit.
3. Set the multimeter on DC and measure the output carefully.
RESULT:
The truth table of NOT gate is verified using the multimeter outputs

therefore, the given NAND gate is transformed into NOT gate .
EXPERIMENT NO. 8
AIM: To verify truth table of different flip-flops.
APPARATUS : IC7400 , bread board , connecting wires , voltage sources , Multimeter .
THEORY :
Flip flops are actually an application of logic gates. With the help of Boolean logic you can
create memory with them. Flip flops can also be considered as the most basic idea of a Random
Access Memory [RAM]. When a certain input value is given to them, they will be remembered
and executed, if the logic gates are designed correctly. A higher application of flip flops is
helpful in designing better electronic circuits. The most commonly used application of flip flops
is in the implementation of a feedback circuit. As a memory relies on the feedback concept, flip
flops can be used to design it. There are mainly four types of flip flops that are used in electronic
circuits. They are
1. The basic Flip Flop or S-R Flip Flop

2. J-K Flip Flop
3. Delay Flip Flop [D Flip Flop]
4. T Flip Flop
1.) S-R Flip Flop

The circuit diagram and truth table is shown below:

Fig 1
The SET-RESET flip flop is designed with the help of two NOR gates and also two NAND
gates. These flip flops are also called S-R Latch. A clocked S-R flip flop is designed by adding
two AND gates to a basic NOR Gate flip flop. A clock pulse [CP] is given to the inputs of the
AND Gate. When the value of the clock pulse is ‘0’, the outputs of both the AND Gates remain
‘0’. As soon as a pulse is given the value of CP turns ‘1’. This makes the values at S and R to
pass through the NOR Gate flip flop. But when the values of both S and R values turn ‘1’, the
HIGH value of CP causes both of them to turn to ‘0’ for a short moment. As soon as the pulse is
removed, the flip flop state becomes intermediate. Thus either of the two states may be caused,
and it depends on whether the set or reset input of the flip-flop remains a ‘1’ longer than the
transition to ‘0’ at the end of the pulse. Thus the invalid states can be eliminated.
2.) J-K Flip Flop
The circuit diagram and truth-table of a J-K flip flop is shown below:

Fig 2
J-K Flip Flop J-K flip flop can also be defined as a modification of the S-R flip flop. The only
difference is that the intermediate state is more refined and precise than that of a S-R flip flop.
The behavior of inputs J and K is same as the S and R inputs of the S-R flip flop. The letter J
stands for SET and the letter K stands for CLEAR. When both the inputs J and K have a HIGH
state, the flip-flop switch to the complement state. So, for a value of Q = 1, it switches to Q=0
and for a value of Q = 0, it switches to Q=1. The circuit includes two 3-input AND gates. The
output Q of the flip flop is returned back as a feedback to the input of the AND along with other
inputs like K and clock pulse [CP]. So, if the value of CP is ‘1’, the flip flop gets a CLEAR
signal and with the condition that the value of Q was earlier 1. Similarly output Q’ of the flip
flop is given as a feedback to the input of the AND along with other inputs like J and clock pulse
[CP]. So the output becomes SET when the value of CP is 1 only if the value of Q’ was earlier 1
3.) D- Flip Flop
The circuit diagram and truth table is given below:

Fig 3
D flip flop is actually a slight modification of the above explained clocked SR flip-flop. From the
figure you can see that the D input is connected to the S input and the complement of the D input
is connected to the R input. The D input is passed on to the flip flop when the value of CP is ‘1’.
When CP is HIGH, the flip flop moves to the SET state. If it is ‘0’, the flip flop switches to the
CLEAR state.
4.) T- Flip Flop
The circuit diagram and truth table is given below:

Fig 4
This is a much simpler version of the J-K flip flop. Both the J and K inputs are connected
together and thus are also called a single input J-K flip flop. When clock pulse is given to the flip
flop, the output begins to toggle. Here also the restriction on the pulse width can be eliminated
with a master-slave or edge-triggered construction.
PROCEDURE :
1. Circuit should be formed with components as shown in the diagram respectively.
2. 5 volts should be provided to the bread board using the voltage source by keeping other at
ground.

3.Now to verify different flip-flops gate signal input should be provided to the input pins .
4. Now the output voltage should be measured using the multimeter.
PRECAUTIONS :
1. Verify that the given IC is not faulty by independently verifying NAND gate.
2. Wire should be properly inserted into the bread board circuit.
3. Set the multimeter on DC and measure the output carefully.
RESULT:
The truth table of flip-flops is verified successfully.
EXPERIMENT NO. 9
AIM: To study OP-AMP as summing/difference amplifier.
Apparatus: 741 IC, resistors, capacitor, function generator, power supply and CRO.
THEORY:
ADDER: Adder circuit is a Summing Amplifier. Op-amp can be used to design a circuit whose
output is the sum of several input signals. Such a circuit is called a summing amplifier or a

summer. Summing amplifier can be classified as inverting & non-inverting summer depending
on the input applied to inverting & non-inverting terminals respectively. Fig shows an inverting
summer with two inputs. Here the output will be the linear summation of input voltages. Here the
feedback forces a virtual ground to exist at the inverting input . The output is equal to the
negative weighted sum of the input voltages. The summing operation depends exclusively on the
sum of the resistor ratios. Fig shows the inverting configuration with three inputs Va, Vb, Vc
depending on the relationship between the feedback resistor RF and the input resistors Ra, Rb
and Rc , the circuit can be used as either a summing amplifier, scaling amplifier, or averaging
amplifier. By connecting more than one input voltages to the inverting input, the resulting circuit
is the adder. The output voltage (Vout ) now becomes proportional to the sum of the input
voltages V1, V2, V3 etc. Then we can modify the original equation for the inverting amplifier to
take account of these new inputs thus:

Circuit Diagram:
Fig 1: Adder circuit
SUBTRACTOR:
A basic differential amplifier can be used as a subtractor as shown in the circuit diagram. In this
circuit, input signals can be scaled to the desired values by selecting appropriate values for the
resistors. When this is done, the circuit is referred to as scaling amplifier. However in this circuit
all external resistors are equal in value. So the gain of amplifier is equal to one. The output
voltage Vo is equal to the voltage applied to the non-inverting terminal minus the voltage applied
to the
inverting terminal hence the circuit is called a subtractor.
By connecting one voltage signal onto one input terminal and another voltage signal onto the
other input terminal the resultant output voltage will be proportional to the "Difference" between
the two input voltage signals of V1 and V2.Then differential amplifiers amplify the difference
between two voltages making this type of operational amplifier circuit a Subtractor unlike a
summing amplifier which adds or sums together the input voltages. This type of operational
amplifier circuit is commonly known as a Differential Amplifier.
By connecting each input in turn to 0v ground we can use superposition to solve for the output
voltage Vout. Then the transfer function for a Differential Amplifier circuit is given as:

Circuit diagram:
Fig 2 : Subtractor circuit

PROCEDURE: -
(1) Apply two different sine waves signal to the input of the adder and subtractor.
(2) Give the input amplitude of 5v peak to peak and frequency of 1 kHz.
(3) Verify the output on CRO.
WAVEFORMS:
Fig 3
RESULT:
The summing and difference opamp circuit design output waveforms have been studied.
PRECAUTIONS:-
1. Do not use open ended wires for connecting to 230 V power supply.
2. Before connecting the power supply plug into socket, ensure power supply should be switched
off.
3. Ensure all connections should be tight before switching on the power supply.
4. Take the reading carefully.
5. Power supply should be switched off after completion of experiment.

EXPERIMENT NO. 10
AIM: To study OP-AMP differentiator circuit.
APPARATUS: 741 IC, resistors, capacitor, function generator, power supply and CRO.
THEORY:
Differentiator circuit as its name implies, performs the mathematical operation of differentiation, that
is, the output waveform is the derivative of the input. The differentiator may be constructed from a
basic inverting amplifier when an input resistor R1 is replaced by a capacitor C,
Vo = - Rf C dVin/dt
Thus, the output V o is equal to the Rf C times the negative instantaneous rate of change of the
input voltage Vin with time. Input signals are applied to the capacitor C. Capacitive reactance is the
important factor in the analysis of the operation of a differentiator. Capacitive reactance is Xc = 1/2πfC.
Capacitive reactance is inversely proportional to the rate of change of input voltage applied to the
capacitor. At low frequency, the reactance of a capacitor is high and at high frequency reactance is low.
Therefore, at low frequencies and for slow changes in input voltage, the gain, R f / X c , is low, while at
higher frequencies and for fast changes the gain is high, producing larger output voltages.
If a constant DC voltage is applied as input then the output voltage is zero. If the input voltage changes
from zero to negative, the voltage output voltage is positive. If the applied input voltage changes from
zero to positive, the output voltage is negative. If a square wave input is applied to a differentiator, then
a spike waveform is obtained at the output.
At high frequencies this simple differentiator circuit becomes unstable and starts to oscillate. This high
frequency gain of the circuit is reduced by adding a small value capacitor across feedback resistor R f or
a resistor in series with the capacitor. In exchange for stability, the circuit has a reduced high-frequency
capability
CIRCUIT DIAGRAM:
Fig 1: OP-AMP differentiator circuit

PROCEDURE:
1. Connect the circuit as shown in the circuit diagram.
2. Give the input signal as specified.
3. Switch on the power supply.
4. Note down the outputs from the CRO
5. Draw the necessary waveforms on the graph sheet.
OBSERVATION TABLE:-
S.NO I/P Voltage O/P Voltage Frequency in Gain=20log
Vin Vo KHz. V0/Vin
GRAPH:
Fig 2: Waveform of differentiator
CALCULATIONS:
If input Vin = Am sin ωt
Output of the integrator will be equal to
dV¿
Vo=−R f C
dt

RESULT:
The differentiator circuit design output waveforms have been studied.

PRECAUTIONS:
1. Connections should be verified before clicking run button.
2. The resistance to be chosen should be in K ohm range.
3. Best performance is being obtained within 50Hz to 1 Mhz.
4. Connections should be tight.
EXPERIMENT NO. 11
AIM: To study OP-AMP integrator circuit.
APPARATUS: 741 IC, resistors, capacitor, function generator, power supply and CRO.
THEORY:
A voltage integrator is an electronic device performing a time integration of an electric voltage,
thus measuring a total electric flux. Integrators are commonly used in wave shaping networks
and signal generators. For proper integration, time period T of the signal must be larger than RiC.
The output voltage can be expressed as
Vo =( 1/RC ) ʃ Vindt
Gain and linearity of the output waveform are the two important advantages of integrators over
ordinary integrators. Linearity of the waveform is due to the linear charging of the capacitors.
Current through the capacitors is always constant and hence through the input resistance is
constant due to constant potential drop across it. Current through input resistor and capacitor is
same. A high value resistor is required across the capacitor. At low frequencies of the input
voltage, capacitor behaves as a open circuit. In the absence of feedback resistor R f , Op-Amp
may saturate at low frequency even for a very low voltage present at the inputs This is because
the open loop gain of Op-Amp is very high. When feedback resistor is connected, the gain will
be reduced considerably at low frequencies. At higher frequencies ,circuit will behave as an
ordinary integrator. In other words, at very low frequencies R f is effective and at high
frequencies C is effective in the feedback path. When the input to an integrator is sine wave,
output will be negative cosine wave. If the output is a square wave with duty cycle 50% output
will be a triangular wave. Integrator is a first order low pass filter. It permits low frequencies to
pass to output.
In case of ideal integrator ,the circuit operates by passing a current that charges or discharges
the capacitor over time. If the op-amp is assumed ideal, nodes v1 and v2 are held equal, and
so v2 is a virtual ground. The input voltage passes a current Vin through the resistor and series
capacitor, which charges or discharges the capacitor over time. Because the resistor and
capacitor are connected to a virtual ground, the input current does not vary with capacitor charge
and a linear integration operation is achieved.
In case of practical integrator ,This can cause several issues for the ideal design; most
importantly, if vin=0, both the output offset voltage and the input bias current can cause
current to pass through the capacitor, causing the output voltage to drift over time until the op-
amp saturates. Similarly, if were a signal centered about zero volts (i.e. without
a DC component), no drift would be expected in an ideal circuit, but may occur in a real circuit.

Circuit diagram:
Fig 1: Ideal integrator
Fig 2: Practical integrator:
Fig 3: Frequency response of integrator

The frequency responses of the practical and ideal integrator are shown in the above figure. For
both circuits, the crossover frequency , at which the gain is 0 dB, is given by:
The 3 dB cutoff frequency of the practical circuit is given by:
The practical integrator circuit is equivalent to an active first-order low pass filter. The gain is
relatively constant up to the cutoff frequency decreases by 20 dB per decade beyond it. The
integration operation occurs for frequencies in the range [fa ,fb], provided that fa< fb This
condition can be achieved by appropriate choice of RfCf and R1Cf time constants.
PROCEDURE:
1. Setup the integrator circuit. Feed Vin square wave at the input and observe the input and
output simultaneously on CRO.
2. Vary the dc offset of the square wave input and observe the difference in the output waveform.
3. Repeat the experiment by feeding triangular wave and sine wave at the input and observe the
output.
OBSERVATION TABLE:-
S.NO I/P Voltage VinO/P Voltage Vo Frequency in KHz. Gain=20log
V0/Vin
GRAPH :
Fig 4

RESULT:
The integrator circuit design output waveforms have been studied.
PRECAUTIONS:
1. Connections should be verified before clicking run button.
2. The resistance to be chosen should be in K ohm range.
3. Best performance is being obtained within 50Hz to 1 Mhz.
4. Connections should be tight.

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LAB MANUAL-BASIC ELECTRONICS

UNIVERSITY INSTITUTE OF ENGINEERING AND TECHNOLOGY,

BASIC ELECTRONICS LABORATORY

UIET, PANJAB UNIVERSITY, CHANDIGARH Page 1

S.NO. EXPERIMENT NAME PAGE NO.

3. To obtain V-I characteristics of PN junction diode and determine 10

5. To observe waveforms at the output of clipper circuits. 18

6. To plot common emitter characteristics of NPN transistor. 22

7. To verify truth table of logic gate . 25

8. To verify truth table of different flip-flops. 31

9. To study OP-AMP as summing/difference amplifier. 36

10. To study OP-AMP differentiator circuit. 40

11. To study OP-AMP integrator circuit. 42

UIET, PANJAB UNIVERSITY, CHANDIGARH Page 2

AIM: Familiarization with electronic components and usage of multimeter.

APPARATUS: Resistor, Inductor, Capacitor, Diode, Transistor and Multimeter.

THEORY: Electronics (electron-mechanics ) is that field of science and engineering which

UIET, PANJAB UNIVERSITY, CHANDIGARH Page 3

Diode : The essential characteristics of a pn junction is that it constitutes a diode which

Transistor: It is a current controlled device . It consists of a silicon or germanium crystal in

UIET, PANJAB UNIVERSITY, CHANDIGARH Page 4

Capacitor: A capacitor is a physical device which is capable of storing energy by virtue of a

UIET, PANJAB UNIVERSITY, CHANDIGARH Page 5

Fig.6: colour coding

On multimeter by default meter is in auto power off mode.

1. Switch on the multimeter to connect red and black lead tests.

2. Set function switch to V position.

4. Connect test lead to device.

5. Turn on power value will appear on digital display.

Hence the value of diode when unbiased is ___________.

UIET, PANJAB UNIVERSITY, CHANDIGARH Page 6

APPARATUS: Signal generator, cathode ray oscilloscope, BMC.

Cathode ray oscilloscope

Fig.1 : Cathode ray oscilloscope(CRO)

UIET, PANJAB UNIVERSITY, CHANDIGARH Page 7

UIET, PANJAB UNIVERSITY, CHANDIGARH Page 8

Fig.2 : Component Tester

1. Connect the signal generator to CRO using DMC wire.

Electrical quantities measurements by using CRO can be done like

‘A’ is the amplitude

‘j’ is the volt/division value

Measurement of Time Period

‘T’ is the Time period

‘j’ is the time/division value

UIET, PANJAB UNIVERSITY, CHANDIGARH Page 10

OBSERVATIONS: The signal generated on screen in the form of sinusoidal waves.

S NO d (cm) TDM T(s) Ft (kHz) Fp(kHz) Amplitude(v)

Theoretical values of frequencies: _______, ________, ________

Practical values of frequencies: _______, _________, _________

Input frequency comes out to be equal to output frequency. (approx.)

1. Note the division on screen carefully.

UIET, PANJAB UNIVERSITY, CHANDIGARH Page 11

Fig.1: p-n junction

UIET, PANJAB UNIVERSITY, CHANDIGARH Page 12

4. Reverse DC power supply polarity for reverse bias

UIET, PANJAB UNIVERSITY, CHANDIGARH Page 13

Circuit diagram (forward bias)

Circuit diagram (reverse bias)

UIET, PANJAB UNIVERSITY, CHANDIGARH Page 14

UIET, PANJAB UNIVERSITY, CHANDIGARH Page 15

UIET, PANJAB UNIVERSITY, CHANDIGARH Page 16

UIET, PANJAB UNIVERSITY, CHANDIGARH Page 17

Fig.2: Positive clamping circuit

Theoretical values of frequencies: _, , __

Practical values of frequencies: ___, _, _____