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    Question Paper Code:: Reg. No.

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    saran_neo
    The document is a question paper for a Computer Science and Engineering examination. It contains two parts - Part A contains 10 short answer questions related to computer architecture topics like RISC vs CISC processors, pipelining, cache coherence protocols, and Flynn's classification of computer systems. Part B contains 5 longer answer questions, with internal choices, related to instruction set architecture, pipelining hazards, vector processors, shared-memory multiprocessors, and data flow architecture. Students have to answer all questions in the paper.

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    Question Paper Code:: Reg. No.

    Uploaded by

    saran_neo
    35 views2 pages
    The document is a question paper for a Computer Science and Engineering examination. It contains two parts - Part A contains 10 short answer questions related to computer architecture topics like RISC vs CISC processors, pipelining, cache coherence protocols, and Flynn's classification of computer systems. Part B contains 5 longer answer questions, with internal choices, related to instruction set architecture, pipelining hazards, vector processors, shared-memory multiprocessors, and data flow architecture. Students have to answer all questions in the paper.

    Original Title

    83261(CS340)

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    The document is a question paper for a Computer Science and Engineering examination. It contains two parts - Part A contains 10 short answer questions related to computer architecture topics like RISC vs CISC processors, pipelining, cache coherence protocols, and Flynn's classification of computer systems. Part B contains 5 longer answer questions, with internal choices, related to instruction set architecture, pipelining hazards, vector processors, shared-memory multiprocessors, and data flow architecture. Students have to answer all questions in the paper.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    35 views2 pages

    Question Paper Code:: Reg. No.

    Uploaded by

    saran_neo
    The document is a question paper for a Computer Science and Engineering examination. It contains two parts - Part A contains 10 short answer questions related to computer architecture topics like RISC vs CISC processors, pipelining, cache coherence protocols, and Flynn's classification of computer systems. Part B contains 5 longer answer questions, with internal choices, related to instruction set architecture, pipelining hazards, vector processors, shared-memory multiprocessors, and data flow architecture. Students have to answer all questions in the paper.

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    Reg. No.

    Question Paper Code: 83261

    B.E./B.Tech. DEGREE EXAMINATIONS, NOVEMBER/DECEMBER 2021.

    Sixth Semester

    Computer Science and Engineering

    CS 340 – COMPUTER ARCHITECTURE –II

    (Regulations 2001)

    Time : Three hours Maximum : 100 marks


    Answer ALL questions.

    PART A — (10  2 = 20 marks)

    1. Compare between RISC and CISC processor.

    2. List out the performance related issues.

    3. What is Pipelining?

    4. Mention the merits of dynamic scheduling.

    5. List out any two limitations of multiple issue processors.

    6. State the purpose of branch target buffer.

    7. Define cache coherence protocol. Mention the classes of CCP.

    8. List out the demerits of distributed shared-memory architecture.

    9. List down the Flynn’s classification of computer systems.

    10. Define reliability and availability.

    PART B — (5  16 = 80 marks)

    11. (a) (i) Discuss the instruction set architecture with abstract view of CPU.
    (8)
    (ii) State the Amdahl's law, define speedup and derive the speedup
    equation. (8)

    Or
    (b) (i) Explain the big-endian and little endian formats with suitable
    example. (8)
    (ii) What is fetch execute cycle? Discuss the steps involved fetch
    execute cycle with example. (8)

    12. (a) (i) Explain the instruction pipelining with help of block diagram. (8)
    (ii) Describe the various pipeline hazards with suitable example (8)

    Or
    (b) (i) What is parallelism? Explain the concepts of parallelism. (8)
    (ii) With suitable example describe the instruction set architecture
    design. (8)

    13. (a) What are the various stages of an instruction pipeline? Discuss. (16)

    Or
    (b) Explain how the two issues namely vector length and stride are handled
    by vector processors. (16)

    14. (a) With neat block diagram explain the centralized shared-memory
    multiprocessor architecture. (16)

    Or
    (b) Discuss the Performance of symmetric shared-memory multiprocessor
    and their-effects with example. (16)

    15. (a) Discuss the architecture of data flow computer systems.

    Or
    (b) Write notes on:
    (i) Stack processors and (8)
    (ii) SCSI standard. (8)

    —————————

    2 83261

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